CN111413648B - Secondary wiring alignment device - Google Patents
Secondary wiring alignment device Download PDFInfo
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- CN111413648B CN111413648B CN202010278751.5A CN202010278751A CN111413648B CN 111413648 B CN111413648 B CN 111413648B CN 202010278751 A CN202010278751 A CN 202010278751A CN 111413648 B CN111413648 B CN 111413648B
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Abstract
The invention discloses a secondary wiring alignment device which comprises a sending terminal and a receiving terminal. The transmitting terminal mainly comprises a processor and a pulse receiving and transmitting circuit; the receiving terminal mainly comprises a pulse receiving circuit, a processor and a display module. One end of a plurality of secondary cables needing to be aligned is connected to the transmitting terminal, the other end of the secondary cables needing to be aligned is connected to the receiving terminal, the transmitting terminal and the receiving terminal form a current loop through the secondary cables needing to be aligned, and the receiving terminal display module displays the serial number of the transmitting terminal corresponding to each cable. The invention has the beneficial effects that the secondary cable needing to be aligned is utilized to construct the current loops of the transmitting terminal and the receiving terminal, an auxiliary loop is not required to be additionally added, a plurality of secondary cables can be detected at the same time, the time of alignment is greatly shortened, and the workload of alignment is reduced.
Description
Technical Field
The invention relates to the field of secondary wiring, in particular to a secondary wiring alignment device.
Background
At present, in the electric network of industries such as railway, metallurgy, power transmission, ironmaking, etc., each consumer needs to carry out secondary wiring when wiring, and when the line number is very many, can be wrong, need to carry out the check one by one. At present, manual investigation is performed under most conditions, so that the workload is high and the error rate is high.
The utility model provides a publication number is CN 206990725U's patent provides a novel transformer substation secondary cable pair line device, including setting up respectively at the measured end and the measuring end at secondary cable both ends that await measuring and carrying out the voltage measurement device who measures to secondary cable both ends voltage, the measured end be provided with power, switch Kl, N wiring end and establish ties the N+1 wiring resistance in power and switch both sides, N wiring end be connected with the wiring node of any two adjacent wiring resistances respectively, and N wiring end on correspond and be provided with the reference mark, the measuring end be the survey line row of inserting for having the reference mark, and insert row jack's number be not less than N, the voltage value inequality between any two wiring ends. Although auxiliary cables are not needed for constructing a detection loop, a large number of resistors are needed to be connected in series, and high direct current voltage needs to be applied to two ends of the resistors connected in series, and potential safety hazards exist when the direct current voltage exceeds 36V, so that the number of secondary cables which can be detected simultaneously in the method is very limited.
Disclosure of Invention
The invention aims to overcome the problems in the prior art and provide a secondary wiring device which can quickly detect and distinguish each cable only through the existing secondary cable without adding an additional auxiliary loop, can detect a plurality of cables simultaneously and has low voltage level.
2. To this end, the present invention provides a secondary wiring alignment device including a transmitting terminal and a receiving terminal.
The transmitting terminal comprises a processor A and a plurality of pulse receiving and transmitting circuits, each pulse receiving and transmitting circuit is respectively connected with one end of one cable, the pulse receiving and transmitting circuits are in a pulse transmitting state in sequence under the control of the processor A, the types of pulses transmitted by each pulse receiving and transmitting circuit are different, meanwhile, the pulse receiving and transmitting circuits which are not in the pulse transmitting state are in a pulse receiving state, and the serial number of each cable corresponds to one type of pulse.
The receiving terminal comprises a processor B, a plurality of pulse receiving circuits and a display module, wherein the other ends of every two cables are respectively connected to one pulse receiving circuit, each pulse receiving circuit transmits the pulse to the processor B after receiving the pulse, the processor judges that the cables with corresponding serial numbers are in a connected state according to the type of the received pulse, and the serial numbers of the cables which are already connected are displayed on the display module.
Further, the types of pulses sent by the pulse transceiving circuit are distinguished by pulse widths, and each pulse width corresponds to a type of pulse.
Further, the pulse width values of the pulses transmitted by all the pulse transceiving circuits represent an arithmetic progression from small to large.
Still further, each of the pulse transceiving circuits is in a pulse transmitting state for a period that is uniform, the period being greater than a maximum value of the pulse width values.
Further, the pulse receiving circuit comprises two signal detection units, the two signal detection units are connected in parallel in an anti-direction, the output end of each signal detection unit is connected with the processor B in a signal mode, and the cables are respectively connected to connecting wires for connecting the two signal detection units in parallel.
Further, when the number of cables is an odd number, the cable which is already connected to the pulse receiving circuit is determined first, and finally the cable which is not connected to the pulse receiving circuit is obtained.
Still further, the signal detection unit is an optocoupler, a magnetically isolated device, or a current sensor.
Further, the number of pulse transceiving circuits in the transmitting terminal is not necessarily equal to the number of pulse receiving circuits in the receiving terminal.
Further, the number of the pulse transceiver circuits in the transmitting terminal is between 2 and 255, and the number of the pulse receiving circuits in the receiving terminal is between 2 and 255.
Further, the display module is a display.
The secondary wiring alignment device provided by the invention has the following beneficial effects:
1. the secondary cable needing to be aligned is utilized to construct a current loop of the transmitting terminal and the receiving terminal, an auxiliary loop is not required to be additionally added, the whole device is simple and easy to operate, and the labor cost is saved;
2. the device can detect a plurality of cables simultaneously, greatly shortens the alignment time, is beneficial to operators to better develop alignment work, improves the working efficiency, reduces the alignment workload and accelerates the engineering construction progress;
3. under the conditions of more cables and more cable cores, the workload of wiring lines is larger, wire cores with poor insulation are not easy to find, and staff can go wrong slightly by negligence.
Drawings
FIG. 1 is a schematic diagram of a system connection circuit of a secondary wire alignment device according to the present invention;
fig. 2 is a schematic diagram of a pulse receiving circuit of a receiving terminal in a secondary wiring device according to the present invention.
Detailed Description
One embodiment of the present invention will be described in detail below with reference to the attached drawings, but it should be understood that the scope of the present invention is not limited by the embodiment.
In this application, the model and structure of the components are not explicitly known in the prior art, and can be set by those skilled in the art according to the needs of the actual situation, and the embodiments of this application are not specifically limited.
3. Specifically, as shown in fig. 1-2, an embodiment of the present invention provides a secondary wiring device, which includes a transmitting terminal and a receiving terminal.
The transmitting terminal comprises a processor A and a plurality of pulse receiving and transmitting circuits, each pulse receiving and transmitting circuit is respectively connected with one end of one cable, the pulse receiving and transmitting circuits are in a pulse transmitting state in sequence under the control of the processor A, the types of pulses transmitted by each pulse receiving and transmitting circuit are different, meanwhile, the pulse receiving and transmitting circuits which are not in the pulse transmitting state are in a pulse receiving state, and the serial number of each cable corresponds to one type of pulse.
The receiving terminal comprises a processor B, a plurality of pulse receiving circuits and a display module, wherein the other ends of every two cables are respectively connected to one pulse receiving circuit, each pulse receiving circuit transmits the pulse to the processor B after receiving the pulse, the processor judges that the cables with corresponding serial numbers are in a connected state according to the type of the received pulse, and the serial numbers of the cables which are already connected are displayed on the display module.
In this embodiment, the types of the pulses sent by the pulse transceiving circuits are distinguished by pulse widths, each pulse width corresponds to one pulse type, meanwhile, the pulse width values of the pulses sent by all the pulse transceiving circuits are in an arithmetic sequence from small to large, when the pulse widths are set, a constructor can grasp the correspondence between the pulse width values and the cables more easily by using the arithmetic sequence, and when the processor A is programmed, the arithmetic sequence is equivalent to check the program easily, and meanwhile, the period of each pulse transceiving circuit in a pulse transmitting state is consistent, and is greater than the maximum value of the pulse width values.
In this embodiment, the pulse receiving circuit includes two signal detecting units, the two signal detecting units are connected in inverse parallel, the output end of each signal detecting unit is connected with the processor B through signals, the cables are respectively connected to the connecting lines connected in parallel to the two signal detecting units, meanwhile, when the number of the cables is an odd number, the cables which are already connected to the pulse receiving circuit are firstly determined, and finally, the cables which are not connected to the pulse receiving circuit are obtained, that is, when the number of the cables is an odd number, the serial numbers of the cables which are already connected to the pulse receiving circuit are firstly determined, and finally, the serial numbers of the cables which are not connected to the pulse receiving circuit are obtained, and meanwhile, the signal detecting units are optocouplers, magnetically isolated devices or current sensors.
In this embodiment, the number of pulse transceiver circuits in the transmitting terminal is not necessarily equal to the number of pulse receiving circuits in the receiving terminal. The number of the pulse receiving circuits in the transmitting terminal is between 2 and 255, and the number of the pulse receiving circuits in the receiving terminal is between 2 and 255. The display module is a display.
The present invention will be explained and illustrated in detail below with reference to specific data. As shown in fig. 1, in this example, 20 cables are taken as an example, one end of the secondary cable is connected to each terminal of the in-transmission-terminal pulse transmitting/receiving circuit 1A to the in-pulse transmitting/receiving circuit 20A in no-sequence, and the other end of the secondary cable is connected to each terminal of the in-reception-terminal pulse receiving circuit 1B to the in-pulse receiving circuit 10B in no-sequence.
The processor a in the transmission terminal first controls the pulse transmitting/receiving circuit 1A to transmit a pulse having a period of 21ms and a pulse width of 100us, and controls the pulse transmitting/receiving circuits 2A to 20A to be in a pulse receiving state.
The processor a in the transmitting terminal controls the pulse time sent by the pulse transceiving circuit 1A to have a minimum allowable value, the minimum allowable value affects the pulse period sent by the pulse transceiving circuit and the response time of the secondary alignment device, in this example, 100us is taken as an example, the time is a value which can be set arbitrarily, and preferably, the setting of the minimum allowable value is to ensure that the receiving terminal can respond to and collect the pulse signal within the minimum allowable value, and also to shorten the minimum allowable value as much as possible for reducing the pulse period sent by the pulse transceiving circuit.
When the pulse transceiver circuit 1A transmits 100us of pulses, the processor a in the transmitting terminal controls the pulse transceiver circuit 1A to switch to the pulse receiving state, controls the pulse transceiver circuit 2A to transmit pulses with a period of 21ms and a pulse width of 200us, and controls the pulse transceiver circuit 3A to the pulse transceiver circuit 20A to be in the pulse receiving state.
When the pulse transceiver circuit 2A transmits 200us pulse, the processor a in the transmitting terminal controls the pulse transceiver circuit 2A to be converted into a pulse receiving state, controls the pulse transceiver circuit 3A to transmit a pulse with a period of 21ms and a pulse width of 300us, and controls the pulse transceiver circuit 1A, the pulse transceiver circuit 4A to the pulse transceiver circuit 20A to be in the pulse receiving state.
Similarly, the processor a in the transmitting terminal sequentially controls each of the pulse transceiving circuits 1A to 20A to transmit pulses, the pulse transceiving circuit transmits different pulse times, the pulse transmitting time of the next pulse transceiving circuit increases by 100us of pulse based on the pulse time of the previous pulse transceiving circuit, and the pulse transmitting time of the pulse transceiving circuit 20A is 21ms.
The pulse period transmitted by the pulse transmitting and receiving circuits 1A to 20A is the sum of the pulse transmission times of each of the pulse transmitting and receiving circuits 1A to 20A. When the number of the pulse receiving and transmitting circuits is different, the pulse periods are also different.
The circuit principles of the pulse receiving and transmitting circuits 1A to 20A are completely consistent, and the working state of each pulse receiving and transmitting circuit is independently controlled by the processor A.
The pulse receiving and transmitting circuit can adopt NPN and PNP transistors to form a push-pull circuit in a matched mode, or adopts N-channel MOSFET and P-channel MOSFET to form a pair tube circuit in a matched mode, and can also adopt other forms of controlled switching circuits and integrated chip circuits. When the pulse receiving and transmitting circuit receives the high-level control signal from the processor A, the pulse receiving and transmitting circuit is used as a signal driving source to output a high-level signal, and the time width of the high-level signal output by the pulse receiving and transmitting circuit is consistent with that of the high-level control signal received by the pulse receiving and transmitting circuit. The capability of the pulse receiving and transmitting circuit to output current is related to the device adopted by the pulse receiving and transmitting circuit when the pulse receiving and transmitting circuit outputs high-level signals. And when the pulse receiving and transmitting circuit receives the low-level control signal from the processor A, the signal output end of the pulse receiving and transmitting circuit and the signal ground form a channel, and the signal output end of the pulse receiving and transmitting circuit is clamped to be the signal ground, and the signal of the pulse receiving and transmitting circuit outputs the low level. The capability of the pulse receiving and transmitting circuit to input current is related to the device adopted by the pulse receiving and transmitting circuit when the pulse receiving and transmitting circuit outputs low-level signals. The pulse receiving and transmitting circuit maintains the low level time width consistent with the low level control signal received by the pulse receiving and transmitting circuit.
The basic circuit principles of the pulse receiving circuits 1B to 10B are completely consistent, and the pulse receiving circuits are in a pulse receiving state. As shown in fig. 2, taking the pulse receiving circuit 1B as an example, the pulse receiving circuit unit is composed of two signal detecting units 1C and 2C, the signal detecting units 1C and 2C are in an inverse parallel relationship, and each path of state signal of the pulse receiving circuit is independently transmitted to the processor B for detecting the working state of the pulse receiving circuit.
The signal detection unit can adopt signal isolation devices such as an optical coupler, a signal transmitter, a pulse transformer and the like, and also can adopt non-isolated current driving devices
The forward input end CON1 of the signal detection unit 1C is connected in parallel with the reverse input end CON4 of the signal detection unit 2C and then is used as the signal input end P1 of the pulse receiving circuit, and the reverse input end CON2 of the signal detection unit 1C is connected in parallel with the forward input end CON3 of the signal detection unit 2C and then is used as the signal input end P2 of the pulse receiving circuit.
The signal detection units 1C and 2C can adopt optical couplers, magnetically isolated devices or current sensors and other devices, and can realize detection of 0-20 mA current.
When the signal input end P1 receives pulse signals from any path of pulse receiving and transmitting circuits in the transmitting terminal, other paths of pulse receiving and transmitting circuits are in a pulse receiving state, and the signal input end P2 is connected to any path of pulse receiving and transmitting circuits in the transmitting terminal or is suspended; when the number of the secondary cables to be aligned is even, the signal input end P2 is necessarily connected to any one of the pulse receiving circuits in the transmitting terminal, in which case, the pulse signal from the pulse receiving circuit in the transmitting terminal flows into the forward input end CON1 of the signal detecting unit 1C through the P1 terminal, flows out to the P2 through the reverse input end CON2 of the signal detecting unit 1C, and flows back to the pulse receiving circuit in the transmitting terminal through the secondary cable. At this time, the signal detection unit 1C outputs the pulse signal SIG1 to the processor B, and the processor B determines the corresponding serial number of the secondary cable connected to the P1 terminal in the transmitting terminal by detecting the time width of the SIG1 pulse, and the signal detection unit 2C does not output the pulse signal.
Similarly, when the signal input end P2 receives the pulse signal from any one of the pulse receiving and transmitting circuits in the transmitting terminal, the other pulse receiving and transmitting circuits are in a pulse receiving state, the signal input end P1 is necessarily connected to any one of the pulse receiving and transmitting circuits in the transmitting terminal, the pulse signal from the pulse receiving and transmitting circuit in the transmitting terminal flows into the forward input end CON3 of the signal detecting unit 2C through the P2 terminal, flows out to P1 through the reverse input end CON4 of the signal detecting unit 2C, and flows back to the pulse receiving circuit in the transmitting terminal through the secondary cable. At this time, the signal detection unit 2C outputs the pulse signal SIG2 to the processor B, and the processor B determines the corresponding serial number of the secondary cable connected to the P2 terminal in the transmitting terminal by detecting the time width of the SIG2 pulse, and the signal detection unit 1C does not output the pulse signal.
When the number of the secondary cables to be aligned is odd, the pulse receiving circuit connected with the last secondary cable cannot form a current loop with any pulse receiving and transmitting circuit in the transmitting terminal, and the serial number of the cable can be determined by an elimination method.
Similarly, the transmitting terminal and the receiving terminal form a current loop through the existing secondary cable, the receiving terminal judges the corresponding relation between the transmitting terminal and the secondary cable of the receiving terminal by detecting the pulse time sent by the transmitting terminal, and a display module in the receiving terminal displays the corresponding relation between the secondary cable, so that the secondary alignment function is realized.
The foregoing disclosure is merely illustrative of some embodiments of the invention, but the embodiments are not limited thereto and variations within the scope of the invention will be apparent to those skilled in the art.
Claims (2)
1. The secondary wiring alignment device is characterized by comprising a sending terminal and a receiving terminal;
the transmitting terminal comprises a processor A and a plurality of pulse receiving and transmitting circuits, each pulse receiving and transmitting circuit is respectively connected with one end of one cable, the pulse receiving and transmitting circuits are sequentially in a pulse transmitting state under the control of the processor A, the types of pulses transmitted by each pulse receiving and transmitting circuit are different, meanwhile, the pulse receiving and transmitting circuits which are not in the pulse transmitting state are in a pulse receiving state, and the serial number of each cable corresponds to one type of pulse;
the receiving terminal comprises a processor B, a plurality of pulse receiving circuits and a display module, wherein the other ends of every two cables are respectively connected to one pulse receiving circuit, each pulse receiving circuit transmits pulses to the processor B after receiving the pulses, and the processor judges that the cables with corresponding serial numbers are in a connected state according to the types of the received pulses and displays the serial numbers of the connected cables on the display module;
the types of the pulses sent by the pulse receiving and transmitting circuit are distinguished through pulse widths, and each pulse width corresponds to one pulse type;
the pulse width values of the pulses sent by all the pulse receiving and transmitting circuits are in an arithmetic progression from small to large;
the period of each pulse receiving and transmitting circuit in a pulse transmitting state is consistent, and the period is larger than the maximum value of the pulse width value;
the pulse receiving circuit comprises two signal detection units which are connected in parallel in an anti-parallel mode, the output end of each signal detection unit is connected with the processor B in a signal mode, and the cables are respectively connected to connecting wires connected with the two signal detection units in parallel;
when the number of the cables is odd, firstly determining the cables which are already connected to the pulse receiving circuit, and finally obtaining the cables which are not connected to the pulse receiving circuit;
the number of the pulse receiving circuits in the transmitting terminal is between 2 and 255, and the number of the pulse receiving circuits in the receiving terminal is between 2 and 255;
the signal detection unit is an optical coupler, a magnetically isolated device or a current sensor;
the number of pulse transceiving circuits in the transmitting terminal is not necessarily equal to twice the number of pulse receiving circuits in the receiving terminal.
2. A secondary wiring alignment device as in claim 1, wherein the display module is a display.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010278751.5A CN111413648B (en) | 2020-04-10 | 2020-04-10 | Secondary wiring alignment device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010278751.5A CN111413648B (en) | 2020-04-10 | 2020-04-10 | Secondary wiring alignment device |
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| CN111413648A CN111413648A (en) | 2020-07-14 |
| CN111413648B true CN111413648B (en) | 2023-07-18 |
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| CN202010278751.5A Active CN111413648B (en) | 2020-04-10 | 2020-04-10 | Secondary wiring alignment device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112435766B (en) * | 2020-11-13 | 2024-04-30 | 中广核工程有限公司 | Nuclear power station containment leak rate measurement network precision measurement system |
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| US4418312A (en) * | 1981-10-23 | 1983-11-29 | Bell Telephone Laboratories, Incorporated | Apparatus for testing multi-conductor cables |
| RU2665013C1 (en) * | 2017-08-03 | 2018-08-24 | Публичное акционерное общество завод "Красное знамя" | Device for determination of the cable core number |
| RU2667685C1 (en) * | 2017-04-20 | 2018-09-24 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Омский государственный университет путей сообщения" | Device for determining cable number |
| CN208156118U (en) * | 2018-03-28 | 2018-11-27 | 黄峰 | A kind of secondary wire core checking device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2044075U (en) * | 1988-09-21 | 1989-09-06 | 董梁 | Cable matching device |
| CN2898844Y (en) * | 2006-04-29 | 2007-05-09 | 比亚迪股份有限公司 | Electric cable signal identifier |
| CN104155570A (en) * | 2014-07-09 | 2014-11-19 | 国家电网公司 | Cable checking device |
| CN206369780U (en) * | 2016-12-12 | 2017-08-01 | 嘉兴市恒欣电力建设有限公司 | One kind control electrical cable intelligent alignment device |
| CN207832941U (en) * | 2017-12-19 | 2018-09-07 | 国网安徽无为县供电有限责任公司 | Cable sorter |
| CN109358258A (en) * | 2018-09-14 | 2019-02-19 | 国网福建省电力有限公司 | Intelligent secondary circuit cable alignment device |
| CN110244166A (en) * | 2019-07-01 | 2019-09-17 | 中冶宝钢技术服务有限公司 | A kind of cable checking instrument and cable school line method |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4418312A (en) * | 1981-10-23 | 1983-11-29 | Bell Telephone Laboratories, Incorporated | Apparatus for testing multi-conductor cables |
| RU2667685C1 (en) * | 2017-04-20 | 2018-09-24 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Омский государственный университет путей сообщения" | Device for determining cable number |
| RU2665013C1 (en) * | 2017-08-03 | 2018-08-24 | Публичное акционерное общество завод "Красное знамя" | Device for determination of the cable core number |
| CN208156118U (en) * | 2018-03-28 | 2018-11-27 | 黄峰 | A kind of secondary wire core checking device |
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