CN111404490A - Mixed continuous Doherty power amplifier - Google Patents

Mixed continuous Doherty power amplifier Download PDF

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Publication number
CN111404490A
CN111404490A CN202010219010.XA CN202010219010A CN111404490A CN 111404490 A CN111404490 A CN 111404490A CN 202010219010 A CN202010219010 A CN 202010219010A CN 111404490 A CN111404490 A CN 111404490A
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power amplifier
matching network
peak
carrier
output
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杜逵
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Shanghai Mingtai Electronic Technology Co ltd
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Shanghai Mingtai Electronic Technology Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/04Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers
    • H03F1/06Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators
    • H03F1/07Doherty-type amplifiers

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  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a mixed continuous Doherty power amplifier, which comprises an equal power divider for dividing a radio frequency signal into multiple paths, a carrier power amplifier module taking a double-impedance matching network as an output matching network, a load modulation peak power amplifier module for the carrier power amplifier in a power back-off region, the double-impedance matching network and a back matching network.

Description

Mixed continuous Doherty power amplifier
Technical Field
The invention relates to the field of amplifiers, in particular to a mixed continuous Doherty power amplifier.
Background
Two types of typical high-efficiency power amplifiers are a class B power amplifier and a class F power amplifier. The class B amplifier improves the efficiency by reducing the conduction angle of the amplifier, and the class F power amplifier further controls harmonic waves on the basis of the class B so that the voltage and current waveforms of the amplifier are staggered in one clock cycle, thereby reducing the loss of an amplifier tube and improving the efficiency. In 2017, Qinghua Tang from the university of science and technology in Huazhong integrates hybrid continuous F and inverse F power amplifiers, and finally a power amplifier across octaves is designed.
A Doherty Power Amplifier (DPA) that can maintain high efficiency also at the time of power back-off is another research hotspot. The traditional Doherty power amplifier is influenced by a quarter-wavelength microstrip transmission line, input power distribution, output power synthesis and the like, and the working bandwidth of the traditional Doherty power amplifier is always narrow. In 2016, the Jingzhou Pang from the university of electronic technology in China replaces the traditional matching network with the post-matching network and the low-order impedance transformation network, so that the working frequency band of the Doherty power amplifier is widened.
At present, the traditional design method only can achieve high efficiency and sacrifice bandwidth, and an improvement is provided aiming at reducing the working bandwidth limitation of the traditional Doherty power amplifier.
Disclosure of Invention
The present invention is directed to a hybrid continuous Doherty power amplifier, which solves the above problems in the prior art.
In order to achieve the purpose, the invention provides the following technical scheme:
a mixed continuous Doherty power amplifier comprises an equal power divider, a carrier power amplifier module, a peak power amplifier module, a double-impedance matching network and a rear matching network, wherein the equal power divider is used for dividing one path of radio frequency signals into multiple paths, the carrier power amplifier module takes a double-impedance matching network as an output matching network, the peak power amplifier module carries out load modulation on the carrier power amplifier module in a power back-off area, the double-impedance matching network and the rear matching network are arranged in the power back-off area, and the output end of the equal power divider is divided into two paths which are respectively connected with the input ends; the carrier power amplifier module is formed by connecting a phase compensation line, a carrier input matching network, a carrier amplifier and a carrier output matching network in series in sequence; the peak power amplifier module comprises a peak compensation line, a peak input matching network, a peak amplifier and a peak output matching network, wherein the peak input matching network, the peak amplifier and the peak output matching network are sequentially connected in series with the peak compensation line; the output ends of the carrier power amplifier module and the peak power amplifier module are connected with the input end of the rear matching network, and the output end of the rear matching network is used as a radio frequency output end.
Preferably, the carrier amplifier adopts a carrier transistor, and the peak power amplifier module adopts a peak transistor.
Preferably, the carrier power amplifier module abandons a quarter-wavelength transmission line, and uses a double-impedance matching network as an output matching network of the carrier power amplifier.
Preferably, the peak power amplifier module matches the optimal input and output impedances at the saturation power point to 50 Ω and 40 Ω, respectively, using load pulling and source pulling techniques. Compared with a carrier power amplifier, the phase adjusting line with characteristic impedance of 40 omega is added at the output matching end of the peak power amplifier, and the phase adjusting line has the function of enabling the impedance seen by the combiner point to the peak power amplifier to be infinite.
Preferably, the quarter-wave transmission line is replaced by a dual impedance matching network and a post-matching network, thereby reducing the limitation of the power amplifier bandwidth. The rear matching circuit mainly adopts a step impedance conversion structure, so that the output impedance of the carrier power amplifier and the peak power amplifier at the combining point is matched to 50 omega.
Preferably, the double impedance matching network is used as an output matching network of the carrier power amplifier.
Preferably, the optimal input and output impedances at the saturation power point are matched to 50 Ω and 40 Ω, respectively, using load and source pulling techniques. The output matching end of the peak power amplifier is added with a phase adjusting line with characteristic impedance of 40 omega.
Preferably, the quarter-wavelength transmission line of the back matching network is replaced by a double-impedance matching network and a back matching network, so that the limitation of the back matching network on the bandwidth of the power amplifier is reduced. The rear matching circuit of the section mainly adopts a step impedance conversion structure, so that the output impedance of the carrier power amplifier and the peak power amplifier at the combining point is matched to 50 omega.
Preferably, a 50 Ω phase compensation line is added at the input end of the carrier power amplifier, the lengths of the compensation lines are adjusted to make the phases of the two output signals close, and finally the two output signals are superposed and output at the combining point.
Preferably, the peak power amplifier is normally biased in class F, the saturated output power can reach 45dBm, the saturated drain efficiency is 64-72%, the drain efficiency at 6dB back-off power is 60-65%, and the gain is all larger than 10 dB.
Compared with the prior art, the invention has the beneficial effects that: aiming at the bandwidth limiting factor of the traditional Doherty power amplifier, the invention utilizes the double-impedance matching network and the post-matching network to expand the bandwidth, enables the carrier power amplifier to work in a mixed continuous F-type working state, and finally designs and processes an improved broadband Doherty power amplifier based on the theory.
Drawings
Fig. 1 is a block diagram of the basic structure of an improved Doherty power amplifier;
FIG. 2 is a schematic diagram of the design of the hybrid continuous harmonic control type carrier power amplifier of FIG. 1;
FIG. 3 is a schematic diagram of the design of the peak power amplifier of FIG. 1;
fig. 4 is a schematic diagram of the design of the back matching circuit of fig. 1.
Fig. 5 is an overall simulation circuit diagram of the improved Doherty power amplifier.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-5, example 1: in the embodiment of the invention, the mixed continuous Doherty power amplifier comprises an equal-division power divider, a carrier power amplifier, a peak power amplifier, a post-matching network and a phase compensation line.
A hybrid continuous-type Doherty power amplifier, characterized by: the power divider comprises an equal power divider used for dividing one path of radio frequency signals into multiple paths, a carrier power amplifier module using a double-impedance matching network as an output matching network, a peak power amplifier module for carrying out load modulation on the carrier power amplifier in a power back-off area, the double-impedance matching network and a rear matching network;
the output end of the equal power divider is divided into two paths which are respectively connected with the input ends of the carrier power amplification module and the peak power amplification module;
the carrier power amplifier module is formed by connecting a phase compensation line, a carrier input matching network, a carrier amplifier and a carrier output matching network in series in sequence; preferably, the carrier amplifier employs a carrier transistor.
The peak power amplifier module comprises a peak compensation line, a peak input matching network, a peak amplifier and a peak output matching network, wherein the peak input matching network, the peak amplifier and the peak output matching network are sequentially connected in series with the peak compensation line; preferably, the peak power amplifier module adopts a peak transistor.
The output ends of the carrier power amplifier module and the peak power amplifier module are connected with the input end of the rear matching network, and the output end of the rear matching network is used as a radio frequency output end.
Embodiment 2 on the basis of embodiment 1, as shown in fig. 2, the idea of dual impedance matching is to match output impedances 2Ropt and Ropt to Z1 and 2Z1 at a power back-off point and a power saturation point, respectively, because Z1 is related to a back-matching network, when the ratio of Z1 to Z L is too large, it is not easy to implement a broadband back-matching design, so the value of Z1 is set to 20 Ω, it should be noted that 2Ropt and Ropt are both output impedances of a current source layer, and in an actual design, an optimal output impedance at a package plane needs to be obtained by using a load pulling technique, and when a gate voltage is Ω -2.8V and a drain voltage is 28V, the optimal output impedances of a carrier power amplifier at the power back-off point and the power saturation point are 13.2+ j1.3 Ω and 15.6+ j2.7 Ω, respectively, and then a microstrip line with a step impedance structure is used to match 13.2+ j1.3 Ω and 15.6+ j2 j2.7 to 20.40 and 20.3 j2.7
Example 3: on the basis of embodiment 1, as shown in fig. 3, the optimal input and output impedances at the saturation power point are matched to 50 Ω and 40 Ω, respectively, using load pulling and source pulling techniques. Compared with a carrier power amplifier, the phase adjusting line with characteristic impedance of 40 omega is added at the output matching end of the peak power amplifier, and the phase adjusting line has the function of enabling the impedance seen by the combiner point to the peak power amplifier to be infinite.
Example 4: on the basis of the embodiment 1, as shown in fig. 4, the quarter-wavelength transmission line is replaced by a dual-impedance matching network and a post-matching network, so as to reduce the limit of the power amplifier bandwidth. The rear matching circuit of the section mainly adopts a step impedance conversion structure, so that the output impedance of the carrier power amplifier and the peak power amplifier at the combining point is matched to 50 omega
Example 5: on the basis of embodiment 1, as shown in fig. 5, the overall simulation circuit diagram of the improved Doherty power amplifier integrates an equal power divider, a carrier power amplifier, a peak power amplifier and a post-matching circuit. In the foregoing, it is analyzed in detail that in the active load modulation of the Doherty power amplifier, the phases of the output signals of the carrier power amplifier and the peak power amplifier must be the same or similar to each other, so that the drain efficiency of the power amplifier in the power backoff region can be improved, therefore, a section of 50 Ω phase compensation line is added at the input end of the carrier power amplifier, the phases of the two output signals are similar by adjusting the length of the compensation line, and finally, the two output signals are output in a superposition manner at the combining point.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims (7)

1. A mixed continuous Doherty power amplifier comprises an equal power divider for dividing a radio frequency signal into multiple paths, a carrier power amplifier module taking a double-impedance matching network as an output matching network, a peak power amplifier module for carrying out load modulation on the carrier power amplifier module in a power back-off region, a double-impedance matching network and a rear matching network, and is characterized in that the output end of the equal power divider is divided into two paths which are respectively connected with the input ends of the carrier power amplifier module and the peak power amplifier module; the carrier power amplifier module is formed by connecting a phase compensation line, a carrier input matching network, a carrier amplifier and a carrier output matching network in series in sequence; the peak power amplifier module comprises a peak compensation line, a peak input matching network, a peak amplifier and a peak output matching network, wherein the peak input matching network, the peak amplifier and the peak output matching network are sequentially connected in series with the peak compensation line; the output ends of the carrier power amplifier module and the peak power amplifier module are connected with the input end of the rear matching network, and the output end of the rear matching network is used as a radio frequency output end.
2. The hybrid continuous-type Doherty power amplifier of claim 1, wherein the carrier amplifier employs a carrier transistor, and the peak power amplifier module employs a peak transistor.
3. The Doherty power amplifier of claim 1, wherein a 50 Ω phase compensation line is added to the input end of the carrier power amplifier module, the length of the compensation line is adjusted to make the phases of the two output signals close, and finally the two output signals are superposed and output at the combining point.
4. The hybrid continuous Doherty power amplifier of claim 1, wherein the post-matching circuit adopts a step impedance transformation structure to match output impedances of the carrier power amplifier and the peak power amplifier at a combining point to 50 Ω.
5. The hybrid continuous-type Doherty power amplifier of claim 1, wherein the carrier power amplifier module discards a quarter-wavelength transmission line and uses a dual-impedance matching network as an output matching network of the carrier power amplifier.
6. The hybrid continuous-type Doherty power amplifier of claim 1, wherein the peak power amplifier module matches the optimal input and output impedances at the saturation power point to 50 Ω and 40 Ω, respectively, using load pulling and source pulling techniques.
7. The hybrid continuous-type Doherty power amplifier of claim 1 wherein the quarter-wavelength transmission line is replaced by a dual-impedance matching network and a post-matching network.
CN202010219010.XA 2020-03-25 2020-03-25 Mixed continuous Doherty power amplifier Pending CN111404490A (en)

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
CN111865234A (en) * 2020-07-31 2020-10-30 中国科学院微电子研究所 Compact broadband Doherty power amplifier
CN113517860A (en) * 2021-04-23 2021-10-19 天津朗波微电子有限公司 Method for self-adaptive impedance matching of Doherty power amplifier
WO2023000693A1 (en) * 2021-07-21 2023-01-26 华南理工大学 High-efficiency broadband multi-mode doherty amplifier and construction method
CN115800936A (en) * 2022-12-08 2023-03-14 康希通信科技(上海)有限公司 Amplifying circuit, wireless communication module, and electronic device

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CN110266275A (en) * 2019-07-23 2019-09-20 杭州电子科技大学富阳电子信息研究院有限公司 A kind of broadband Doherty power amplifier of continuous inverse F class and the mixing of J class

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111865234A (en) * 2020-07-31 2020-10-30 中国科学院微电子研究所 Compact broadband Doherty power amplifier
CN111865234B (en) * 2020-07-31 2023-03-28 中国科学院微电子研究所 Compact broadband Doherty power amplifier
CN113517860A (en) * 2021-04-23 2021-10-19 天津朗波微电子有限公司 Method for self-adaptive impedance matching of Doherty power amplifier
WO2023000693A1 (en) * 2021-07-21 2023-01-26 华南理工大学 High-efficiency broadband multi-mode doherty amplifier and construction method
CN115800936A (en) * 2022-12-08 2023-03-14 康希通信科技(上海)有限公司 Amplifying circuit, wireless communication module, and electronic device

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