CN111403832A - Extensible battery protection method - Google Patents
Extensible battery protection method Download PDFInfo
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- CN111403832A CN111403832A CN202010244327.9A CN202010244327A CN111403832A CN 111403832 A CN111403832 A CN 111403832A CN 202010244327 A CN202010244327 A CN 202010244327A CN 111403832 A CN111403832 A CN 111403832A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/4207—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells for several batteries or cells simultaneously or sequentially
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M2010/4278—Systems for data transfer from batteries, e.g. transfer of battery parameters to a controller, data transferred between battery controller and main controller
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention discloses an expandable battery protection method, belongs to the field of lithium batteries, and aims to solve the problems of high cost and high power consumption of the existing lithium battery cascade hardware. The invention controls at most 5n cascade lithium batteries by n protection chips; the method comprises the following steps: connecting n protection chips in series, wherein the 1 st protection chip is the uppermost chip, the nth protection chip is the lowermost chip, the rest are intermediate chips, and any two adjacent protection chips are master-slave equipment; the configuration signal of the main controller is transmitted from the nth protection chip to the 1 st protection chip step by step to control the on-off state of a charge-discharge loop of any one protection chip, and the battery parameter data from the 1 st protection chip to the n-1 st protection chip are transmitted to the nth protection chip step by step.
Description
Technical Field
The invention relates to a lithium battery cascade control technology, and belongs to the field of lithium batteries.
Background
In the rapid development of the information and electronics era, lithium batteries are widely applied to mobile phones and light electric vehicles due to good characteristics, but the lithium batteries are active in chemical characteristics, and if overcharge, overdischarge or overcurrent occurs in the use process of the batteries, risks such as battery explosion and the like are caused, so that a matched battery management chip is required to protect the batteries during operation. The rated voltage of the single lithium battery is 3.6V, which can not meet the requirement of high-voltage power supply occasions, so that a plurality of lithium batteries are required to be connected in series for use. However, most lithium battery protection chips in the market generally support 5 batteries connected in series, so that a single lithium battery chip cannot meet the protection requirement on occasions needing the voltage far exceeding 5 batteries for working, such as electric tools. One solution is to expand a single chip to support more batteries for serial use, but the design complexity of the single chip is increased, the requirement on the withstand voltage of the process is higher, and the cost of the chip is greatly increased; meanwhile, in the more common application of less than 5 batteries, a large amount of area is wasted, and the cost is increased sharply for chip manufacturers. The more common treatment is to cascade a plurality of lithium battery protection chips, and each chip can realize the series connection of a plurality of lithium batteries in a cascading connection mode, so that the area is saved, and different requirements of the market can be met.
Communication in the battery management system involves each battery protection chip, and interaction of data between the protection chip and the main controller. The conventional cascade scheme has several problems: (1) when in cascade connection, the chip selection signal of the host is utilized to allocate an address to each battery protection chip, so as to control different chips to transmit data, and the overhead of hardware is increased along with the increase of the number of the chips. (2) Because the design of each chip is completely consistent, each chip can carry out current detection, but the actual current detection is only carried out at the lowest layer, so that when cascade communication is carried out, a large amount of power consumption is wasted on detection functions which are not required to be carried out by cascading chips at the upper layer.
Disclosure of Invention
The invention aims to solve the problems of high cost and high power consumption of the traditional lithium battery cascade hardware and provides an extensible battery protection method.
The expandable battery protection method of the invention controls at most 5n cascaded lithium batteries by n protection chips; the method comprises the following steps:
connecting n protection chips in series, wherein the 1 st protection chip is the uppermost chip, the nth protection chip is the lowermost chip, the rest are intermediate chips, and any two adjacent protection chips are master-slave equipment; the configuration signal of the main controller is transmitted from the nth protection chip to the 1 st protection chip step by step to control the on-off state of a charge-discharge loop of any one protection chip, and the battery parameter data from the 1 st protection chip to the n-1 st protection chip are transmitted to the nth protection chip step by step;
the lowest layer chip: the device is used for receiving the configuration signal sent by the main controller and all returned battery parameter data, serving as a main device of cascade communication, and transmitting the configuration signal to the (n-1) th protection chip belonging to the middle layer chip; simultaneously receiving all battery parameter data returned by the (n-1) th protection chip, and returning the battery parameter data to the main controller for updating the configuration signal;
an intermediate layer chip: the device is used for being responsible for data transmission, is used as a main device and a slave device of cascade communication, receives a control command of a lower chip and sends the control command to an upper chip; transmitting the battery parameter data of the chip of the layer and the battery parameter data returned from the chip of the upper layer to the chip of the lower layer;
top chip: and as a slave device of the cascade communication, after receiving a command transmitted by the 2 nd protection chip belonging to the middle layer chip, transmitting the battery parameter data of the chip to the 2 nd protection chip.
Preferably, the uppermost chip and the middle chip turn off the current detection module.
Preferably, the lowest chip closes the slave device of the cascade communication, and the highest chip closes the master device of the cascade communication.
Preferably, the protection chip is internally provided with a memory, the memory contains two control bits, the protection chips are classified through the two control bits, the control bit is 01 to indicate that the current chip is the lowest chip, the control bit is 10 to indicate that the current chip is the middle chip, the control bit is 11 to indicate that the current chip is the top chip, and the control bit is 00 to indicate that the current chip does not support cascade connection.
Preferably, the communication process of two adjacent protection chips is as follows:
step one, a cascade communication link establishment process: the method comprises the steps that a main device in each protection chip, which is responsible for cascade communication, sends a command to a slave device of an upper chip at fixed intervals to start data transmission, each data transmission is used as a complete transaction and comprises a start bit, an address bit, a data bit and a check bit, communication data is low level by default, and the detection of enough high levels indicates that the start bit is sampled;
step two, data transmission, firstly, the main device needs to send an address and a read-write control bit, if the command is a write command, the main device also needs to send written data, namely configuration signals from the main controller, including balance control, working mode configuration, module working enabling control and detection parameter control; if the command is a read command, waiting for the slave equipment to return battery parameter data such as voltage and temperature of the chip;
step three, diagnosing cascade communication, wherein in the process of cascade communication, whether a communication data format, an address and a cyclic redundancy check code are correct or not is judged for each communication, if a fault occurs, the communication is determined to be failed, and after the chip starts communication, if n times of communication failures occur in every 2n times of communication, wherein n is more than 2, the communication is determined to be unsuccessful, and a charging and discharging loop is closed;
and step four, after the cascade communication is built, the characteristic parameters of all the batteries can be transmitted to the lowest chip through the cascade ports, and then the main controller is only communicated with the lowest chip, so that the battery management system can be controlled.
The invention has the advantages that: aiming at the cascade of lithium battery protection chips, the invention shields the modules which do not need to work in the chips by using a mode of built-in control bits, and the data generated by different chips are transmitted to the lowest chip step by step through the communication interface, thereby reducing the communication interface with the main controller, realizing the protection of the battery management system on the charging and discharging of the lithium battery on the basis of ensuring that the main controller can accurately obtain the characteristics of each battery, reducing the hardware cost and simultaneously reducing the power consumption of the system during working.
Drawings
FIG. 1 is a schematic diagram of an expandable battery protection method according to the present invention;
fig. 2 is a chip communication flow diagram.
Detailed Description
The first embodiment is as follows: referring to fig. 1, a schematic diagram of a cascade connection during operation of a battery management system is shown, where the schematic diagram includes a main controller and a plurality of battery protection chips, and each of the chips can complete collection of battery voltage characteristic data and transmission of the data. Controlling at most 5n cascaded lithium batteries by n protection chips; the method comprises the following steps:
connecting n protection chips in series, wherein each protection chip controls 5 lithium batteries, the 1 st protection chip is the uppermost chip (located on the positive electrode side of the cascade lithium battery), the nth protection chip is the lowermost chip (located on the negative electrode side of the cascade lithium battery), the rest are intermediate layer chips, and any two adjacent protection chips are master-slave devices; the configuration signal of the main controller is transmitted from the nth protection chip to the 1 st protection chip step by step to control the on-off state of a charge-discharge loop of any one protection chip, and the battery parameter data from the 1 st protection chip to the n-1 st protection chip are transmitted to the nth protection chip step by step;
the lowest layer chip: the device is used for receiving the configuration signal sent by the main controller and all returned battery parameter data, serving as a main device of cascade communication, and transmitting the configuration signal to the (n-1) th protection chip belonging to the middle layer chip; simultaneously receiving all battery parameter data returned by the (n-1) th protection chip, and returning the battery parameter data to the main controller for updating the configuration signal;
an intermediate layer chip: the device is used for being responsible for data transmission, is used as a main device and a slave device of cascade communication, receives a control command of a lower chip and sends the control command to an upper chip; transmitting the battery parameter data of the chip of the layer and the battery parameter data returned from the chip of the upper layer to the chip of the lower layer;
top chip: and as a slave device of the cascade communication, after receiving a command transmitted by the 2 nd protection chip belonging to the middle layer chip, transmitting the battery parameter data of the chip to the 2 nd protection chip.
The main controller only communicates data with the lowest chip, an interface for communicating with other chips is arranged in each chip, the lower chip is used as a main device, the upper chip is used as a slave device, the main controller sends a configuration signal to the lowest chip and stores the configuration signal in a register of the lower chip, the lower chip starts cascade communication, sends a command to the upper chip and sends a start bit first, then address and data bits are carried out, the data bits comprise configuration signals of the main controller to each chip, battery parameters transmitted to the lower layer by the upper layer chip, finally check bits are carried to the upper layer chip step by step, after the upper layer chip analyzes the command, corresponding data are returned and then transmitted to the lower layer chip step by step, therefore, the data of all the batteries are stored in the lowest chip, and the main controller reads the data of the lowest chip to obtain the characteristic data of each battery. When the chip works for the first time, the lower chip starts the cascade channel to communicate with the middle chip, and then the middle chip starts to communicate with the upper chip.
The protection chip is internally provided with a memory, two control bits are contained in the memory, the protection chips are classified through the two control bits, the control bit is 01 to indicate that the current chip is the lowest chip, the control bit is 10 to indicate that the current chip is the middle chip, the control bit is 11 to indicate that the current chip is the uppermost chip, and the control bit is 00 to indicate that the current chip does not support cascade connection.
The working mode of the current chip is determined through the two control bits, so that the module which does not need to work in the chip is shielded, the power consumption is reduced, and the method specifically comprises the following steps: the uppermost chip and the middle chip close the current detection module. And the lowest chip closes the slave equipment of the cascade communication, and the highest chip closes the master equipment of the cascade communication.
The special interface for communicating with other chips is arranged in each chip, the communication of the cascade data is carried out according to a fixed interval, after the chip is reset, the communication is carried out for 4 times, whether the cascade channel can be correctly transmitted is detected, then the normal cascade data transmission is started, and an error detection mechanism is arranged in the communication interface, so that the stability and the reliability of the communication data are ensured.
Referring to fig. 2, the communication process between two adjacent protection chips is as follows:
step one, a cascade communication link establishment process: the method comprises the steps that a main device in each protection chip, which is responsible for cascade communication, sends a command to a slave device of an upper chip at fixed intervals to start data transmission, each data transmission is used as a complete transaction and comprises a start bit, an address bit, a data bit and a check bit, communication data is low level by default, and the detection of enough high levels indicates that the start bit is sampled;
step two, data transmission, firstly, the main device needs to send an address and a read-write control bit, if the command is a write command, the main device also needs to send written data, namely configuration signals from the main controller, including balance control, working mode configuration, module working enabling control and detection parameter control; if the command is a read command, waiting for the slave equipment to return battery parameter data such as voltage and temperature of the chip;
step three, diagnosing cascade communication, wherein in the process of cascade communication, whether a communication data format, an address and a cyclic redundancy check code are correct or not is judged for each communication, if a fault occurs, the communication is determined to be failed, and after the chip starts communication, if n times of communication failures occur in every 2n times of communication, wherein n is more than 2, the communication is determined to be unsuccessful, and a charging and discharging loop is closed; a communication guarantee mechanism is established, and a redundancy method is adopted.
And step four, after the cascade communication is built, the characteristic parameters of all the batteries can be transmitted to the lowest chip through the cascade ports, and then the main controller is only communicated with the lowest chip, so that the battery management system can be controlled.
Claims (5)
1. An expandable battery protection method is characterized in that at most 5n cascaded lithium batteries are controlled by n protection chips; the method is characterized by comprising the following steps:
connecting n protection chips in series, wherein the 1 st protection chip is the uppermost chip, the nth protection chip is the lowermost chip, the rest are intermediate chips, and any two adjacent protection chips are master-slave equipment; the configuration signal of the main controller is transmitted from the nth protection chip to the 1 st protection chip step by step to control the on-off state of a charge-discharge loop of any one protection chip, and the battery parameter data from the 1 st protection chip to the n-1 st protection chip are transmitted to the nth protection chip step by step;
the lowest layer chip: the device is used for receiving the configuration signal sent by the main controller and all returned battery parameter data, serving as a main device of cascade communication, and transmitting the configuration signal to the (n-1) th protection chip belonging to the middle layer chip; simultaneously receiving all battery parameter data returned by the (n-1) th protection chip, and returning the battery parameter data to the main controller for updating the configuration signal;
an intermediate layer chip: the device is used for being responsible for data transmission, is used as a main device and a slave device of cascade communication, receives a control command of a lower chip and sends the control command to an upper chip; transmitting the battery parameter data of the chip of the layer and the battery parameter data returned from the chip of the upper layer to the chip of the lower layer;
top chip: and as a slave device of the cascade communication, after receiving a command transmitted by the 2 nd protection chip belonging to the middle layer chip, transmitting the battery parameter data of the chip to the 2 nd protection chip.
2. The scalable battery protection method of claim 1, wherein the top chip and the middle chip turn off the current detection module.
3. The scalable battery protection method of claim 1, wherein a lowest chip shuts down a slave device of the cascade communication and a highest chip shuts down a master device of the cascade communication.
4. The scalable battery protection method according to claim 1, wherein the protection chip has a built-in memory, and contains two control bits, and the protection chips are classified by the two control bits, a control bit of 01 indicates that the current chip is the lowest chip, a control bit of 10 indicates that the current chip is the middle chip, a control bit of 11 indicates that the current chip is the top chip, and a control bit of 00 indicates that the current chip does not support cascading.
5. The scalable battery protection method according to claim 4, wherein the communication process between two adjacent protection chips is as follows:
step one, a cascade communication link establishment process: the method comprises the steps that a main device in each protection chip, which is responsible for cascade communication, sends a command to a slave device of an upper chip at fixed intervals to start data transmission, each data transmission is used as a complete transaction and comprises a start bit, an address bit, a data bit and a check bit, communication data is low level by default, and the detection of enough high levels indicates that the start bit is sampled;
step two, data transmission, firstly, the main device needs to send an address and a read-write control bit, if the command is a write command, the main device also needs to send written data, namely configuration signals from the main controller, including balance control, working mode configuration, module working enabling control and detection parameter control; if the command is a read command, waiting for the slave equipment to return battery parameter data such as voltage and temperature of the chip;
step three, diagnosing cascade communication, wherein in the process of cascade communication, whether a communication data format, an address and a cyclic redundancy check code are correct or not is judged for each communication, if a fault occurs, the communication is determined to be failed, and after the chip starts communication, if n times of communication failures occur in every 2n times of communication, wherein n is more than 2, the communication is determined to be unsuccessful, and a charging and discharging loop is closed;
and step four, after the cascade communication is built, the characteristic parameters of all the batteries can be transmitted to the lowest chip through the cascade ports, and then the main controller is only communicated with the lowest chip, so that the battery management system can be controlled.
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Cited By (1)
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Application publication date: 20200710 |
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