CN111402788A - Pixel circuit and display panel - Google Patents
Pixel circuit and display panel Download PDFInfo
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- CN111402788A CN111402788A CN202010268321.5A CN202010268321A CN111402788A CN 111402788 A CN111402788 A CN 111402788A CN 202010268321 A CN202010268321 A CN 202010268321A CN 111402788 A CN111402788 A CN 111402788A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- Physics & Mathematics (AREA)
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- Electroluminescent Light Sources (AREA)
- Control Of El Displays (AREA)
Abstract
The application discloses a pixel circuit, which comprises a light-emitting device, a driving unit, a writing unit, a storage unit and a compensation unit; the pixel circuit provided by the application can dynamically and linearly adjust the threshold voltage of the driving unit through the compensation unit, the reference signal can compensate positive and negative drift of the threshold voltage, and the problem that the internal compensation circuit can only compensate unidirectional drift of the threshold voltage is solved.
Description
Technical Field
The application relates to the technical field of display, in particular to a self-luminous display technology, and specifically relates to a pixel circuit and a display panel.
Background
Compared with the conventional voltage-driven L CD (L i quick Crystal Display, lcd), the current-driven Display is sensitive to the electrical variation of the driving TFT (Thin Film Transistor), and the uniformity of the threshold voltage (Vth) and the Vth shift under Stress (Stress) both affect the accuracy and uniformity of the picture Display.
However, these internal compensation circuits can compensate only the one-way drift of the threshold voltage, and cannot compensate the positive and negative drifts of the threshold voltage, which seriously affects the uniformity of the screen display.
Disclosure of Invention
The application provides a pixel circuit, and an internal compensation circuit for solving the problem that only threshold voltage can be unidirectionally drifted.
In a first aspect, the present application provides a pixel circuit including a light emitting device, a driving unit, a writing unit, a storage unit, and a compensation unit; the light-emitting device is connected with a first power supply signal and used for pixel display; the driving unit is connected with the light-emitting device and used for controlling the current intensity flowing through the light-emitting device; the writing unit is connected with the driving unit and is used for writing a data signal according to the scanning signal of the previous frame; the storage unit is connected with the writing unit, the driving unit and the second power supply signal and used for storing and maintaining the threshold voltage of the driving unit; and the compensation unit is connected with the driving unit and used for dynamically and linearly adjusting the threshold voltage according to the detection signal so as to configure the reference signal to compensate positive and negative drifts of the threshold voltage.
Based on the first aspect, in a first implementation manner of the first aspect, the pixel circuit further includes: and the pre-storage unit is connected with the writing unit and the driving unit and is used for pre-storing the data signal according to the scanning signal so as to prolong the charging time of the corresponding pixel.
In a second implementation form of the first aspect, the driving unit comprises a first thin film transistor configured as an N-type double gate; the drain electrode of the first thin film transistor is connected with the output end of the light-emitting device and the compensation unit; the source electrode of the first thin film transistor is connected with a second power supply signal and the storage unit; the top gate of the first thin film transistor is connected with the compensation unit, the writing unit and the storage unit; the bottom gate of the first thin film transistor is connected with the compensation unit.
In a third implementation form of the first aspect, based on the second implementation form of the first aspect, the writing unit comprises a second thin film transistor; the drain electrode of the second thin film transistor is connected with a data signal; the grid electrode of the second thin film transistor is connected with a scanning signal; the source of the second thin film transistor is connected with the top gate of the first thin film transistor.
In a fourth implementation form of the first aspect, based on the third implementation form of the first aspect, the memory cell comprises a first capacitor; the first end of the first capacitor is connected with the top gate of the first thin film transistor and the source electrode of the second thin film transistor; the second end of the first capacitor is connected with the source electrode of the first thin film transistor and a second power supply signal.
In a fifth implementation manner of the first aspect, based on the fourth implementation manner of the first aspect, the compensation unit includes a third thin film transistor, a fourth thin film transistor, and a second capacitor; the detection signal is connected with the grid electrode of the third thin film transistor and the grid electrode of the fourth thin film transistor; the reference signal is connected with the drain electrode of the third thin film transistor; the source electrode of the third thin film transistor is connected with the top gate of the first thin film transistor, the source electrode of the second thin film transistor and the first end of the first capacitor; the drain electrode of the fourth thin film transistor is connected with the drain electrode of the first thin film transistor and the output end of the light-emitting device; the source electrode of the fourth thin film transistor is connected with the bottom gate of the first thin film transistor and the first end of the second capacitor; the second end of the second capacitor is connected with zero potential.
In a sixth implementation manner of the first aspect, based on the fifth implementation manner of the first aspect, the pre-storage unit includes a fifth thin film transistor and a third capacitor; the source electrode of the second thin film transistor is connected with the first end of the third capacitor and the drain electrode of the fifth thin film transistor; the second end of the third capacitor is connected with zero potential; the grid electrode of the fifth thin film transistor is connected with the merging signal; and the source electrode of the fifth thin film transistor is connected with the top gate of the first thin film transistor.
In a seventh implementation form of the first aspect, based on any of the implementation forms of the first aspect, the first power signal and the second power signal are both variable power signals.
In an eighth implementation form of the first aspect, based on any of the preceding implementation forms of the first aspect, the light emitting device is at least any one of an organic light emitting diode, a micro light emitting diode and a sub-millimeter light emitting diode.
In a second aspect, the present application provides a display panel including the pixel circuit in any of the above embodiments.
The pixel circuit provided by the application can dynamically and linearly adjust the threshold voltage of the driving unit through the compensation unit, the reference signal can compensate positive and negative drift of the threshold voltage, and the problem that the internal compensation circuit can only compensate unidirectional drift of the threshold voltage is solved.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
FIG. 1a is a circuit diagram of a diode-connected internal compensation circuit.
FIG. 1b is a schematic diagram of the gate-source voltage difference with time when the threshold voltage is greater than zero shown in FIG. 1 a.
FIG. 1c is a schematic diagram of the gate-source voltage difference with time when the threshold voltage is less than zero shown in FIG. 1 a.
Fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present disclosure.
Fig. 3 is a timing diagram illustrating the operation of the pixel circuit shown in fig. 2.
Fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present disclosure.
Fig. 5 is a timing diagram illustrating the operation of the pixel circuit shown in fig. 4.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
For better understanding of the object of the invention of the present application, a classic Diode-Connect type internal compensation circuit structure shown in fig. 1a will now be described, in which a control tube NT2 connects a Gate and a Drain of a driving tube NT1, and the driving tube NT1 forms a Diode structure when the Gate of the control tube NT2 is given a high potential. As shown in fig. 1b, if the threshold voltage Vth of the driving transistor NT1 is greater than 0V, the Gate terminal voltage is released through the diode structure until the Gate-source voltage difference Vgs of the driving transistor NT1 is equal to the threshold voltage Vth thereof, the on state of the diode structure is cut off, then the threshold voltage Vth of the driving transistor NT1 is detected, and then the subsequent threshold voltage Vth compensation is performed; if Vth <0V, the driving tube NT1 is always in an on state, and as shown in fig. 1c, when the Gate terminal and Source terminal of the driving tube NT1 are equal in potential, that is, when the Gate-Source voltage difference Vgs of the driving tube NT1 is 0V, all the threshold voltages Vth cannot be detected at the Gate terminal, and therefore, when the driving tube NT1 is an N-type thin film transistor, the Diode-Connect type compensation circuit cannot compensate the threshold voltage Vth < 0V.
Based on this, as shown in fig. 2, the present embodiment provides a pixel circuit including a light emitting device 50, a driving unit 10, a writing unit 20, a storage unit 30, and a compensation unit 40; the first power supply signal EVDD is connected to an input terminal of the light emitting device 50, and the light emitting device 50 is used for pixel display; the output end of the light emitting device 50 is connected with the driving unit 10, and the driving unit 10 is used for controlling the current intensity flowing through the light emitting device 50; the output end of the driving unit 10 is connected with a second power supply signal VSS; the output terminal of the write unit 20 is connected to the first control terminal of the driving unit 10 and the input terminal of the storage unit 30, the write unit 20 is configured to control the DATA signal DATA to be written into the storage unit 30 according to the SCAN signal SCAN of the previous frame, the storage unit 30 is configured to store and maintain the threshold voltage of the driving unit 10, and the output terminal of the storage unit 30 is connected to the output terminal of the driving unit 10; the compensation unit 40 is connected to the input terminal, the first control terminal, and the second control terminal of the driving unit 10, and the compensation unit 40 can control the potential of the second control terminal according to the sensing signal SENSE to realize dynamic linear adjustment of the threshold voltage, and can compensate positive and negative drifts of the threshold voltage, that is, positive and negative drifts, by configuring the reference signal VREF.
Therefore, the pixel circuit provided by the embodiment solves the problem that the Diode-Connect type compensation circuit cannot compensate the situation that the threshold voltage is negative, can realize the comprehensive compensation of positive drift and negative drift, has a wide compensation range, and improves the uniformity of display.
It should be noted that the SCAN signal SCAN may be provided by, but not limited to, a GOA circuit, or a gate driver integrated circuit, and in this embodiment, only one SCAN line is used, which may reduce the number of wirings in the panel and reduce the complexity of the design; the SENSE signal SENSE may be provided, but is not limited to, by an external integrated circuit; it can be understood that the first power signal EVDD and the second power signal VSS are both variable power signals, and are not constant voltage power signals, which can meet the requirements of different working stages.
The light emitting device 50 may be, but not limited to, at least one of current self-emission type devices such as an organic light emitting diode, a micro light emitting diode, and a sub-millimeter light emitting diode.
As shown in fig. 4, in one embodiment, the pixel circuit further includes a pre-storing unit 60, wherein the pre-storing unit 60 is connected to the writing unit 20 and the driving unit 10, and is used for pre-storing the DATA signal DATA according to the SCAN signal SCAN, and further maintaining the potential of the first control terminal according to the pre-stored DATA signal DATA under the control of the MERGE signal MERGE, so as to prolong the charging time of the corresponding pixel.
As shown in fig. 2, in one embodiment, the driving unit 10 includes a first thin film transistor T1 configured as an N-type double gate; the drain electrode of the first thin film transistor T1 is connected to the output terminal of the light emitting device 50 and the compensation unit 40; a source electrode of the first thin film transistor T1 is connected to the second power supply signal VSS and the memory cell 30; the top gate of the first thin film transistor T1 is connected to the compensation unit 40, the write unit 20, and the memory unit 30; the bottom gate of the first thin film transistor T1 is connected to the compensation unit 40.
Note that, the first thin film transistor T1 is an N-type double gate thin film transistor; when the bottom gate potential of the first thin film transistor T1 is a negative potential, the threshold voltage of the first thin film transistor T1 is positive; when the bottom gate potential of the first thin film transistor T1 is a positive potential, the threshold voltage of the first thin film transistor T1 is negative.
As shown in fig. 2, in one embodiment, the writing unit 20 includes a second thin film transistor T2; the drain electrode of the second thin film transistor T2 is connected to the DATA signal DATA; the gate electrode of the second thin film transistor T2 is connected to the SCAN signal SCAN; the source of the second thin film transistor T2 is connected to the top gate of the first thin film transistor T1.
As shown in FIG. 2, in one embodiment, the memory cell 30 includes a first capacitance C1; a first end of the first capacitor C1 is connected to the top gate of the first thin film transistor T1 and the source of the second thin film transistor T2; a second terminal of the first capacitor C1 is connected to the source of the first thin film transistor T1 and the second power signal VSS.
As shown in fig. 2, in one embodiment, the compensation unit 40 includes a third thin film transistor T3, a fourth thin film transistor T4, and a second capacitor C2; the sensing signal SENSE is connected to the gate of the third thin film transistor T3 and the gate of the fourth thin film transistor T4; the reference signal VREF is connected to the drain of the third thin film transistor T3; a source of the third thin film transistor T3 is connected to the top gate of the first thin film transistor T1, the source of the second thin film transistor T2, and the first end of the first capacitor C1; a drain electrode of the fourth thin film transistor T4 is connected to the drain electrode of the first thin film transistor T1 and the output terminal of the light emitting device 50; a source of the fourth thin film transistor T4 is connected to a bottom gate of the first thin film transistor T1 and a first end of the second capacitor C2; the second terminal of the second capacitor C2 is connected to zero potential.
As shown in fig. 4, in one embodiment, the pre-storage unit 60 includes a fifth thin film transistor T5 and a third capacitor C3; the source of the second thin film transistor T2 is connected to the first end of the third capacitor C3 and the drain of the fifth thin film transistor T5; the second end of the third capacitor C3 is connected to zero potential; the gate of the fifth thin film transistor T5 is connected to the MERGE signal MERGE; the source of the fifth thin film transistor T5 is connected to the top gate of the first thin film transistor T1.
It should be noted that, in the pixel circuit provided in this embodiment, when the fourth thin film transistor T4 is turned on, the first thin film transistor T1 forms a diode. The second capacitor C2 is used for storing the bottom gate potential of the first thin film transistor T1, i.e., storing the threshold voltage; the third capacitor C3 is used to pre-store the DATA signal DATA in the previous frame; the first capacitor C1 is used for the gate-source potential difference Vgs of the first thin film transistor T1 to maintain the gate-source potential difference Vgs of the first thin film transistor T1 at the time of light emission.
As shown in fig. 3, the operation timing of the pixel circuit provided in this embodiment includes the following stages:
initialization phase INI: the first power signal EVDD is at a low potential, the second power signal VSS is at a high potential, the light emitting device 50 does not emit light, the sensing signal SENSE is at a high potential, the third thin film transistor T3 and the fourth thin film transistor T4 are both turned on, the reference signal VREF is at a positive potential, the first thin film transistor T1 is turned on, and the second power signal VSS sequentially passes through the first thin film transistor T1 and the fourth thin film transistor T4 to charge the second capacitor C2 to a high potential, that is, the bottom gate potential of the first thin film transistor T1 is at a high potential at this time.
Compensation phase COM: the first power signal EVDD is at a low potential, the second power signal VSS is at a low potential, the light emitting device 50 does not emit light, the sensing signal SENSE is at a high potential, the reference signal VREF changes to a negative potential, the third thin film transistor T3 and the fourth thin film transistor T4 are both turned on, and since the threshold voltage of the first thin film transistor T1 is modulated to a negative value and the potential of the reference signal VREF is still higher than the threshold voltage of the first thin film transistor T1, the first thin film transistor T1 is turned on at this time, and a diode connection state is formed; the bottom gate potential of the first thin film transistor T1 is connected to the second power signal VSS through the fourth thin film transistor T4 and the first thin film transistor T1 in sequence for discharging, the bottom gate potential of the first thin film transistor T1 continuously decreases, the threshold voltage of the first thin film transistor T1 gradually increases until the threshold voltage of the first thin film transistor T1 increases to be equal to the potential of the reference signal VREF, at this time, the first thin film transistor T1 is turned off, the SENSE signal SENSE becomes a low potential, the compensation is completed, the fourth thin film transistor T4 is turned off, and the second capacitor C2 stores the bottom gate potential of the corresponding first thin film transistor T1.
Writing stage WR: the SCAN signal SCAN of the previous frame is turned on line by line and the DATA signal DATA is written to the first capacitor C1; as shown in fig. 5, the MERGE signal MERGE is high, the fifth tft T5 is turned on, and the DATA signal DATA is pre-stored on the third capacitor C3;
and (3) luminescence phase EM: the first power signal EVDD becomes high, and the light emitting device 50 starts emitting light; the MERGE signal MERGE may also be selected as a high voltage to turn on the fifth tft T5, and the third capacitor C3 may further extend the top gate voltage of the first tft T1 to maintain the on state of the first tft T1; the formula of the current flowing through the light emitting device 50 is:
α represents the transmission efficiency of the DATA signal DATA to the top gate of the first TFT T1.
It should be noted that, in the pixel circuit provided in this embodiment, the second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4 and the fifth thin film transistor T5 may be, but are not limited to, single-gate thin film transistors; the thin film transistor can also be a double-gate thin film transistor, and when the double-gate thin film transistor is adopted, the top gate and the bottom gate of the corresponding double-gate thin film transistor are connected.
It should be noted that the pixel circuit provided in this embodiment can adjust the light emitting period of the pixel circuit by adjusting the high potential period of the SCAN signal SCAN; specifically, if the writing period WR and the emission period EM form one period, the emission period EM may occupy, but is not limited to, 71% of the one period, and the writing period WR may occupy the remaining part of the one period.
It should be noted that, in the pixel circuit provided in this embodiment, in the light-emitting phase EM, the writing of the DATA signal DATA may be controlled by the SCAN signal SCAN, so that the working efficiency of the pixel circuit is improved.
In one embodiment, the present application provides a display panel including the pixel circuit in any one of the above embodiments.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The pixel circuit provided by the embodiment of the present application is described in detail above, and a specific example is applied in the description to explain the principle and the implementation of the present application, and the description of the above embodiment is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A pixel circuit, comprising:
the light-emitting device is connected with a first power supply signal and used for pixel display;
the driving unit is connected with the light-emitting device and used for controlling the current intensity flowing through the light-emitting device;
the writing unit is connected with the driving unit and is used for writing a data signal according to a scanning signal of a previous frame;
the storage unit is connected with the writing unit, the driving unit and a second power supply signal and used for storing and maintaining the threshold voltage of the driving unit; and
and the compensation unit is connected with the driving unit and used for dynamically and linearly adjusting the threshold voltage according to the detection signal so as to configure the reference signal to compensate the positive and negative drifts of the threshold voltage.
2. The pixel circuit according to claim 1, further comprising:
the pre-storing unit is connected with the writing unit and the driving unit and is used for pre-storing the data signal according to the scanning signal so as to prolong the charging time of the corresponding pixel.
3. The pixel circuit according to claim 2, wherein the driving unit includes a first thin film transistor configured as an N-type double gate;
the drain electrode of the first thin film transistor is connected with the output end of the light-emitting device and the compensation unit; the source electrode of the first thin film transistor is connected with the second power supply signal and the storage unit; the top gate of the first thin film transistor is connected with the compensation unit, the writing unit and the storage unit; and the bottom gate of the first thin film transistor is connected with the compensation unit.
4. The pixel circuit according to claim 3, wherein the writing unit includes a second thin film transistor;
the drain electrode of the second thin film transistor is connected with the data signal; the grid electrode of the second thin film transistor is connected with the scanning signal; and the source electrode of the second thin film transistor is connected with the top gate of the first thin film transistor.
5. The pixel circuit according to claim 4, wherein the storage unit includes a first capacitor;
the first end of the first capacitor is connected with the top gate of the first thin film transistor and the source electrode of the second thin film transistor; the second end of the first capacitor is connected with the source electrode of the first thin film transistor and the second power supply signal.
6. The pixel circuit according to claim 5, wherein the compensation unit comprises a third thin film transistor, a fourth thin film transistor, and a second capacitor;
the detection signal is connected with the grid electrode of the third thin film transistor and the grid electrode of the fourth thin film transistor; the reference signal is connected with the drain electrode of the third thin film transistor; the source electrode of the third thin film transistor is connected with the top gate of the first thin film transistor, the source electrode of the second thin film transistor and the first end of the first capacitor; the drain electrode of the fourth thin film transistor is connected with the drain electrode of the first thin film transistor and the output end of the light-emitting device; the source electrode of the fourth thin film transistor is connected with the bottom gate of the first thin film transistor and the first end of the second capacitor; and the second end of the second capacitor is connected with zero potential.
7. The pixel circuit according to claim 6, wherein the pre-storage unit comprises a fifth thin film transistor and a third capacitor;
the source electrode of the second thin film transistor is connected with the first end of the third capacitor and the drain electrode of the fifth thin film transistor; the second end of the third capacitor is connected with zero potential; the grid electrode of the fifth thin film transistor is connected with an incorporated signal; and the source electrode of the fifth thin film transistor is connected with the top gate of the first thin film transistor.
8. The pixel circuit according to any of claims 1 to 7, wherein the first power signal and the second power signal are both variable power signals.
9. The pixel circuit according to any one of claims 1 to 7, wherein the light emitting device is at least any one of an organic light emitting diode, a micro light emitting diode, and a sub-millimeter light emitting diode.
10. A display panel comprising the pixel circuit according to any one of claims 1 to 9.
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| CN202010268321.5A CN111402788A (en) | 2020-04-08 | 2020-04-08 | Pixel circuit and display panel |
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| CN202010268321.5A CN111402788A (en) | 2020-04-08 | 2020-04-08 | Pixel circuit and display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113674673A (en) * | 2021-08-19 | 2021-11-19 | 深圳市华星光电半导体显示技术有限公司 | Display panel drive circuit, display panel and display terminal |
| CN113963668A (en) * | 2020-07-21 | 2022-01-21 | 京东方科技集团股份有限公司 | Display device and driving method thereof |
| TWI831187B (en) * | 2021-04-28 | 2024-02-01 | 大陸商廣東阿格蕾雅光電材料有限公司 | OLED pixel structure, display panel and electronic equipment |
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Application publication date: 20200710 |