CN110349534B - Pixel circuit and driving method thereof - Google Patents
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- 239000010409 thin film Substances 0.000 claims description 7
- 239000003990 capacitor Substances 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 8
- 102100023478 Transcription cofactor vestigial-like protein 1 Human genes 0.000 description 6
- 101710176146 Transcription cofactor vestigial-like protein 1 Proteins 0.000 description 6
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 229920001621 AMOLED Polymers 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
Abstract
A pixel circuit includes a first transistor, a second transistor, a third transistor, and a driving transistor. The first terminal of the first transistor receives a system high voltage. The second terminal of the first transistor is coupled to the first node. The first transistor is selectively turned on according to a control signal. The first end of the second transistor is coupled to the first node. The second terminal of the second transistor receives a system low voltage. The control end of the second transistor is used for receiving a data signal. The first end of the third transistor is coupled to the first node. The second end of the third transistor is coupled to the second node. The third transistor is selectively turned on according to a control signal. The driving transistor is coupled to the second node and the light emitting element. The driving transistor is used for outputting a driving current to the light-emitting element according to the voltage potential of the second node.
Description
Technical Field
The present invention relates to a pixel circuit, and more particularly, to a pixel circuit with compensation function.
Background
With the increasing demand of digital Display devices, Indium Gallium Zinc Oxide (IGZO) is widely used in Active Matrix Liquid Crystal Displays (AMLCDs), Active Organic Light Emitting diode Display devices (AMOLEDs), and the like.
In order to maintain uniform brightness of the self-emissive display, the drive current in the pixels must be maintained constant. However, in the IGZO process, the variation of the threshold voltage (Vth) of the driving transistor causes the brightness variation between different pixels.
Disclosure of Invention
One embodiment of the invention relates to a pixel circuit. The pixel circuit includes a first transistor, a second transistor, a third transistor, and a driving transistor. The first terminal of the first transistor receives a system high voltage. The second terminal of the first transistor is coupled to the first node. The first transistor is selectively turned on according to a control signal. The first end of the second transistor is coupled to the first node. The second terminal of the second transistor receives a system low voltage. The control end of the second transistor is used for receiving a data signal. The first end of the third transistor is coupled to the first node. The second end of the third transistor is coupled to the second node. The third transistor is selectively turned on according to a control signal. The driving transistor is coupled to the second node and the light emitting element. The driving transistor is used for outputting a driving current to the light-emitting element according to the voltage potential of the node.
One embodiment of the present invention relates to another pixel circuit including a first transistor, a second transistor, a third transistor, and a driving transistor. The first terminal of the first transistor receives a system high voltage. The second terminal of the first transistor is coupled to the first node. The first transistor is selectively turned on according to a first control signal. The first end of the second transistor is coupled to the first node. The second terminal of the second transistor receives a system low voltage. The control end of the second transistor is used for receiving a data signal. The first end of the third transistor is coupled to the first node. The second end of the third transistor is coupled to the second node. The third transistor is selectively turned on according to a second control signal. The driving transistor is coupled to the second node and the light emitting element. The driving transistor is used for outputting a driving current to the light-emitting element according to the voltage potential of the node.
One embodiment of the present invention relates to a pixel circuit driving method, including: the first transistor and the second transistor are respectively conducted according to a control signal and a data signal to provide a voltage potential; the third transistor is turned on according to the control signal to output a voltage potential; outputting a driving current to the light emitting element by the driving transistor according to the voltage potential; and emitting light by the light emitting element according to the driving current.
The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.
Drawings
Fig. 1 is a schematic diagram illustrating a pixel circuit according to some embodiments of the invention.
FIG. 2 is a signal timing diagram illustrating a pixel circuit according to some embodiments of the invention.
Fig. 3 is a schematic diagram illustrating another pixel circuit according to some other embodiments of the present invention.
FIG. 4 is a signal timing diagram illustrating another pixel circuit according to some other embodiments of the present invention.
Fig. 5 is a flow chart illustrating a pixel circuit driving method according to some embodiments of the invention.
Wherein, the reference numbers:
100. 300, and (2) 300: pixel circuit
T1, T2, T3, Td: transistor with a metal gate electrode
C1: capacitor with a capacitor element
LED: light emitting element
N1, N2: node point
S1, S2: control signal
Data: data signal
Id: drive current
OVDD: high voltage of system
OVSS: low voltage of system
Vs1, Vs 2: enabling voltage potential
Vgl1, Vgh2, Vdl: potential of forbidden voltage
Vdata: data voltage potential
T1, T2, Tf: period of time
500: pixel circuit driving method
S520, S540, S560, S580: operation of
Detailed Description
The invention will be described in detail with reference to the following drawings, which are provided for illustration purposes and the like:
the embodiments are described in detail below with reference to the accompanying drawings, but the embodiments are only for explaining the present invention and not for limiting the present invention, and the description of the structural operation is not for limiting the execution sequence thereof, and any structure obtained by recombining the elements and having equivalent functions is included in the scope of the present invention.
The term (terms) used throughout the specification and claims has the ordinary meaning as commonly understood in each art, in the disclosure herein and in the specific disclosure herein, unless otherwise indicated. As used herein, the terms first, second, third, etc. do not denote any order or importance, but rather are used to distinguish one element from another or from another element or operation described in the same technical language.
Please refer to fig. 1. Fig. 1 is a schematic diagram illustrating a pixel circuit 100 according to some embodiments of the invention. In some embodiments, the pixel circuit 100 can be used in an Active Matrix Liquid Crystal Display (AMLCD), an Active Organic Light Emitting diode Display (AMOLED), an Active Micro Light Emitting diode Display (AMOLED), or the like. The display device may include a plurality of pixel circuits 100 as shown in fig. 1 to form a complete display frame.
As shown in fig. 1, in some embodiments, the pixel circuit 100 includes a transistor T1, a transistor T2, a transistor T3, a driving transistor Td, a capacitor C1, and a light emitting element LED. In the present embodiment, as shown in fig. 1, the transistors T1, T2, T3 and the driving transistor Td are all N-type thin film transistors. Wherein, the ratio of W/L of the transistor T1 and the transistor T2 is 1: 4, W is the width of the transistor gate, and L is the length of the transistor gate. In some embodiments, the light emitting element LED may be a light emitting diode.
Structurally, the first terminal of the transistor T1 is coupled to the system high voltage OVDD. The control terminal of the transistor T1 is coupled to the scan line. The second terminal of the transistor T1 is coupled to the node N1. A first terminal of the transistor T2 is coupled to the node N1. The control terminal of the transistor T2 is coupled to the data line. The second terminal of the transistor T2 is coupled to the system low voltage OVSS. A first terminal of the transistor T3 is coupled to the node N1. The control terminal of the transistor T3 is coupled to the scan line. The second terminal of the transistor T3 is coupled to the node N2.
The first terminal of the driving transistor Td is coupled to the system high voltage OVDD. The control terminal of the driving transistor Td is coupled to the node N2. The second terminal of the driving transistor Td is coupled to the system low voltage OVSS. A first terminal of the capacitor C1 is coupled to the node N2. A second terminal of the capacitor C1 is coupled to the second terminal of the driving transistor Td. The light emitting device LED is coupled between the first terminal of the driving transistor Td and the system high voltage OVDD. In some other embodiments, the light emitting device LED may be coupled between the driving transistor Td and the system low voltage OVSS.
In operation, the transistor T1 is selectively turned on according to the control signal S1 transmitted from the scan line. The transistor T2 is selectively turned on according to the Data signal Data transmitted from the Data line. In other words, the transistor T1 and the transistor T2 are turned on according to the control signal S1 and the Data signal Data to provide the voltage potential to the node N1.
The transistor T3 is selectively turned on according to a control signal S1 transmitted from the scan line to receive the voltage potential at the node N1 and output the voltage potential to the node N2. The driving transistor Td is selectively turned on according to the voltage potential of the node N2 to output the driving current Id to the light emitting device LED. The light emitting element LED emits light according to the driving current Id.
For the sake of convenience, the detailed operation of each element in the pixel circuit 100 will be described in the following paragraphs with reference to the drawings. Please refer to fig. 1 and fig. 2 together. Fig. 2 is a signal timing diagram illustrating a pixel circuit 100 according to some embodiments of the invention. As shown in fig. 2, the period Tf is the time of one frame (frame). The period Tf includes a first period T1 and a second period T2.
In some embodiments, the first period T1 corresponds to a write and compensation phase of the pixel circuit 100. During the first period T1, the control signal S1 is the enable voltage potential Vs 1. As shown in fig. 2, the control signal S1 is at a high voltage potential. In the first period T1, the Data signal Data is the Data voltage level Vdata. For example, the first period T1 may be 2 microseconds.
The second period T2 corresponds to the light-emitting stage of the pixel circuit 100. During the second period T2, the control signal S1 is the disable voltage potential Vgl 1. As shown in fig. 2, the control signal S1 is at a low voltage potential. And during the second period T2, the Data signal Data is the disable voltage level Vdl. As shown in fig. 2, the Data signal Data may be a low voltage potential. In some embodiments, the disable voltage potentials Vgl1, Vdl of the control signal S1 and the Data signal Data may be the same or different voltage potentials. In other embodiments, the Data signal Data may be a floating voltage potential during the second period T2.
Specifically, during the first period T1, the control signal S1 at the enable voltage level Vs1 turns on the transistor T1. The Data signal Data at the Data voltage potential Vdata causes the transistor T2 to turn on. Since the currents of the transistor T1 and the transistor T2 are equal, as shown in the following equation (1):
4k(Vdata-Vth2)2=k(Vs1-Vn1-Vth1)2 (1)
wherein Vth1 is the threshold voltage of the transistor T1. Vth2 is the threshold voltage of transistor T2. Vn1 is the voltage potential provided to node N1.
Therefore, according to the equation (1), the voltage potential supplied to the node N1 by the transistor T1 and the transistor T2 is as shown in the following equation (2):
Vn1=Vs1-2Vdata+2Vth2-Vth1 (2)
in addition, during the first period T1, the control signal S1 at the enable voltage level Vs1 also turns on the transistor T3 to provide the voltage level at the node N1 to the node N2. Specifically, the voltage potential at the node N2 is as shown in equation (3).
Vn2=Vn1=Vs1-2Vdata+2Vth2-Vth1 (3)
Wherein Vn2 is the voltage potential provided to node N2.
As such, according to equation (3) and because the distances between the transistors T1, T2, T3 and the driving transistor Td are close, the threshold voltages of the transistors T1, T2, T3 and the driving transistor Td are approximately equal. Therefore, in the second period T2, the driving transistor Td outputs the driving current Id according to equation (4).
Id=k(Vgs-Vthd)2
=k(Vs1-2Vdata+2Vth2-Vth1-Vthd)2
=k(Vs1-2Vdata)2 (4)
Where Vgs is a voltage difference of the gate terminal and the source terminal of the driving transistor Td. Vthd is the threshold voltage of the driving transistor Td. Since the distances between the transistors T1, T2, T3 and the driving transistor Td are close, the threshold voltage Vth1 of the transistor T1, the threshold voltage Vth2 of the transistor T2 and the threshold voltage Vthd of the driving transistor Td are approximately equal. Thus, 2Vth2-Vth1-Vthd can cancel to zero. In other words, the influence of the variation of the threshold voltage Vthd of the driving transistor Td on the driving current Id can be eliminated.
In addition, during the second period T2, the control signal S1 at the disable voltage potential Vgl1 turns off the transistors T1 and T3. The Data signal Data at the disable voltage level Vdl causes the transistor T2 to turn off. In other embodiments, the Data signal Data at the floating voltage potential is such that the transistor T2 does not have to be turned on or off.
Please refer to fig. 3. Fig. 3 is a schematic diagram illustrating another pixel circuit 300 according to some other embodiments of the present invention. In the embodiment shown in fig. 3, similar components to those in the embodiment of fig. 1 are denoted by the same reference numerals, and the operation thereof is already described in the previous paragraphs, which is not repeated herein. In contrast to the embodiment shown in fig. 1, the transistor T3 in the pixel circuit 300 is configured to receive the control signal S2 as shown in fig. 3. The transistors T1, T2 and the driving transistor Td are N-type thin film transistors, and the transistor T3 is a P-type thin film transistor.
For the sake of convenience, the detailed operation of each element in the pixel circuit 300 will be described in the following paragraphs with reference to the drawings. Please refer to fig. 3 and 4 together. Fig. 4 is a signal timing diagram illustrating a pixel circuit 300 according to some embodiments of the invention. In the embodiment shown in fig. 4, similar components to those in the embodiment of fig. 2 are denoted by the same reference numerals, and the operation thereof is already described in the previous paragraphs, which is not repeated herein. The control signal S2 is further illustrated in fig. 4 as compared to the embodiment shown in fig. 2.
In some embodiments, during the first period T1, the control signals S1 and S2 are respectively the enabling voltage potentials Vs1 and Vs 2. As shown in fig. 4, the control signal S1 is at a high voltage level and the control signal S2 is at a low voltage level. In the second period T2, the control signals S1 and S2 are the disable voltage potentials Vgl1 and Vgh2, respectively. As shown in fig. 4, the control signal S1 is at a low voltage level and the control signal S2 is at a high voltage level.
In some embodiments, the enabling voltage level Vs1 and the disabling voltage level Vgh2 may be the same voltage level. The disable voltage potential Vgl1 and the enable voltage potential Vs2 may be the same voltage potential. In other words, the control signals S1 and S2 may be opposite signals to each other.
Please refer to fig. 5. Fig. 5 is a flow chart illustrating a pixel circuit driving method 500 according to some embodiments of the invention. As shown in fig. 5, the pixel circuit driving method 500 includes operations S520, S540, S560, and S580.
First, in operation S520, the transistor T1 and the transistor T2 are turned on according to the control signal S1 and the Data signal Data, respectively, to supply a voltage potential. Specifically, in the first period T1, the transistor T1 is turned on according to the control signal S1, and the transistor T2 is turned on according to the Data signal Data. The voltage potential is supplied to the node N1 according to the current flowing through the transistor T1 and the transistor T2 in common. The voltage potential at the node N1 at this time is as shown in the above equation (2).
Next, in operation S540, the transistor T3 is turned on according to the control signal S1 or S2 to output a voltage potential. Specifically, in the first period T1, the N-type thin film transistor T3 is turned on according to the control signal S1 to output the voltage potential of the node N1 to the node N2. Alternatively, the P-type thin film transistor T3 is turned on according to the control signal S2 to output the voltage potential of the node N1 to the node N2. The voltage potential at the node N2 at this time is as shown in the above equation (3).
Next, in operation S560, the driving current Id is output to the light emitting element LED by the driving transistor Td according to the voltage potential. Specifically, in the second period T2, the driving transistor Td outputs the driving current Id to the light emitting element LED in accordance with the voltage potential shown in equation (3). The drive current Id is as shown in equation (4).
Next, in operation S580, light is emitted from the light emitting element LED according to the driving current Id.
While the disclosed methods are illustrated and described herein as a series of steps or events, it will be appreciated that the order of the steps or events shown is not to be interpreted in a limiting sense. For example, some steps may occur in different orders and/or concurrently with other steps or events apart from those illustrated and/or described herein. In addition, not all illustrated steps may be required to implement one or more of the implementations or embodiments described herein. Furthermore, one or more steps herein may also be performed in one or more separate steps and/or stages.
In summary, by applying the above embodiments, the size ratios of the transistors T1 and T2 and the design of the Data signal Data are used for compensation, so that the magnitude of the driving current Id is not affected by the device characteristics (e.g., different threshold voltages) of the driving transistor Td when the display panel displays, and a relatively stable driving current Id can be provided. In addition, by completing data writing and transistor threshold voltage compensation in one stage, the time from the compensation threshold voltage to the light emitting element LED can be shortened remarkably, and the compensation effect is good. Furthermore, in some embodiments of the present disclosure, only one scan line control signal S1 is required, so that the complexity of the control circuit and the cost of the display system can be reduced. The pixel circuits 100 and 300 of the present disclosure have a 4T1C structure, which can reduce the area of the transistor array compared to the pixel circuit with 4T2C or more.
The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it should be understood that various changes and modifications can be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (8)
1. A pixel circuit, comprising:
a first transistor, a first terminal of which receives a system high voltage, a second terminal of which is coupled to a first node, the first transistor being selectively turned on according to a control signal;
a second transistor, a first terminal of which is coupled to the first node, a second terminal of which receives a system low voltage, and a control terminal of which is used for receiving a data signal;
a third transistor, a first end of which is coupled to the first node, a second end of which is coupled to a second node, the third transistor being selectively turned on according to the control signal; and
a driving transistor coupled to the second node and a light emitting device, the driving transistor outputting a driving current to the light emitting device according to a voltage level of the second node; wherein the content of the first and second substances,
a size ratio of the first transistor to the second transistor is one to four.
2. The pixel circuit of claim 1, further comprising:
a capacitor, a first end of which is coupled to the second node, and a second end of which is coupled to the second end of the driving transistor.
3. The pixel circuit according to claim 1, wherein the first transistor and the third transistor are turned on according to the control signal during a first period, the second transistor is configured to receive the data signal, the first transistor is turned off according to the control signal during a second period, and the light emitting element emits light according to the driving current.
4. The pixel circuit according to claim 1, wherein the first transistor, the second transistor, the third transistor, and the driving transistor are N-type thin film transistors.
5. A pixel circuit, comprising:
a first transistor, a first terminal of which receives a system high voltage, a second terminal of which is coupled to a first node, the first transistor being selectively turned on according to a first control signal;
a second transistor, a first terminal of which is coupled to the first node, a second terminal of which receives a system low voltage, and a control terminal of which is used for receiving a data signal;
a third transistor, a first end of the third transistor being coupled to the first node, a second end of the third transistor being coupled to a second node, the third transistor being selectively turned on according to a second control signal; and
a driving transistor coupled to the second node and a light emitting device, the driving transistor outputting a driving current to the light emitting device according to a voltage level of the node; wherein the content of the first and second substances,
a size ratio of the first transistor to the second transistor is one to four.
6. A method for driving a pixel circuit, comprising:
a first transistor and a second transistor are respectively conducted according to a control signal and a data signal to provide a voltage potential;
a third transistor is turned on according to the control signal to output the voltage potential;
outputting a driving current to a light emitting element by a driving transistor according to the voltage potential; and
emitting light by a light emitting element according to the driving current; wherein the content of the first and second substances,
a size ratio of the first transistor to the second transistor is one to four, and
in a first period, the first transistor and the second transistor are turned on according to the control signal and the data signal to provide the voltage potential, and the third transistor is turned on according to the control signal to output the voltage potential.
7. The method of claim 6, further comprising:
in a second period, the first transistor and the third transistor are turned off according to the control signal, the driving transistor outputs the driving current to the light emitting element according to the voltage potential, and the light emitting element emits light according to the driving current.
8. The method for driving a pixel circuit according to claim 6, wherein the first transistor, the second transistor, the third transistor and the driving transistor are N-type thin film transistors.
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