CN111370435A - Image sensor and manufacturing method thereof - Google Patents

Image sensor and manufacturing method thereof Download PDF

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Publication number
CN111370435A
CN111370435A CN202010168470.4A CN202010168470A CN111370435A CN 111370435 A CN111370435 A CN 111370435A CN 202010168470 A CN202010168470 A CN 202010168470A CN 111370435 A CN111370435 A CN 111370435A
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doped region
depth
heavily doped
image sensor
blind holes
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CN111370435B (en
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高晓琛
杜坤
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Shenzhen Haoyue Technology Co ltd
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Zibo Vocational Institute
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14618—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14636—Interconnect structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689—MOS based technologies

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The invention provides an image sensor and a manufacturing method thereof, according to the image sensor, the image sensor indirectly leads out an electric signal by utilizing a heavily doped region, thereby preventing damage to a welding disk; the lightly doped region and the heavily doped region form a reverse PN junction so as to reduce parasitic capacitance and prevent electric leakage and current aggregation; and because the heavily doped region and the lightly doped region adopt an in-situ doping mode in the formation, the stress of the region is overlarge, which is not beneficial to the connection reliability of the wiring layer, and the stress buffer layer is arranged on the wiring layer led out on the doped contact region to prevent the wiring layer from being damaged by the stress.

Description

Image sensor and manufacturing method thereof
Technical Field
The invention relates to the field of semiconductor chip packaging test and manufacturing, in particular to an image sensor and a manufacturing method thereof.
Background
The image sensor is a core component of the camera module, and the CMOS image sensor and the charge coupled device are two current mainstream image sensors. The CMOS image sensor is integrated on the metal oxide semiconductor material, each pixel point is provided with a signal amplifier, and the pixel signals can be directly scanned and derived. The CMOS has the advantages of low cost, simple design, small size, low power consumption and the like. As technology has matured, CCDs have gradually been replaced by CMOS image sensors.
In the conventional CMOS image sensor, the substrate is generally subjected to active-surface cover glass encapsulation, and then backside drilling and wiring are performed. Referring specifically to fig. 8, a cover glass 4 is bonded to a semiconductor substrate 1 through a spacer 3 having adhesiveness, the semiconductor substrate 1 has an active region 2 (or a sensor) and a plurality of pads 6 thereon, in order to lead out electrodes, it is necessary to form a through hole 5 on the back surface of the semiconductor substrate 1, the through hole 5 exposes the plurality of pads 6, then an insulating layer 7 and a wiring layer 8 are formed, the wiring layer 8 leads out signals of the pads 6 to the back surface, and the wiring layer 8 is sealed by a molding layer 9 and finally led out through a bump 10. In the packaging method, the through hole 5 needs to be etched or drilled to the position of the bonding pad 6, which may damage the bonding pad 6, and even may cause the bonding pad 6 to fall off seriously, which is not favorable for the reliability of the electrical connection. Further, there is a parasitic capacitance between the active region 2 and the wiring layer 8 (position a) due to the potential difference therebetween, which is also disadvantageous for the electrical connection and may have a risk of leakage.
Disclosure of Invention
In order to solve the above problems, the present invention provides an image sensor including: a semiconductor substrate, a spacer and a cover glass;
the cover glass is adhered to the upper surface of the semiconductor substrate through the spacer;
a sensing region and a plurality of bonding pads are arranged on the upper surface of the semiconductor substrate, and the bonding pads surround the sensing region; a plurality of blind holes are formed in the lower surface of the semiconductor substrate; the plurality of blind holes correspond to the plurality of bonding pads, the plurality of bonding pads are not exposed at the bottoms of the plurality of blind holes, and a spacing area is reserved between the bottoms and the plurality of bonding pads and has a first thickness; the semiconductor substrate further comprises a lightly doped region doped with a first semiconductor type and a heavily doped region doped with a second semiconductor type, the lightly doped region and the heavily doped region extend from the bottom of the blind hole to the lower surface through the side wall of the blind hole, the lightly doped region has a first depth, the heavily doped region has a second depth, wherein the first depth is greater than the second depth, and the first depth and the second depth are both greater than the first thickness;
and a resin sealing layer is formed on the lower surface, the resin sealing layer fills the blind holes and covers the lower surface, the resin sealing layer is provided with an opening exposing part of the heavily doped region on the lower surface, and a plurality of bumps are formed on the metal layer in the opening.
And a metal silicide layer is formed between the metal layer and the heavily doped region.
The heavy doping region is covered by a stress buffer layer, and the stress buffer layer is covered by the resin sealing layer.
The stress buffer layer is made of tensile silicon nitride or silicon oxynitride.
The first semiconductor type is As, the second semiconductor type is P, and the lightly doped region and the heavily doped region form a reverse PN junction.
The present invention also provides a method of manufacturing an image sensor, including:
(1) providing a semiconductor substrate with a plurality of sensing regions and a plurality of bonding pads, and bonding cover glass to the upper surface of the semiconductor substrate through a spacer;
(2) forming a plurality of blind holes on the lower surface of the semiconductor substrate, wherein the blind holes correspond to the bonding pads, and spacing areas are reserved between the blind holes and the bonding pads and have a first thickness;
(3) doping the lower surface with a first semiconductor type to form lightly doped regions at the bottoms and sidewalls of the plurality of blind holes and the lower surface, the lightly doped regions having a first depth;
(4) doping the lower surface with a second semiconductor type to form heavily doped regions at the bottom and sidewalls of the plurality of blind holes and the lower surface, the heavily doped regions having a second depth; wherein the first depth is greater than the second depth, both the first depth and the second depth being greater than the first thickness;
(5) and forming a resin sealing layer on the lower surface, wherein the resin sealing layer fills the blind holes and covers the lower surface, the resin sealing layer is provided with an opening exposing part of the heavily doped region on the lower surface, a metal layer is deposited in the opening, and a plurality of bumps are formed on the metal layer.
In step (5), an annealing process is further included after the metal layer is deposited, so as to form a metal silicide layer between the metal layer and the heavily doped region.
And (5) forming a stress buffer layer between the step (4) and the step (5), wherein the stress buffer layer covers the heavily doped region.
The stress buffer layer is made of tensile silicon nitride or silicon oxynitride.
The first semiconductor type is As, the second semiconductor type is P, and the lightly doped region and the heavily doped region form a reverse PN junction.
According to the image sensor, the heavily doped region is used for indirectly leading out the electric signal, so that the damage to the welding disc is prevented; the lightly doped region and the heavily doped region form a reverse PN junction so as to reduce parasitic capacitance and prevent electric leakage and current aggregation; and because the heavily doped region and the lightly doped region adopt an in-situ doping mode in the formation, the stress of the region is overlarge, which is not beneficial to the connection reliability of the wiring layer, and the stress buffer layer is arranged on the wiring layer led out on the doped contact region to prevent the wiring layer from being damaged by the stress.
Drawings
FIG. 1 is a cross-sectional view of an image sensor of the present invention;
FIGS. 2-7 are schematic diagrams of a method of fabricating an image sensor according to the present invention;
fig. 8 is a sectional view of a conventional image sensor.
Detailed Description
Referring to fig. 1, the present invention includes a semiconductor substrate 20, a spacer 23, and a cover glass 24. The semiconductor substrate 20 is a conventional silicon material, which is cut from a semiconductor wafer, and includes an upper surface and a lower surface opposite to each other, a plurality of pads 22 and a sensing region 21 on the upper surface, the pads 22 electrically connect to the sensing region 21, and the pads 22 surround the sensing region 21.
The cover glass 24 is adhered to the upper surface of the semiconductor substrate 20 through the spacer 23; the cover glass 24 may be a glass plate with a filter layer, and has a size corresponding to that of the semiconductor substrate 20 and a relatively thin thickness. The spacer 23 may be a photo-curable resin or a thermosetting resin, which has adhesiveness between curing, and can adhere the cover glass 24 and the semiconductor substrate 20 well.
A plurality of blind holes 25 are formed in the lower surface of the semiconductor substrate 20, the blind holes 25 correspond to the bonding pads 22 one by one, and a spacer is left between each blind hole 25 and each bonding pad 22, and has a first thickness; the semiconductor substrate 20 further comprises a lightly doped region 26 doped with a first semiconductor type and a heavily doped region 27 doped with a second semiconductor type, the lightly doped region 26 and the heavily doped region 27 extend from the bottom of the blind hole 25 to the lower surface through the sidewall of the blind hole 25, and the lightly doped region 26 has a first depth and the heavily doped region 27 has a second depth, wherein the first depth is greater than the second depth, and the first depth and the second depth are both greater than the first thickness. The doping element of the heavily doped region is phosphorus, and the concentration of the heavily doped region is more than 1E19cm-3. The doping element of the lightly doped region is arsenic, and the concentration of the lightly doped region is less than 1E17cm-3。
The lightly doped region 26 is doped in situ, which completely covers the bottom surface and the blind via 25, and at least a portion of the bonding pad 22 is embedded in the lightly doped region 26. The heavily doped region 27 acts essentially as a wiring layer, making electrical contact with the pad 22, leading out to the lower surface.
A stress buffer layer 28 is disposed on the bottom surface and the side walls of the plurality of blind holes 25, and the stress buffer layer 28 is an insulating material, preferably tensile silicon nitride or silicon oxynitride, and is formed by a deposition method such as CVD or PE-CVD.
A resin sealing layer 30 is formed on the lower surface, the resin sealing layer 30 fills the plurality of blind holes 25 and covers the lower surface, the resin sealing layer 30 has an opening on the lower surface exposing a portion of the heavily doped region 27, and a plurality of bumps 31 are formed on the metal layer 29 in the opening. The metal layer 29 is copper, aluminum or nickel, which may form a metal silicide with the heavily doped region 27.
An inverse PN junction is formed between the heavily doped region 28 and the lightly doped region 27 of the image sensor, so that parasitic capacitance can be inhibited, and electric leakage and current aggregation can be prevented.
In order to obtain the image sensor, the present invention also provides a method for manufacturing an image sensor, including:
(1) providing a semiconductor substrate with a plurality of sensing regions and a plurality of bonding pads, and bonding cover glass to the upper surface of the semiconductor substrate through a spacer;
(2) forming a plurality of blind holes on the lower surface of the semiconductor substrate, wherein the blind holes correspond to the bonding pads, and spacing areas are reserved between the blind holes and the bonding pads and have a first thickness;
(3) doping the lower surface with a first semiconductor type to form lightly doped regions at the bottoms and sidewalls of the plurality of blind holes and the lower surface, the lightly doped regions having a first depth;
(4) doping the lower surface with a second semiconductor type to form heavily doped regions at the bottom and sidewalls of the plurality of blind holes and the lower surface, the heavily doped regions having a second depth; wherein the first depth is greater than the second depth, both the first depth and the second depth being greater than the first thickness;
(5) and forming a resin sealing layer on the lower surface, wherein the resin sealing layer fills the blind holes and covers the lower surface, the resin sealing layer is provided with an opening exposing part of the heavily doped region on the lower surface, a metal layer is deposited in the opening, and a plurality of bumps are formed on the metal layer.
In step (5), an annealing process is further included after the metal layer is deposited, so as to form a metal silicide layer between the metal layer and the heavily doped region.
And (5) forming a stress buffer layer between the step (4) and the step (5), wherein the stress buffer layer covers the heavily doped region.
The stress buffer layer is made of tensile silicon nitride or silicon oxynitride.
The first semiconductor type is As, the second semiconductor type is P, and the lightly doped region and the heavily doped region form a reverse PN junction.
In particular, referring to fig. 2-7, it includes the following steps:
referring to fig. 2, a semiconductor substrate 20 having a plurality of sensing regions 21 and a plurality of pads 22 is provided, and a cover glass 24 is bonded to an upper surface of the semiconductor substrate 20 through spacers 23; wherein the semiconductor substrate 20 may be a silicon wafer, and the lower surface of the semiconductor substrate 20 may be thinned by a chemical mechanical polishing technique after the cover glass 24 is bonded, so as to achieve thinning.
Referring to fig. 3, a plurality of blind holes 25 are formed in the lower surface of the semiconductor substrate 20, the plurality of blind holes 25 correspond to the plurality of pads 22, and a space is left between the plurality of blind holes 25 and the plurality of pads 22. The spacer has a first thickness d, wherein d is between 200 and 300 nm. The formation of the plurality of blind holes 25 is achieved by laser drilling or dry etching.
Referring next to fig. 4, the spacer region is ion doped in situ of the first semiconductor type to form lightly doped regions 26 on the sidewalls and bottom surfaces and the bottom surface of the plurality of blind vias 25, the lightly doped regions 26 having a first depth. The doping may cause a change in the lattice structure of the doped region, such as an expansion of the lattice, which may result in a higher stress in the lightly doped region 26, which may be detrimental to the electrical connection. And defects may be generated at the surface position of the silicon substrate during plasma doping.
Then, referring to fig. 5, the lower surface is subjected to in-situ ion doping of the second semiconductor type to form heavily doped regions 27 at the bottom and sidewalls of the plurality of blind holes 25 and the lower surface, the heavily doped regions 27 having a second depth; wherein the first depth is greater than the second depth, and both the first depth and the second depth are greater than the first thickness d.
Referring to fig. 6, a stress buffer layer 28 is disposed on the bottom surface and the sidewalls of the plurality of blind vias 25, and the stress buffer layer 28 is an insulating material, preferably tensile silicon nitride or silicon oxynitride, formed by a deposition method such as CVD or PE-CVD. Patterning is then performed to form openings and the openings are filled with a metal layer 29, the metal layer 29 being copper, aluminum or nickel, which forms a metal silicide with the heavily doped regions 27 by a post anneal.
Referring to fig. 7, a sealing resin layer 30 is formed on the lower surface, the sealing resin layer 30 fills the plurality of blind holes 25 and covers the lower surface, the sealing resin layer 30 has an opening on the lower surface, the opening exposes the metal layer 29, and then a plurality of bumps 34 are formed in the opening.
Finally, singulation cutting is performed along a cutting line C of fig. 7 to form the image sensor shown in fig. 1.
According to the image sensor, the heavily doped region is used for indirectly leading out the electric signal, so that the damage to the welding disc is prevented; the lightly doped region and the heavily doped region form a reverse PN junction so as to reduce parasitic capacitance and prevent electric leakage and current aggregation; and because the heavily doped region and the lightly doped region adopt an in-situ doping mode in the formation, the stress of the region is overlarge, which is not beneficial to the connection reliability of the wiring layer, and the stress buffer layer is arranged on the wiring layer led out on the doped contact region to prevent the wiring layer from being damaged by the stress.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.

Claims (10)

1. An image sensor, comprising: a semiconductor substrate, a spacer and a cover glass;
the cover glass is adhered to the upper surface of the semiconductor substrate through the spacer;
a sensing region and a plurality of bonding pads are arranged on the upper surface of the semiconductor substrate, and the bonding pads surround the sensing region; a plurality of blind holes are formed in the lower surface of the semiconductor substrate; the plurality of blind holes correspond to the plurality of bonding pads, the plurality of bonding pads are not exposed at the bottoms of the plurality of blind holes, and a spacing area is reserved between the bottoms and the plurality of bonding pads and has a first thickness; the semiconductor substrate further comprises a lightly doped region doped with a first semiconductor type and a heavily doped region doped with a second semiconductor type, the lightly doped region and the heavily doped region extend from the bottom of the blind hole to the lower surface through the side wall of the blind hole, the lightly doped region has a first depth, the heavily doped region has a second depth, wherein the first depth is greater than the second depth, and the first depth and the second depth are both greater than the first thickness;
and a resin sealing layer is formed on the lower surface, the resin sealing layer fills the blind holes and covers the lower surface, the resin sealing layer is provided with an opening exposing part of the heavily doped region on the lower surface, and a plurality of bumps are formed on the metal layer in the opening.
2. The image sensor of claim 1, wherein: and a metal silicide layer is formed between the metal layer and the heavily doped region.
3. The image sensor of claim 1, wherein: the heavy doping region is covered by a stress buffer layer, and the stress buffer layer is covered by the resin sealing layer.
4. The image sensor of claim 1, wherein: the stress buffer layer is silicon nitride or silicon oxynitride with tensile stress.
5. The image sensor of claim 1, wherein: the first semiconductor type is As, the second semiconductor type is P, and the lightly doped region and the heavily doped region form a reverse PN junction.
6. A method of manufacturing an image sensor, comprising:
(1) providing a semiconductor substrate with a plurality of sensing regions and a plurality of bonding pads, and bonding cover glass to the upper surface of the semiconductor substrate through a spacer;
(2) forming a plurality of blind holes on the lower surface of the semiconductor substrate, wherein the blind holes correspond to the bonding pads, and spacing areas are reserved between the blind holes and the bonding pads and have a first thickness;
(3) doping the lower surface with a first semiconductor type to form lightly doped regions at the bottoms and sidewalls of the plurality of blind holes and the lower surface, the lightly doped regions having a first depth;
(4) doping the lower surface with a second semiconductor type to form heavily doped regions at the bottom and sidewalls of the plurality of blind holes and the lower surface, the heavily doped regions having a second depth; wherein the first depth is greater than the second depth, both the first depth and the second depth being greater than the first thickness;
(5) and forming a resin sealing layer on the lower surface, wherein the resin sealing layer fills the blind holes and covers the lower surface, the resin sealing layer is provided with an opening exposing part of the heavily doped region on the lower surface, a metal layer is deposited in the opening, and a plurality of bumps are formed on the metal layer.
7. The method of manufacturing an image sensor according to claim 6, wherein: in step (5), an annealing process is further included after the metal layer is deposited, so as to form a metal silicide layer between the metal layer and the heavily doped region.
8. The method of manufacturing an image sensor according to claim 6, wherein: and (5) forming a stress buffer layer which covers the heavily doped region.
9. The method of manufacturing an image sensor according to claim 8, wherein: the stress buffer layer is silicon nitride or silicon oxynitride with tensile stress.
10. The method of manufacturing an image sensor according to claim 6, wherein: the first semiconductor type is As, the second semiconductor type is P, and the lightly doped region and the heavily doped region form a reverse PN junction.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6146957A (en) * 1997-04-01 2000-11-14 Sony Corporation Method of manufacturing a semiconductor device having a buried region with higher impurity concentration
US20020022295A1 (en) * 1999-11-29 2002-02-21 Jui-Hsiang Pan Method of forming a photo sensor in a photo diode
US20030038299A1 (en) * 2001-08-23 2003-02-27 Motorola, Inc. Semiconductor structure including a compliant substrate having a decoupling layer, device including the compliant substrate, and method to form the structure and device
US6566678B1 (en) * 2001-11-26 2003-05-20 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a solid-state image sensor
JP2010028143A (en) * 1999-02-09 2010-02-04 Sony Corp Solid-state image sensing device and method for producing the same
US20110193210A1 (en) * 2007-08-08 2011-08-11 Wen-Cheng Chien Image sensor package with trench insulator and fabrication method thereof
CN110610953A (en) * 2019-09-30 2019-12-24 山东砚鼎电子科技有限公司 Camera sensing assembly and manufacturing method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6146957A (en) * 1997-04-01 2000-11-14 Sony Corporation Method of manufacturing a semiconductor device having a buried region with higher impurity concentration
JP2010028143A (en) * 1999-02-09 2010-02-04 Sony Corp Solid-state image sensing device and method for producing the same
US20020022295A1 (en) * 1999-11-29 2002-02-21 Jui-Hsiang Pan Method of forming a photo sensor in a photo diode
US20030038299A1 (en) * 2001-08-23 2003-02-27 Motorola, Inc. Semiconductor structure including a compliant substrate having a decoupling layer, device including the compliant substrate, and method to form the structure and device
US6566678B1 (en) * 2001-11-26 2003-05-20 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a solid-state image sensor
US20110193210A1 (en) * 2007-08-08 2011-08-11 Wen-Cheng Chien Image sensor package with trench insulator and fabrication method thereof
CN110610953A (en) * 2019-09-30 2019-12-24 山东砚鼎电子科技有限公司 Camera sensing assembly and manufacturing method thereof

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