CN111370360A - Substrate film pasting method and packaging method - Google Patents
Substrate film pasting method and packaging method Download PDFInfo
- Publication number
- CN111370360A CN111370360A CN201811605088.4A CN201811605088A CN111370360A CN 111370360 A CN111370360 A CN 111370360A CN 201811605088 A CN201811605088 A CN 201811605088A CN 111370360 A CN111370360 A CN 111370360A
- Authority
- CN
- China
- Prior art keywords
- substrate
- film
- layer
- pasting
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 132
- 239000000758 substrate Substances 0.000 title claims abstract description 86
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 29
- 230000008569 process Effects 0.000 claims abstract description 59
- 238000010438 heat treatment Methods 0.000 claims abstract description 51
- 239000002313 adhesive film Substances 0.000 claims abstract description 37
- 239000010410 layer Substances 0.000 claims description 116
- 239000012790 adhesive layer Substances 0.000 claims description 46
- 238000002161 passivation Methods 0.000 claims description 12
- 238000010030 laminating Methods 0.000 claims description 11
- 239000000126 substance Substances 0.000 claims description 6
- 238000003475 lamination Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 3
- 238000000227 grinding Methods 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 238000007664 blowing Methods 0.000 claims description 2
- 238000005520 cutting process Methods 0.000 claims description 2
- 238000004886 process control Methods 0.000 abstract description 4
- 238000012545 processing Methods 0.000 abstract description 4
- 239000007789 gas Substances 0.000 description 61
- 229910052751 metal Inorganic materials 0.000 description 19
- 239000002184 metal Substances 0.000 description 19
- 238000001179 sorption measurement Methods 0.000 description 15
- 239000000919 ceramic Substances 0.000 description 13
- 230000007246 mechanism Effects 0.000 description 11
- 239000000463 material Substances 0.000 description 10
- 238000000465 moulding Methods 0.000 description 7
- 238000003825 pressing Methods 0.000 description 7
- 238000012546 transfer Methods 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000004033 plastic Substances 0.000 description 5
- 229920003023 plastic Polymers 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000011161 development Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000012778 molding material Substances 0.000 description 4
- 238000012536 packaging technology Methods 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 4
- 238000010926 purge Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 230000002829 reductive effect Effects 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000001746 injection moulding Methods 0.000 description 2
- 238000005272 metallurgy Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 229910000599 Cr alloy Inorganic materials 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- 229920000877 Melamine resin Polymers 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910003811 SiGeC Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229920001807 Urea-formaldehyde Polymers 0.000 description 1
- GXDVEXJTVGRLNW-UHFFFAOYSA-N [Cr].[Cu] Chemical compound [Cr].[Cu] GXDVEXJTVGRLNW-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000788 chromium alloy Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- IUYOGGFTLHZHEG-UHFFFAOYSA-N copper titanium Chemical compound [Ti].[Cu] IUYOGGFTLHZHEG-UHFFFAOYSA-N 0.000 description 1
- 238000004132 cross linking Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000006355 external stress Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000007306 functionalization reaction Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000011133 lead Substances 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000009740 moulding (composite fabrication) Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 229920002635 polyurethane Polymers 0.000 description 1
- 239000004814 polyurethane Substances 0.000 description 1
- RUOJZAUFBMNUDX-UHFFFAOYSA-N propylene carbonate Chemical compound CC1COC(=O)O1 RUOJZAUFBMNUDX-UHFFFAOYSA-N 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 238000010408 sweeping Methods 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The invention provides a substrate film pasting method and a packaging method, wherein a pasting film is provided, the pasting film is pasted on the surface of a substrate with a bonding pad after being heated to a preset temperature, and the pasting film is completely pasted with the bonding pad as far as possible. According to the invention, before the adhesive film is pasted on the substrate, the adhesive film is subjected to heating treatment, so that the adhesive film is uniformly heated, bubbles are prevented from being generated on the surface of the substrate in the pasting process, further the interference on the subsequent processing procedure is prevented, and the reliability of the product is ensured. Further, compared with the existing substrate film pasting process, the pasting film is directly heated instead of indirect heating, the pasting film is easier to obtain the optimal process temperature, and the process control is more intuitive.
Description
Technical Field
The invention relates to the technical field of packaging, in particular to a substrate film pasting method and a packaging method.
Background
With the trend of multi-functionalization and miniaturization of electronic products, high-density microelectronic assembly technology is becoming mainstream in new generation of electronic products. In order to match the development of the new generation of electronic products, especially the development of products such as smart phones, palm computers, super books and the like, the size of the chip is developed towards the directions of higher density, higher speed, smaller size, lower cost and the like. With this, the packaging technology of chips has also undergone rapid development. The packaging of the chip not only provides protection for the chip from the surrounding environment, but also provides a connection interface for the chip. In the Fan-out Wafer level package (FOWLP), a chip with good performance is embedded into a plastic package material or a base, and the chip is connected with other devices through a metal connection manner such as a metal redistribution layer (RDL). The fan-out wafer level packaging technology effectively reduces the thickness and the size of a packaging body, can be compatible with the packaging of various chips, has lower cost and higher device performance, and becomes a hotspot of the packaging process at the present stage.
The most common and earliest fan-out type Wafer Level packaging technology is an Embedded Wafer Level Ball Grid Array (eWLB) scheme, in which a chip (goodd) with good performance is reassembled and the front side is down (Face down) mounted on a Carrier, the Carrier is integrally subjected to plastic packaging, a Wafer is reconstructed, surface wiring and Ball mounting are performed after the Carrier is removed, and finally, the Carrier is cut into a single package, so that I/O (input/output) pin fan-out is realized. In the above packaging scheme, before the Good chips (Good die) are recombined, a film pasting (Mounting) and dicing (Sawing) process is performed on the wafer, wherein the film pasting process is to paste a sticky film (generally referred to as DAF or a sticky film) on the surface of the wafer on which the pads are formed, and the DAF is used as a supporting structure for wafer dicing and a connection film for a subsequent chip dicing (DieAttach, DA for short) process.
The common method for sticking the film on the wafer comprises the following steps: the adsorption platform carrying the wafer is heated, so that the wafer is heated to reach a preset process temperature, and then the adhesive film is attached to the surface of the heated wafer. However, in the wafer film pasting method, bubbles are easily formed on the surface of the wafer, which poses a great risk to the reliability of the product.
Disclosure of Invention
In order to solve the above problems, the present invention provides a method for attaching a film to a substrate, which can reduce or even prevent bubbles from forming on the surface of a wafer, and improve the reliability of the product.
The invention provides a substrate film pasting method, which comprises the following steps:
providing a substrate, wherein a bonding pad is formed on the surface of the substrate;
providing a sticky film, and heating the sticky film to a preset temperature; and
and pasting the pasting film on the surface of the substrate with the bonding pad, so that the pasting film is pasted with the bonding pad.
Optionally, the heating temperature of the adhesive film is 20 ℃ to 60 ℃.
Optionally, the adhesive film is DAF;
optionally, the DAF includes: a base layer, an adhesive layer, and a release layer, the adhesive layer disposed between the base layer and the release layer.
Optionally, after separating the release layer from the DAF, the base layer and the adhesion layer are attached to the surface of the wafer on which the pad is formed, and the adhesion layer is completely attached to the pad.
Optionally, the heating method of the adhesive film includes:
introducing and heating a gas;
peeling the release layer from the DAF; and
and blowing and heating the adhesion layer by using the heated gas.
Alternatively, the heating of the gas is achieved by heating a line through which the gas is introduced.
Optionally, the heating temperature of the gas is 30 ℃ to 70 ℃.
Optionally, the adhesive layer is heated to soften the adhesive layer and to enable it to remain uncured.
Optionally, the heating temperature of the adhesion layer is 20-60 ℃.
Optionally, the substrate is a wafer, a passivation layer is further formed on the surface of the substrate where the pad is formed, the passivation layer covers the surface of the substrate where the pad is formed, and an opening exposing the pad is formed above the pad.
Optionally, the adhesive film fills the opening.
Optionally, the substrate film pasting method further comprises heating the substrate.
Optionally, before the substrate is heated, a surface of the substrate, which is different from the surface on which the bonding pad is formed, is thinned.
Optionally, the substrate is thinned by grinding, chemical mechanical polishing, wet etching or dry etching.
Optionally, the thickness of the thinned substrate is 150 μm to 200 μm.
Optionally, after the adhesive film is attached to the surface of the substrate where the bonding pad is formed, the adhesive film is pre-cured through ultraviolet irradiation.
Correspondingly, the invention provides a packaging method, which comprises the following steps:
the substrate film pasting method is adopted to paste the pasting film on the surface of the substrate with the bonding pad;
cutting the substrate pasted with the pasting film into a plurality of independent chips;
and attaching the chip to a carrier.
Optionally, the carrier is a printed circuit board, a lead frame or a chip.
Optionally, the packaging method is a fan-out wafer level packaging method.
In summary, the present invention provides a substrate laminating method, which includes providing a bonding film, heating the bonding film to a predetermined temperature, and laminating the bonding film on a surface of a wafer on which a bonding pad is formed, so that the bonding film and the bonding pad are completely bonded as much as possible. According to the invention, before the adhesive film is pasted on the wafer, the adhesive film is subjected to heating treatment, so that the adhesive film is uniformly heated, bubbles generated on the surface of the wafer in the pasting process of the adhesive film are reduced and even avoided, further the interference on the subsequent process is prevented, and the reliability of the product is ensured. Furthermore, compared with the existing substrate film pasting process, the pasting film is directly heated instead of being indirectly heated, so that the pasting film is easier to obtain the optimal process temperature, and the process control difficulty is reduced.
Drawings
FIG. 1 is a flow chart of a method for laminating a film to a substrate according to an embodiment of the present invention;
FIG. 2 is a schematic view of a wafer according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a DAF according to an embodiment of the present invention;
FIGS. 4A-4D are schematic structural diagrams illustrating steps of a method for laminating a film on a substrate according to an embodiment of the present invention;
fig. 5A to fig. 5E are schematic structural diagrams of corresponding steps in a packaging method according to an embodiment of the present invention.
Reference numerals:
10-a ceramic vacuum adsorption platform; 100-a wafer; 110-chip; 101-a pad; 102-a passivation layer; 103-opening; 104-plastic packaging material; 105-a metal redistribution layer; 106-a dielectric layer; 107-under bump metallization; 108-solder balls; 120-sticking a film; 121-a base layer; 122-an adhesion layer; 123-a release layer; 124-a reel; 200-vector.
Detailed Description
As known from the background art, in the conventional wafer lamination process, an adsorption platform carrying a wafer is heated, and then the wafer is heated until the wafer reaches a predetermined process temperature, and then a lamination film is laminated on the surface of the wafer on which a bonding pad is formed. The inventor finds that the wafer film pasting method has the advantages that the pasting films receive heat, the temperature is difficult to reach the optimal process temperature, the pasting films cannot be completely pasted with the bonding pads on the surface of the wafer, bubbles are easily formed on the surface of the wafer, particularly, the pasting positions of the pasting films and the bonding pads interfere with the subsequent process, for example, the bubbles on the surface of the wafer in the subsequent redistribution metal layer (RDL) manufacturing process can cause open circuits in the redistribution metal layer, and great risks are caused to the reliability of products.
The inventors have attempted to solve the above-mentioned bubble problem by two methods: one method is to use a vacuum film sticking machine to stick a film on a wafer, but the film sticking method needs to replace the existing film sticking equipment, and the production cost of the vacuum film sticking machine is high; another method is to deposit an oxide on a pad region on the surface of a wafer by adopting a PECVD process before a wafer film pasting process is performed, and planarize the oxide deposited on the pad region by utilizing a Chemical Mechanical Polishing (CMP) technology so as to flatten the surface of the wafer and further reduce bubbles formed in the film pasting process.
Based on the above research, embodiments of the present invention provide a substrate film attaching method and a packaging method, in which a bonding film is heated to a predetermined temperature, and then the bonding film is attached to a surface of a substrate on which a pad is formed, so that the bonding film and the pad are completely attached as much as possible. According to the embodiment of the invention, before the adhesive film is pasted on the substrate, the adhesive film is subjected to heating treatment, so that the adhesive film is uniformly heated, bubbles are prevented from being generated on the surface of the wafer in the pasting process, the subsequent processing procedure is prevented from being interfered, and the reliability of the product is ensured. Further, compared with the existing substrate film pasting process, the pasting film is directly heated instead of indirect heating, the pasting film is easier to obtain the optimal process temperature, and the process control is more intuitive.
In order to make the contents of the present invention more clearly understood, the contents of the present invention will be further described with reference to the accompanying drawings. The invention is of course not limited to this particular embodiment, and general alternatives known to those skilled in the art are also covered by the scope of the invention.
The present invention is described in detail with reference to the drawings, and for convenience of explanation, the drawings are not enlarged partially according to the general scale, and should not be construed as limiting the present invention.
It should be noted that the substrate film pasting method and the packaging method provided by the present invention are applicable to any semiconductor packaging method including a substrate film pasting (Mounting) process, such as a wafer film pasting process. The present embodiment is described in detail by taking a fan-out wafer level package as an example, and those skilled in the art should understand how to apply the film pasting method to packaging technologies other than the fan-out wafer level package according to the description of the present embodiment.
Fig. 1 is a flowchart of a substrate film pasting method provided in this embodiment, and as shown in fig. 1, the substrate film pasting method provided in this embodiment includes the following steps:
s01: providing a substrate, wherein a plurality of bonding pads are formed on the surface of the substrate;
s02: providing a sticky film and heating the sticky film to a preset temperature; and
s03: and pasting the pasting film on the surface of the substrate with the bonding pad, so that the pasting film is pasted with the bonding pad.
Fig. 4A to 4D are schematic structural diagrams corresponding to corresponding steps of a substrate film-pasting method provided in this embodiment, and the substrate film-pasting method provided in this embodiment will be described in detail below with reference to fig. 2 and with reference to fig. 4A to 4D. In this embodiment, the substrate is a wafer 100, a film pasting machine is used to perform a film pasting process on the wafer 100, except for changing a heating manner in a process of pasting the film 120 to the wafer 100, corresponding processes of other films in this embodiment are the same as those in the prior art, where the film pasting machine is a film pasting machine commonly used in the prior art and includes a workpiece stage (such as a ceramic vacuum adsorption platform 10) for bearing and heating the wafer 100, a fixing mechanism (such as a roller) of a DAF reel, a peeling mechanism (such as a peeling plate) of the DAF, a conveying mechanism for conveying the DAF, a pressing mechanism (such as a pressing roller) of the DAF, and the like.
First, step S01 is executed, as shown in fig. 2, a substrate is provided, and a plurality of pads 101 (not shown in fig. 2) are formed on a surface of the substrate.
The substrate is a wafer 100, and the wafer 100 may be a device wafer on which a plurality of independent chips 110 are formed. The wafer 100 may be fabricated according to a corresponding layout design by using an integrated circuit fabrication technology, for example, devices such as NMOS transistors and/or PMOS transistors are formed on the wafer 100 through deposition, photolithography, etching, ion implantation, and the like, and structures such as an interconnection layer formed by a dielectric layer and a metal layer and a pad 101 located on the interconnection layer are formed, so as to fabricate a plurality of independent chips 110 arranged in an array in the wafer 100.
The chip 110 may be various types of chips, such as a memory chip, a communication chip, a processor chip, a MEMS chip, and the like. The individual chips 110 formed on the same wafer 100 may be the same function or different function chips, and their fabrication processes may be the same, similar, or completely different. Of course, in general, the plurality of independent chips 110 formed on one wafer 100 are chips having the same function, and taking the independent chip 110 as an example of a MEMS chip, MEMS devices such as a gyroscope, an accelerometer, an inertial sensor, a pressure sensor, a flow sensor, a displacement sensor, an electric field strength sensor, a current sensor, a magnetic flux sensor, a magnetic field strength sensor, a temperature sensor, a heat flow sensor, a thermal conductivity sensor, an optical modulator, a sound sensor, a gas sensor, a humidity sensor, an ion sensor, and a biosensor can be fabricated on a semiconductor substrate (for example, a silicon wafer) by using the MEMS chip fabrication process disclosed in the art, and after the package is completed, the independent chip grains can be separated as a single MEMS chip.
Illustratively, the substrate material selected for the wafer 100 may be at least one of the following materials: si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III/V compounds, and the semiconductor substrate may further include a multilayer structure of these materials, or silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-on-insulator-silicon-germanium (S-SiGeOI), silicon-on-insulator-silicon-germanium (SiGeOI), germanium-on-insulator (GeO), and the like.
Fig. 4A is a partial structural diagram of a chip 110 in a wafer 100, and as shown in fig. 4A, a passivation layer 102 is formed on a surface of the chip 110 to protect integrated circuits (transistors, interconnect layers, etc.) and pads 101 formed in the chip 110. A portion of the passivation layer 102 covers an edge portion of the pad 101, and a central portion of the pad 101 is exposed through an opening 103 in the passivation layer 102 to enable electrical connection between the chip 110 and an external circuit through the exposed pad 101. The passivation layer 101 may be formed of nitride, oxide, oxynitride, polymer, or other dielectric material. The passivation layer 102 may be formed by Chemical Vapor Deposition (CVD), spin-on coating, etc., for example, if the passivation layer 102 is made of nitride, oxide, or oxynitride, it is preferably formed by CVD such as a Plasma Enhanced Chemical Vapor Deposition (PECVD) process, and if the passivation layer 102 is made of polymer, it is preferably formed by spin-on coating process. The material of the bonding pad 101 may include one or more of metals such as aluminum, copper, silver, gold, nickel, tungsten, and the like, and is preferably an aluminum bonding pad.
Since the opening 103 exposing the pad is formed above the pad 101 on the surface of the chip 110, in a subsequent wafer film (Mounting) process, it is difficult for a film layer to completely fill the opening 103 above the pad, as shown in fig. 4B and 4C, that is, the film layer is difficult to completely adhere to the pad 101, bubbles are easily formed on the surface of the wafer, and especially in an area where the pad 101 is formed, the bubbles interfere with a subsequent process, and a great risk is caused on reliability of a product.
Next, step S02 is executed to provide a pasting film 120 and heat the pasting film 120 to a predetermined temperature. The adhesive film 200 may be any film with adhesiveness, and the material of the adhesive film 200 is, for example, epoxy resin, propylene carbonate, polycarbonate, or a polymer-based material. The adhesive Film 120 in this embodiment is preferably a Die Attach Film (DAF), and the die attach Film may be of any suitable type according to the needs, and is not particularly limited herein.
Illustratively, as shown in fig. 3, a Die Attach Film (DAF) includes a base layer 121, an adhesion layer 122, and a release layer 123, the adhesion layer 122 being disposed between the base layer 121 and the release layer 123 as a core Film layer. The base layer 121 serves as a support layer for the adhesive layer 122, and the release layer 123 serves as a cover layer for the adhesive layer 122. Wherein the base layer 121 comprises a Polyolefin (polyofefin) material, the release layer 123 comprises a polyester material, and the adhesion layer 122 comprises an epoxy organic material. The overall thickness of the Die Attach Film (DAF) is between 10 μm and 30 μm. The adhesive layer 122 generally has no conductivity, is a polymer colloidal material with two sides having adhesion at normal temperature, and can ensure the stability of the two sides of the adhesive layer 122 after curing.
The Die Attach Film (DAF) is wound on a fixed roll 124 before use, and the release layer 123 and the substrate layer 121 adhered to both sides of the adhesive layer 122 do not have adhesion, so that the release layer 123 and the substrate layer 121 can function as a protective film, so that the DAF is wound on the fixed roll 124 in a circle as a whole, and the adhesive layer 122 is protected from environmental erosion such as external stress and water vapor. The subsequent heating of the DAF is mainly performed with respect to the adhesive layer 122, and therefore the DAF as a whole may be heated, but the DAF may be appropriately peeled off and then heated with respect to the adhesive layer 122 alone.
Preferably, in this embodiment, the heating of the DAF refers to heating of the adhesion layer 122 after peeling off the release layer 123, and the specific heating process includes:
first, gas is introduced through the gas pipe and heated. The gas pipe is connected with a gas supply device, and the gas supply device can be a corresponding gas conveying pipeline in a packaging workshop and also can be a gas storage device such as a gas storage steel cylinder and the like. The gas having a certain temperature can be obtained by heating a gas pipe through which the gas is introduced. The gas is only a temperature carrier for heating the DAF, and the introduced gas is heated on the premise of not destroying the relevant physical and chemical properties of the DAF, and the specific type of the gas is not limited herein. Nitrogen or an inert gas (such as argon) is preferred in this practice.
Then, the roll fixed with the DAF is set on a fixing mechanism (a roller) of a laminator, the DAF is conveyed to a peeling plate (Peel plate) via a conveying mechanism, and the release layer 123 is peeled from the DAF. The released layer 123 is transferred to a box for recovering the released layer 123 through a transfer mechanism, the released DAF (the adhesion layer 122 and the substrate layer 121) is transferred to the ceramic vacuum adsorption platform 10 for carrying the wafer 100 along a transfer direction different from the transfer direction of the released layer 123, and during the transfer process, one surface of the adhesion layer 122 is adhered with the substrate layer 121, and the other surface is exposed to the air, as shown in fig. 3.
Then, the adhesion layer 122 exposed during the conveying process is purged and heated by the heated gas, so that the adhesion layer 122 has a certain temperature. For example, the gas tube may be moved uniformly in a certain direction at a certain distance from the surface of the adhesion layer 122 to uniformly purge the adhesion layer 122, so that the adhesion layer 122 is heated uniformly. The temperature range of the gas after heating is 30-70 ℃, and the surface temperature of the adhesion layer 122 after heating is 20-60 ℃, for example, 30 ℃, 40 ℃ or 50 ℃ and the like. The temperature of the gas and the temperature of the surface of the adhesive layer 122 after the gas purge may be measured by a temperature measuring device, such as an infrared temperature measuring gun or a temperature sensor, to ensure that the adhesive layer 122 reaches a predetermined temperature.
Specifically, the gas pipe may be moved in a plane parallel to the adhesive layer 122 when the adhesive layer 122 is transferred to a certain position, and the moving direction of the gas pipe may be perpendicular to the transfer direction of the adhesive layer 122 or parallel to the transfer direction of the adhesive layer 122. Specifically, the gas pipe may move linearly or in a zigzag form, and the moving speed of the gas pipe and the amplitude of the gas pipe fluctuation may be determined according to the actual conditions, such as the transfer rate of the adhesive layer 122, the pipe diameter of the gas pipe, the distance between the gas pipe and the adhesive layer 122, and the flow rate of the gas in the gas pipe. Of course, the above arrangement may be adopted, and the number of the gas pipes (for example, two gas pipes) is increased, and the gas pipes are mutually matched and moved to uniformly purge the adhesion layer 122. In this embodiment, the gas tube is heated without affecting the movement of the gas tube, for example, a section of the gas tube different from the gas outlet is heated, the tube body near the gas outlet of the moving gas tube scans and heats the adhesion layer 122, or the gas can be heated in a concentrated manner, and the gas with a certain temperature is obtained and then conveyed and coupled through the gas tube. The adhesive layer 122 is subjected to sweeping heating.
In another embodiment of this embodiment, a gas tube set is provided, for example, a plurality of gas tubes or a specific gas tube arranged in parallel, the width of the gas tube set is greater than or equal to the width of the DAF (the adhesion layer 122), the gas tube set is fixedly arranged on a plane parallel to the surface (the surface exposed to air) of the adhesion layer 122, and the adhesion layer 122 is subjected to purging heating during transportation, that is, the adhesion layer 122 is heated by not moving the gas tube set. Of course, a cyclic heating method may also be adopted, in which a plurality of heating points (gas tube sets) are disposed on the conveying path of the adhesive layer 122, and the conveying speed of the adhesive layer 122 is controlled, so that the adhesive layer 122 is heated multiple times to reach a desired heating temperature, and then conveyed to the wafer 100 to be bonded to the wafer 100. Of course, the gas tube set in this embodiment can be replaced by other heating devices, such as an infrared heating tube.
In another embodiment of the present invention, the wafer 100 may be filmed in a certain sealed space, and a gas is introduced into the sealed space and heated in a certain manner, so that the DAF is in a gas atmosphere with a certain temperature, thereby achieving the purpose of heating the DAF. For example, the fixing mechanism of the ceramic vacuum adsorption platform 10 and the DAF reel, the peeling mechanism (peeling plate) of the DAF, the conveying mechanism for conveying the DAF, and the pressing mechanism (pressing roller) of the DAF may be sealed in a space through the glass window, and a gas with a certain temperature may be introduced into the sealed glass window, or a desired temperature of the film may be provided in the glass window by other means.
It should be noted that, in the present embodiment, the step S01 and the step S02 do not have a sequential order, that is, the step S01 and the step S02 are provided simultaneously (including the wafer backside thinning process mentioned later) and the step S02 is performed sequentially, or sequentially, and the specific sequential order is not limited.
Next, step S03 is executed to attach the adhesive film 120 to the surface of the substrate on which the pad 101 is formed, so that the adhesive film 120 is attached to the pad 101.
Preferably, the wafer 100 is subjected to a thinning process before the film pasting process, and thinning the wafer 100 is beneficial to reducing the overall thickness of the chip to be formed. Specifically, a thinning process may be performed on the back surface (different from the surface on which the pad 101 is formed) of the wafer 100, for example, the back surface of the wafer 100 may be thinned through one or more of Chemical Mechanical Polishing (CMP), wet etching, and dry etching, and the thickness of the thinned wafer 100 is, for example, 150 μm to 200 μm.
Then, as shown in fig. 2, the thinned wafer 100 is placed on a ceramic vacuum adsorption platform 10 of a laminator, the back surface (different from the surface on which the pad 101 is formed) of the wafer 100 is close to the ceramic vacuum adsorption platform 10, and the front surface (the surface on which the pad 101 is formed) of the wafer 100 is far away from the ceramic vacuum adsorption platform 10.
Next, the heated DAF (including only the adhesive layer 122 and the base layer 121 in this case) is bonded to the front surface (the surface on which the pad 101 is formed) of the wafer 100, and the adhesive layer 122 (the surface exposed to the air after the release layer 123 is peeled) is in direct contact with the surface on which the pad 101 is formed of the wafer 100. Can be in through compression roller pair laminating in the laminator wafer 100 positive pasting film exerts a pressfitting power, be favorable to the adhesion layer 122 with wafer 100 is effective pressfitting, avoids again the wafer is cracked, pressfitting power is 0.1MPa to 1 MPa. It can be seen that the hot-pressed DAF (which only includes the adhesive layer 122 and the base layer 121) is completely attached to the surface of the wafer 100 on which the pad 101 is formed. The adhesive layer 122 is softened moderately by effective heating and can maintain an uncured state, the moderately softened adhesive layer 122 has certain fluidity, and can completely fill the opening 103 on the pad 101 under the action of certain pressing force, so that the adhesive layer 122 and the pad 101 are completely attached as much as possible, as shown in fig. 4D, bubbles generated on the surface of the wafer 100 in the attaching process are avoided, further, interference on subsequent processes is avoided, and the reliability of the product is ensured. In addition, after the wafer lamination process is finished, the substrate layer 121 adhered to the other side of the adhesive layer 122 may be selectively peeled off or retained according to the actual needs of the subsequent specific process.
In another embodiment of the present invention, before the adhesion layer 122 is attached to the surface of the wafer 100 on which the bonding pad is formed, the wafer 100 is heated while the DAF is heated, and both of them cooperate to facilitate the attachment of the adhesion layer 122 and the wafer 100 to be more uniform and dense. In specific implementation, the ceramic vacuum adsorption platform 10 may be heated by using an electromagnetic induction principle, so as to further heat the wafer 100 on the ceramic vacuum adsorption platform 10, or the wafer 100 may be heated by using the above gas heating method, for example, the wafer 100 may be uniformly purged by using the heated gas, or the wafer 100 may be placed in a gas atmosphere with a certain temperature. The heated DAF is then applied to the heated wafer 100. Certainly, in the process of applying the DAF to the wafer 100 (for example, a pressing roller applies a pressing force to an adhesive film attached to the front surface of the wafer 100), the ceramic vacuum adsorption platform 10 may be kept heated, so that the DAF and the wafer 100 are uniformly attached, and the heating temperature and the heating time of the ceramic vacuum adsorption platform 10 may be specifically set according to actual conditions such as a composition of the DAF (the adhesive layer 122) and a heat conduction condition of the ceramic vacuum adsorption platform 10, optionally, the heating range of the ceramic vacuum adsorption platform 10 is 20 ℃ to 70 ℃.
In addition, the substrate film pasting method provided by the embodiment of the invention further comprises the following steps: and after the pasting film is pasted on the surface of the wafer with the bonding pad, precuring the pasting film. Preferably, the adhesive film is pre-cured by ultraviolet irradiation. In this embodiment, the DAF is cured by Ultraviolet (UV) irradiation, and after the DAF is mounted, the DAF is still in a highly adhesive colloidal state, and after the DAF is irradiated by the UV irradiation of the UV irradiation process equipment, the DAF may generate a cross-linking reaction, so as to perform a pre-curing function, prepare for subsequent dicing, and prevent the DAF from overflowing within a period of time (for example, 30 days) after dicing, so that the DAF on the surfaces of two adjacent chips in the dicing channel may be adhered, which may cause difficulty in picking up the packaged chips. It should be noted that the DAF is still colloidal and non-glassy after the uv irradiation is completed in this embodiment.
Correspondingly, the invention also provides a packaging method, which comprises the following steps:
first, the base film attaching method is used to attach a film adhesive (DAF)120 to the surface of the wafer 100 on which the pad 101 is formed.
Then, the wafer 100 with the adhesive film 120 is cut into individual chips 110. The dicing method is, for example, a standard wafer dicing method, such as mechanical dicing, laser dicing, etc., and the diced adhesive film 120 is still adhered to the front surface of the chip 110, i.e., DAF (the adhesive layer 122 and the base layer 121) is adhered to the surface of the individual chip 110 formed after dicing.
Next, the individual chip 110 is picked up, at this time, the adhesion layer 122 is separated from the base layer 121, the adhesion layer 122 is attached to the front surface (the surface on which the pad 101 is formed) of the chip 110, and is picked up and detached from the base layer 121 together with the chip 110 and is attached to a corresponding carrier, the carrier may be a printed circuit board, a lead frame, a chip, or the like, and a suitable carrier is selected for different packaging methods, and a subsequent plastic packaging (Molding) process is performed, so as to complete the semiconductor packaging.
The following describes the packaging method provided by the embodiment of the present invention in more detail by taking Fan-Out Wafer Level Package (FOWLP) as an example.
First, a carrier 200 is taken out for cleaning, and impurities and contaminants on the carrier 200 are removed by the cleaning. The carrier 200 may be a metal substrate, a silicon substrate, a glass substrate, a substrate made of an organic material, or the like. The carrier 200 may have a regular shape (e.g., circular, square) or an irregular shape.
Then, a pick-and-place apparatus is used to attach the divided chip 110 to the carrier 200 with its front surface (the surface to which the adhesive layer 122 is attached) facing downward, so as to reset the chip 110 on the carrier 200, as shown in fig. 5A. It is understood that only two chips 110 are shown in fig. 5A, but the number of chips 110 arranged on the carrier 200 may be larger in practical applications.
Then, the carrier 200 with the chip 110 attached thereon can be placed in an oven with a certain pressure, the adhesion between the adhesion layer 122 and the carrier 200 is increased by means of pressure baking, and the DAF (the adhesion layer 122) is subjected to a second pre-curing treatment, wherein the pressure is 2MPa to 10MPa, the temperature is 60 ℃ to 150 ℃, and the baking time is 10min to 120 min.
Next, the carrier 200 may be covered with the Molding compound 104 through an injection Molding process to perform Molding (Molding) on the carrier 200 with the chip 110 through the Molding compound 104, as shown in fig. 5B, wherein the temperature during the Molding process is higher than the curing temperature of the adhesive layer 122, and the adhesive layer 122 is completely cured. Illustratively, the molding material 104 includes a thermosetting resin that softens or flows during the molding process, has a plastic property, can be formed into a certain shape, and undergoes a chemical reaction to be cross-linked and cured. The injection molding material 104 may include at least one of thermosetting resins such as phenol resin, urea resin, melamine-formaldehyde resin, epoxy resin, unsaturated resin, polyurethane, and polyimide. The molding material 104 is capable of completely encapsulating the chip 110 and preferably has a flat upper surface to provide a flat process surface for subsequent processing. The molding material 104 also covers the surface of the carrier 200 not covered by the chips 110 and fills the voids between adjacent chips.
Then, the carrier 200 is thinned by grinding, a patterned mask layer is formed on the carrier 200, a part of the carrier 200 and a part of the adhesion layer 122 are removed by a photolithography and etching process, the bonding pad 101 on the surface of the chip 110 is exposed, and the molded chip is inverted by 180 degrees, so that the front surface (the surface on which the bonding pad 101 is formed) of the chip 110 faces upward. In this embodiment, in the process of attaching the film to the wafer 100, the adhesive film (the adhesive layer 122 in the DAF) is directly heated, so that bubbles between the wafer 100 and the adhesive film (the adhesive layer 122 in the DAF), especially bubbles at the pad 101, are reduced or even avoided, and therefore, in the process of removing a portion of the adhesive layer 122 to expose the pad 101 by etching, the etching is not affected by the bubble problem (for example, the bubbles are broken, and the gas in the bubbles destroys the etching chamber environment).
Then, forming a metal layer on the openings of the thinned carrier 200 and the pad 101 by electroplating, chemical plating or sputtering, forming a photoresist layer on the metal layer, forming a redistribution metal line pattern by exposure and development processes, and forming a redistribution metal layer (RDL)105 by using the redistribution metal line pattern as a mask, as shown in fig. 5C, the redistribution metal layer 105 is made of copper, copper-chromium alloy or copper-titanium alloy, and the redistribution metal layer (RDL)105 is connected with the pad 101 on the surface of the chip 110 and extends to a position where a solder ball bump is formed subsequently. As described above, in the process of attaching the film to the wafer 100, the present embodiment reduces or even avoids the problem of bubbles on the surface of the wafer 100 (especially at the pad 101), and can effectively avoid the open circuit phenomenon in the redistribution metal layer 105 caused by bubbles at the pad 101 in the process of forming the redistribution metal layer 105.
Then, a dielectric layer 106 is formed (for example, by a coating process) on the redistribution metal layer 105, an opening is formed in the dielectric layer 106 by photolithography and etching to expose the redistribution metal layer 105, an Under Bump Metallurgy (UBM) layer 107 is formed in the opening, and then, ball-mounting reflow is performed on the under bump metallurgy layer 107 to form a solder ball bump 108, as shown in fig. 5D, where the solder ball bump 108 is made of a metal material including tin, lead, copper, silver, gold, or an alloy thereof.
Finally, the structure is separated and cut (Singulation) by a standard process of a post-packaging semiconductor process to obtain a single chip, as shown in fig. 5E.
In summary, in the substrate film attaching method and the packaging method provided by the embodiments of the invention, a bonding film is provided, and the bonding film is heated to a predetermined temperature and then attached to the surface of the substrate on which the bonding pad is formed, so that the bonding film and the bonding pad are attached as much as possible. According to the invention, before the adhesive film is pasted on the wafer, the adhesive film is subjected to heating treatment, so that the adhesive film is uniformly heated, bubbles are prevented from being generated on the surface of the wafer in the pasting process, further the interference on the subsequent processing procedure is prevented, and the reliability of the product is ensured. Further, compared with the existing substrate film pasting process, the pasting film is directly heated instead of indirect heating, the pasting film is easier to obtain the optimal process temperature, and the process control is more intuitive.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (20)
1. A method of laminating a substrate comprising:
providing a substrate, wherein a plurality of bonding pads are formed on the surface of the substrate;
providing a sticky film, and heating the sticky film to a preset temperature; and
and pasting the pasting film on the surface of the substrate with the bonding pad, so that the pasting film is pasted with the bonding pad.
2. The method of claim 1, wherein the heating temperature of the adhesive film is 20 ℃ to 60 ℃.
3. The method of claim 1, wherein the adhesive film is DAF.
4. The method of claim 3, wherein the DAF comprises: a base layer, an adhesive layer, and a release layer, the adhesive layer disposed between the base layer and the release layer.
5. The method of claim 4, wherein the base layer and the adhesive layer are attached to the surface of the base on which the pad is formed after the release layer is separated from the DAF, and the adhesive layer is attached to the pad.
6. The method of claim 5, wherein the step of heating the adhesive comprises:
introducing and heating a gas;
peeling the release layer from the DAF; and the number of the first and second groups,
and blowing and heating the adhesion layer by using the heated gas.
7. The method of claim 6, wherein the heating of the gas is achieved by heating a gas tube into which the gas is introduced.
8. The method of claim 6, wherein the gas is heated at a temperature of 30 ℃ to 70 ℃.
9. The substrate laminating method of claim 6, wherein the adhesive layer is heated to soften the adhesive layer and maintain an uncured state.
10. The method of claim 6, wherein the adhesive layer is heated at a temperature of 20 ℃ to 60 ℃.
11. The substrate laminating method according to any one of claims 1 to 10, wherein the substrate is a wafer, the surface of the substrate on which the bonding pad is formed is further formed with a passivation layer, the passivation layer covers the surface of the substrate on which the bonding pad is formed and is formed with an opening over the bonding pad to expose the bonding pad.
12. The method of claim 11, wherein the adhesive film fills the opening.
13. The substrate lamination process of any one of claims 1 to 10, further comprising heating the substrate.
14. The method of claim 13, wherein before heating the substrate, a surface of the substrate other than the surface on which the pad is formed is thinned.
15. The method for laminating a film on a substrate according to claim 14, wherein the substrate is thinned by grinding, chemical mechanical polishing, wet etching or dry etching.
16. The substrate laminating method according to claim 14, wherein the thickness of the thinned substrate is 150 μm to 200 μm.
17. The substrate laminating method according to any one of claims 1 to 10, wherein after the adhesive film is laminated on the surface of the substrate on which the bonding pads are formed, the adhesive film is pre-cured by ultraviolet irradiation.
18. A method of packaging, comprising:
applying an adhesive film to a surface of a substrate on which pads are formed by using the substrate film attaching method according to any one of claims 1 to 17;
cutting the substrate pasted with the pasting film into a plurality of independent chips; and the number of the first and second groups,
and attaching the chip to a carrier.
19. The method of claim 18, wherein the carrier is a printed circuit board, a lead frame, or a chip.
20. The packaging method of claim 18, wherein the packaging method is a fan-out wafer level packaging method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811605088.4A CN111370360A (en) | 2018-12-26 | 2018-12-26 | Substrate film pasting method and packaging method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811605088.4A CN111370360A (en) | 2018-12-26 | 2018-12-26 | Substrate film pasting method and packaging method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111370360A true CN111370360A (en) | 2020-07-03 |
Family
ID=71212157
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811605088.4A Pending CN111370360A (en) | 2018-12-26 | 2018-12-26 | Substrate film pasting method and packaging method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111370360A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI780825B (en) * | 2020-10-30 | 2022-10-11 | 大陸商江蘇魯汶儀器有限公司 | Photoresist stripping method |
| DE102022132967A1 (en) | 2022-12-12 | 2024-06-13 | Infineon Technologies Ag | Fan-out wafer-level packages and related manufacturing processes |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1341057A (en) * | 1999-01-25 | 2002-03-20 | 3M创新有限公司 | Method of applying adhesive coated film |
| JP2008098427A (en) * | 2006-10-12 | 2008-04-24 | Toshiba Corp | Semiconductor device manufacturing method |
| JP2010056407A (en) * | 2008-08-29 | 2010-03-11 | Hitachi Chem Co Ltd | Wafer processing tape |
| CN106531636A (en) * | 2015-09-09 | 2017-03-22 | 三星电子株式会社 | Semiconductor chip package and method of manufacturing the same |
| CN108336019A (en) * | 2017-09-30 | 2018-07-27 | 中芯集成电路（宁波）有限公司 | The method and wafer level packaging structure of conductive plunger are formed in a kind of wafer-level packaging |
| CN108695227A (en) * | 2018-06-21 | 2018-10-23 | 上海飞骧电子科技有限公司 | Solve the problems, such as the passive device GaAs method for adhering film and chip of encapsulation excessive glue |
-
2018
- 2018-12-26 CN CN201811605088.4A patent/CN111370360A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1341057A (en) * | 1999-01-25 | 2002-03-20 | 3M创新有限公司 | Method of applying adhesive coated film |
| JP2008098427A (en) * | 2006-10-12 | 2008-04-24 | Toshiba Corp | Semiconductor device manufacturing method |
| JP2010056407A (en) * | 2008-08-29 | 2010-03-11 | Hitachi Chem Co Ltd | Wafer processing tape |
| CN106531636A (en) * | 2015-09-09 | 2017-03-22 | 三星电子株式会社 | Semiconductor chip package and method of manufacturing the same |
| CN108336019A (en) * | 2017-09-30 | 2018-07-27 | 中芯集成电路（宁波）有限公司 | The method and wafer level packaging structure of conductive plunger are formed in a kind of wafer-level packaging |
| CN108695227A (en) * | 2018-06-21 | 2018-10-23 | 上海飞骧电子科技有限公司 | Solve the problems, such as the passive device GaAs method for adhering film and chip of encapsulation excessive glue |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI780825B (en) * | 2020-10-30 | 2022-10-11 | 大陸商江蘇魯汶儀器有限公司 | Photoresist stripping method |
| DE102022132967A1 (en) | 2022-12-12 | 2024-06-13 | Infineon Technologies Ag | Fan-out wafer-level packages and related manufacturing processes |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10930617B2 (en) | Packaging method and package structure of wafer-level system-in-package | |
| TWI446419B (en) | Methods of fabricating stacked device and handling device wafer | |
| US6946328B2 (en) | Method for manufacturing semiconductor devices | |
| US7968992B2 (en) | Multi-chip package structure and method of fabricating the same | |
| US8293583B2 (en) | Method for manufacturing semiconductor device | |
| US8535983B2 (en) | Method of manufacturing a semiconductor device | |
| TWI733049B (en) | Semiconductor package and manufacturing method thereof | |
| US11955460B2 (en) | Advanced info POP and method of forming thereof | |
| CN101752272B (en) | Method of manufacturing semiconductor device | |
| US20130056141A1 (en) | Die package including encapsulated die and method of manufacturing the same | |
| US11342321B2 (en) | Manufacturing method of package on package structure | |
| KR102295360B1 (en) | Integrated fan-out packages and methods of forming the same | |
| CN105742198A (en) | Die bonder and method of using the same | |
| US11990350B2 (en) | Semiconductor devices with flexible reinforcement structure | |
| CN111370360A (en) | Substrate film pasting method and packaging method | |
| CN112117250B (en) | Chip packaging structure and manufacturing method thereof | |
| CN109300794B (en) | Package structure and method for forming the same | |
| CN108962772B (en) | Package structure and method for forming the same | |
| CN221262337U (en) | Workpiece chuck and workpiece conveying equipment | |
| JP7459576B2 (en) | Panel and manufacturing method thereof, panel manufacturing member and manufacturing method thereof, and semiconductor chip | |
| US20240063048A1 (en) | Workpiece chuck, workpiece handling apparatus, manufacturing method of semiconductor package | |
| TWI841586B (en) | Chip packaging method | |
| TWI776164B (en) | Semiconductor device and method of manufacturing the same | |
| US11502057B2 (en) | Semiconductor device and manufacturing method thereof | |
| CN112133695B (en) | System-in-package structure and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20200703 |
|
| WD01 | Invention patent application deemed withdrawn after publication |