CN111370315A - Method for welding flip chip and substrate by using thermosetting conductive adhesive - Google Patents
Method for welding flip chip and substrate by using thermosetting conductive adhesive Download PDFInfo
- Publication number
- CN111370315A CN111370315A CN201811587159.2A CN201811587159A CN111370315A CN 111370315 A CN111370315 A CN 111370315A CN 201811587159 A CN201811587159 A CN 201811587159A CN 111370315 A CN111370315 A CN 111370315A
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- CN
- China
- Prior art keywords
- conductive adhesive
- thermosetting conductive
- substrate
- chip
- welding
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4885—Wire-like parts or pins
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
- H01L2224/13082—Two-layer arrangements
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
The invention discloses a method for welding a flip chip and a substrate by thermosetting conductive adhesive, aiming at providing a method for welding the flip chip and the substrate by avoiding cold joint or solderless, which has the technical scheme key points that the method comprises the following welding and flip steps: s01, directly dipping the flip chip into thermosetting conductive adhesive (or dispensing the thermosetting conductive adhesive on the substrate pins); s02, heating the bonder (or the base station) to semi-cure the thermosetting conductive adhesive; and S03, heating the processed substrate pins to completely cure the thermosetting conductive adhesive. The thermosetting conductive adhesive is semi-cured during pasting, and a certain sinking distance is formed during pressing, so that the phenomenon that a solder ball and a pin are subjected to insufficient soldering or no soldering due to the inclination of a chip is avoided; avoiding the false soldering or no soldering caused by the fact that the solder ball can not drop due to surface tension; avoiding cold joint or no joint caused by bending of the substrate.
Description
Technical Field
The invention belongs to the field of welding and inversion, and particularly relates to a method for welding an inverted chip and a substrate by using thermosetting conductive adhesive.
Background
At present, chinese patent publication No. CN1487571A discloses a flip chip bonding technique. The packaging process is a novel packaging process of the IC assembly. The method is realized by welding the chip and pins of various plug-ins on one side of the plug-ins of the mainboard. The short circuit phenomenon caused by over-dense welding points of the pins can be solved, and the yield of the SMT technology is improved. The number of the pins can be increased, the chip with higher integration level is adapted, and in addition, the requirement of high-yield solder ball silicon boards is met through the solder ball process of the flip chip welding technology. Silicon plate solder ball process all joints made by soldering are shown on the chip, eliminating the need for additional soldering on the substrate. The invention realizes welding at one side of the plug-in unit, and welds the metal structure and the solder ball on the last layer metal plate using lead as the matrix, and welds the solder ball on the silicon chip. Plus an untreated silicon plate with a diameter of 100 and 200 mm. The thickness of the silicon plate is 100-150 mm, and the minimum thickness of the silicon plate is 0.5-0.6 mm. The welding alloy is suitable for 63SH/PB and low a eutectic double welding alloy welding materials, lead-based base metal plates, round openings and solderable structures.
Current flip chip bonding:
flux: and adhering the chip and the substrate, removing the oxide layer and reducing the surface tension of the solder ball.
Solder ball: the flip chip is provided with solder balls implanted on the surface of the chip for connecting the chip circuit and the substrate.
The current welding mode is as follows:
a) after the upside-down mounting type chip is sucked, the tin ball is dipped with the soldering flux;
b) the bonder is used for bonding the chip and the substrate;
c) and volatilizing the soldering flux at high temperature to melt the solder balls and solder the substrate.
The current welding mode mainly realizes circuit conduction by melting of the solder balls and welding of basic pins, the welding between the solder balls and the pins is easily influenced by factors such as chip inclination, oxidation and surface tension of the solder balls and a substrate, bending of the substrate and the like, and circuit test disconnection failure is shown.
The prior art of planting balls on the surface of a chip is to plant a copper column first and then plant a solder ball at the front end of the copper column, and the process is relatively complex.
Disclosure of Invention
The invention aims to provide a method for welding a flip chip and a substrate by using thermosetting conductive adhesive. Which has the advantage of avoiding cold joints or no joints.
The purpose of the invention can be realized by the following technical scheme:
a method for welding a flip chip and a substrate by using thermosetting conductive adhesive comprises a chip, substrate pins and thermosetting conductive adhesive, wherein copper columns are implanted on the surface of the chip,
the method comprises the following welding and flip-chip steps:
s01, directly dipping the flip chip into thermosetting conductive adhesive (or dispensing the thermosetting conductive adhesive on the substrate pins);
s02, heating the bonder (or the base station) to semi-cure the thermosetting conductive adhesive;
and S03, heating the processed substrate pins to completely cure the thermosetting conductive adhesive.
Preferably, a part of catalyst is added into the thermosetting conductive adhesive to realize metal redox reaction.
By adopting the technical scheme, good conductivity can be realized, the conductive material is in a liquid state before being heated and is gradually hardened along with heating, and the permanence is finally achieved; part of the catalyst is added to realize the metal oxidation-reduction reaction.
The invention has the beneficial effects that:
the copper column is planted on the surface of the chip, so that the step of planting the solder ball is saved;
the use of the soldering flux is reduced by using the glue;
the thermosetting conductive adhesive is semi-cured during pasting, and a certain sinking distance is formed during pressing, so that the phenomenon that a solder ball and a pin are subjected to insufficient soldering or no soldering due to the inclination of a chip is avoided; avoiding the false soldering or no soldering caused by the fact that the solder ball can not drop due to surface tension; avoiding cold joint or no joint caused by bending of the substrate.
Drawings
Fig. 1 is a schematic view of a soldering flip-chip state structure.
In the figure, the position of the upper end of the main shaft,
1. a chip; 2. a substrate pin; 3. thermosetting conductive adhesive; 4. a copper pillar;
Detailed Description
Example 1: a method for welding a flip chip and a substrate by using thermosetting conductive adhesive comprises a chip, substrate pins and thermosetting conductive adhesive, wherein copper columns are implanted on the surface of the chip,
the method comprises the following welding and flip-chip steps:
s01, directly dipping the flip chip into thermosetting conductive adhesive (or dispensing the thermosetting conductive adhesive on the substrate pins);
s02, heating the bonder (or the base station) to semi-cure the thermosetting conductive adhesive;
and S03, heating the processed substrate pins to completely cure the thermosetting conductive adhesive.
Partial catalyst is added into the thermosetting conductive adhesive to realize metal redox reaction.
The conductive material can realize good conductivity, is in a liquid state before being heated, is gradually hardened along with heating, and finally reaches the permanence; part of the catalyst is added to realize the metal oxidation-reduction reaction.
The copper column is planted on the surface of the chip, so that the step of planting the solder ball is saved;
the use of the soldering flux is reduced by using the glue;
the thermosetting conductive adhesive is semi-cured during pasting, and a certain sinking distance is formed during pressing, so that the phenomenon that a solder ball and a pin are subjected to insufficient soldering or no soldering due to the inclination of a chip is avoided; avoiding the false soldering or no soldering caused by the fact that the solder ball can not drop due to surface tension; avoiding cold joint or no joint caused by bending of the substrate.
Finally, it should be noted that: although the present invention has been described in detail with reference to the above embodiments, it should be understood by those skilled in the art that: modifications and equivalents may be made thereto without departing from the spirit and scope of the invention, and the appended claims are intended to cover such modifications and equivalents as fall within the true spirit and scope of the invention.
Claims (2)
1. A method for welding a flip chip and a substrate by using thermosetting conductive adhesive is characterized in that: including chip, base plate pin and thermosetting conducting resin, the chip surface is planted there is the copper post, including following welding flip-chip step:
s01, directly dipping the flip chip into thermosetting conductive adhesive (or dispensing the thermosetting conductive adhesive on the substrate pins);
s02, heating the bonder (or the base station) to semi-cure the thermosetting conductive adhesive;
and S03, heating the processed substrate pins to completely cure the thermosetting conductive adhesive.
2. The method of claim 1, wherein the step of bonding the flip chip to the substrate comprises: partial catalyst is added into the thermosetting conductive adhesive to realize metal redox reaction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811587159.2A CN111370315A (en) | 2018-12-25 | 2018-12-25 | Method for welding flip chip and substrate by using thermosetting conductive adhesive |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811587159.2A CN111370315A (en) | 2018-12-25 | 2018-12-25 | Method for welding flip chip and substrate by using thermosetting conductive adhesive |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111370315A true CN111370315A (en) | 2020-07-03 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811587159.2A Pending CN111370315A (en) | 2018-12-25 | 2018-12-25 | Method for welding flip chip and substrate by using thermosetting conductive adhesive |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111370315A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102863924A (en) * | 2012-08-25 | 2013-01-09 | 华南理工大学 | Preparation method of silver-plated copper powder/epoxy resin conductive adhesive |
| CN103000538A (en) * | 2011-09-14 | 2013-03-27 | 南茂科技股份有限公司 | Method for manufacturing semiconductor package structure |
| CN104821368A (en) * | 2015-05-25 | 2015-08-05 | 叶志伟 | Flip LED packaging structure |
-
2018
- 2018-12-25 CN CN201811587159.2A patent/CN111370315A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103000538A (en) * | 2011-09-14 | 2013-03-27 | 南茂科技股份有限公司 | Method for manufacturing semiconductor package structure |
| CN102863924A (en) * | 2012-08-25 | 2013-01-09 | 华南理工大学 | Preparation method of silver-plated copper powder/epoxy resin conductive adhesive |
| CN104821368A (en) * | 2015-05-25 | 2015-08-05 | 叶志伟 | Flip LED packaging structure |
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Application publication date: 20200703 |