CN111367196A - W-band broadband variable fraction delay method and system - Google Patents

W-band broadband variable fraction delay method and system Download PDF

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CN111367196A
CN111367196A CN202010147483.3A CN202010147483A CN111367196A CN 111367196 A CN111367196 A CN 111367196A CN 202010147483 A CN202010147483 A CN 202010147483A CN 111367196 A CN111367196 A CN 111367196A
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farrow structure
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CN111367196B (en
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徐啸
王立权
黄杉
柴娟芳
沈荣
陆戈辉
张业鑫
汪书阁
臧海飞
程禹
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Shanghai Institute of Electromechanical Engineering
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Abstract

The invention provides a W-band broadband variable fraction delay method and a system, comprising the following steps: the coefficient calculation module designs a coefficient of a variable fractional delay filter based on a Farrow structure according to the delay precision; the N-M parameter optimization module is used for intelligently adapting the fitting order M and the filter length N; the parallel multipath filter coefficient mapping module expands the filter in multipath; the splitting matrix weighting module utilizes a fast parallel FIR algorithm to carry out filter structure simplification transformation to obtain a multi-path parallel high-efficiency variable fractional delay structure. The invention can break through the problem that the prior semi-physical simulation system realizes the accurate delay control of the triple signals in the array target system in the W-band wide-frequency band, and has simple system and low manufacturing cost.

Description

W-band broadband variable fraction delay method and system
Technical Field
The invention relates to the technical field of signal testing of a broadband radar system, in particular to a W-band broadband variable fraction delay method and a W-band broadband variable fraction delay system. In particular to a variable fractional delay method of a W-band broadband radar semi-physical simulation system, which is mainly used for performing variable fractional delay adjustment on radio frequency signals of broadband radar simulation systems with different working bands.
Background
In order to improve the imaging resolution of a radar imaging system, the instantaneous bandwidth of the radar is increased, and the instantaneous bandwidth of a typical chirp system imaging radar reaches the level of hundreds of megahertz or even gigahertz at present.
A W-band broadband imaging radar target simulation system designed for a W-band broadband imaging radar system can accurately simulate target motion only by keeping phases of all radiating antennas consistent (namely, distances from all the antennas to a tested radar are strictly consistent), but the W-band wavelength is short, and the strict consistency of the distances between the antennas (errors are smaller than 3mm) is difficult to realize through physical position adjustment. Therefore, the phase consistency of the triple radiation signals is ensured, and the simulation of the target space position is finally realized.
The digital radio frequency array system radiates echoes to the space through radio frequency signals sent by the digital signal processing module, the variable fraction delay module and the coarse control module. In a digital radio frequency array system, the delay precision of a variable fraction delay module is improved along with the improvement of a frequency band, the variable delay precision required by an X wave band system is in an ns level, and the variable delay precision required by a W wave band system is in a ps level.
The delay precision of the Farrow structure mainly depends on a polynomial fitting order, the signal delay precision required by a W-band (with the wavelength of 3mm) simulation system reaches 10ps magnitude, which requires the Farrow structure to adopt a higher fitting order, and further increases the number of filter taps in the Farrow structure, so that the Farrow structure needs to consume larger resources;
for broadband signals, in order to satisfy the nyquist sampling theorem, the sampling rate of a front-end AD chip of the variable fractional delay apparatus must be greater than 2 times of the bandwidth, because the processing clock of the FPGA has an upper limit (hundred megahertz level), the digital signal processing system usually adopts a multi-path (N-path) parallel structure for processing, so that a Farrow filter with N same coefficients is needed to implement variable fractional delay on the broadband signals, which will consume a large amount of FPGA multiplier resources, even exceed the maximum multiplier number of the current monolithic high-performance FPGA chip, and increase the complexity and design cost of the variable fractional delay module.
The W-band broadband variable fraction delay method utilizes a rapid FIR algorithm in a very large scale integrated circuit (VLSI) technology to design a variable fraction delay method based on a novel high-efficiency Farrow structure, effectively reduces multiplier resources required by a multipath parallel Farrow structure under the condition of not reducing delay precision, reduces the complexity and the design cost of a delay module, and can shorten the development period.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a variable fraction delay method of a W-band broadband radar semi-physical simulation system.
The variable fractional delay method of the W-band broadband radar semi-physical simulation system is characterized by comprising the following steps
Step S1: designing a variable fraction delay filter based on a Farrow structure, enabling the delay precision to meet the delay precision required to be realized, solving coefficients of each filter in the Farrow structure, and obtaining the variable fraction delay filter of a first Farrow structure;
step S2: according to the obtained variable fraction delay filter with the first Farrow structure, matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module to obtain an optimal fitting order M and the length N of the filter, and recalculating coefficients of each filter to obtain a variable fraction delay filter with a second Farrow structure;
step S3: l-path copying is carried out on the variable fractional delay filter of the second Farrow structure, and the filter coefficient is mapped to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank;
step S4: performing split matrix weighting processing on each sub-filter in each path in the generated three-dimensional Farrow structure filter bank to obtain a new filter coefficient and obtain a new three-dimensional Farrow structure filter bank;
step S5: and designing a multi-path parallel high-efficiency three-dimensional Farrow structure variable fractional delay structure according to the obtained third filter coefficient and the three-dimensional Farrow structure, so that the structure can carry out variable fractional delay on the broadband W-band radio-frequency signal.
Preferably, the step S1:
solving coefficients of each filter in the Farrow structure by using a Lagrange interpolation method;
the L refers to the parallel path number of the multi-path parallel architecture.
Preferably, the step S2:
and matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module according to the obtained variable fraction delay filter of the first Farrow structure, and simultaneously ensuring that the amplitude-frequency response and the phase-frequency response of the realization structure are greater than the delay precision in the effective bandwidth to obtain the optimal fitting order M and the length N of the filter.
Preferably, the obtaining of the best fit order M and the filter length N:
comparing the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the first Farrow structure with the amplitude-frequency response ji and the phase-frequency response of the variable fractional delay filter of the second Farrow structure, under the condition that the amplitude-frequency response and the phase-frequency response of the filter are larger than the delay precision in the effective bandwidth, M, N is smaller, consumed resources are less, the system efficiency is higher, and the optimal fitting order M and the filter length N are obtained.
Preferably, the splitting matrix weighting processing refers to matrix weighting of the filter by using a fast FIR algorithm in a Very Large Scale Integration (VLSI) technique, so as to obtain new filter coefficients.
The step S5: multiplying the obtained output of the new three-dimensional Farrow structure by the decimal delay amount, and then adding the result to obtain the final W-waveband broadband variable fractional delay implementation structure.
The variable fraction delay system of the W-band broadband radar semi-physical simulation system provided by the invention comprises
An initial coefficient calculation module: designing a variable fraction delay filter based on a Farrow structure, enabling the delay precision to meet the delay precision required to be realized, solving coefficients of each filter in the Farrow structure, and obtaining the variable fraction delay filter of a first Farrow structure;
an N-M parameter optimization module: according to the obtained variable fraction delay filter with the first Farrow structure, matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module to obtain an optimal fitting order M and the length N of the filter, and recalculating coefficients of the filters to obtain a variable fraction delay filter with a second Farrow structure;
a parallel multipath filter coefficient mapping module: l-path copying is carried out on the variable fractional delay filter of the second Farrow structure, and the filter coefficient is mapped to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank;
a split matrix weighting module: performing split matrix weighting processing on each sub-filter in each path in the generated three-dimensional Farrow structure filter bank to obtain a new filter coefficient and obtain a new three-dimensional Farrow structure filter bank;
a fraction weighting module: and designing a multi-path parallel high-efficiency three-dimensional Farrow structure variable fractional delay structure according to the obtained third filter coefficient and the three-dimensional Farrow structure, so that the structure can carry out variable fractional delay on the broadband W-band radio-frequency signal.
Preferably, the initial coefficient calculation module:
solving coefficients of each filter in the Farrow structure by using a Lagrange interpolation method;
the L refers to the parallel path number of the multi-path parallel architecture.
Preferably, the N-M parameter optimization module:
and matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module according to the obtained variable fraction delay filter of the first Farrow structure, and simultaneously ensuring that the amplitude-frequency response and the phase-frequency response of the realization structure are greater than the delay precision in the effective bandwidth to obtain the optimal fitting order M and the length N of the filter.
Preferably, the obtaining of the best fit order M and the filter length N:
comparing the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the first Farrow structure with the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the second Farrow structure, under the condition that the amplitude-frequency response and the phase-frequency response of the filter are larger than the delay precision in the effective bandwidth, the smaller the M, N, the less the consumed resources are, the higher the system efficiency is, and the optimal fitting order M and the filter length N are obtained.
Preferably, the splitting matrix weighting processing refers to matrix weighting of the filter by using a fast FIR algorithm in a Very Large Scale Integration (VLSI) technique, so as to obtain new filter coefficients.
The fraction weighting module: multiplying the obtained output of the new three-dimensional Farrow structure by the decimal delay amount, and then adding the result to obtain the final W-waveband broadband variable fractional delay implementation structure.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention designs a variable fraction delay method based on a novel high-efficiency Farrow structure by utilizing a rapid FIR algorithm in a very large scale integrated circuit (VLSI), and effectively reduces multiplier resources required by a multipath parallel Farrow structure under the condition of not reducing delay precision. The invention reduces the complexity and the design cost of the delay module, can shorten the development period, and simultaneously can improve the wave band coverage of the semi-physical simulation test system to the W wave band and expand the bandwidth of the simulation system to the GHz level.
2. The invention can break through the problem that the prior semi-physical simulation system realizes the accurate delay control of the triple signals in the array target system in the W-band wide-frequency band, and has simple system and low manufacturing cost.
Drawings
Other features, objects and advantages of the present invention will become more apparent upon reading of the detailed description of the non-limiting embodiments with reference to the following drawings:
FIG. 1 is a schematic diagram of a structural design process for realizing a high-efficiency high-precision broadband variable delay algorithm.
Shown in fig. 1:
module 1 is an initial coefficient calculation module;
the module 2 is an N-M parameter optimization module;
the module 3 is a parallel multipath filter coefficient mapping module;
module 4 splits the matrix weighting module;
module 5 fractional weighting module;
fig. 2 is a schematic diagram of a Farrow structure variable fractional delay filter.
FIG. 3 is a schematic diagram of a four-way parallel three-dimensional Farrow structure variable fractional delay filter bank.
FIG. 4 is a schematic diagram of a four-way parallel efficient three-dimensional Farrow structure variable fractional delay structure.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that it would be obvious to those skilled in the art that various changes and modifications can be made without departing from the spirit of the invention. All falling within the scope of the present invention.
The W-band broadband variable fraction delay method provided by the invention is characterized by comprising the following steps
Step S1: designing a variable fraction delay filter based on a Farrow structure, enabling the delay precision to meet the delay precision required to be realized, solving coefficients of each filter in the Farrow structure, and obtaining the variable fraction delay filter of a first Farrow structure;
step S2: according to the obtained variable fraction delay filter with the first Farrow structure, matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module to obtain an optimal fitting order M and the length N of the filter, and recalculating coefficients of each filter to obtain a variable fraction delay filter with a second Farrow structure;
step S3: l-path copying is carried out on the variable fractional delay filter of the second Farrow structure, and the filter coefficient is mapped to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank;
step S4: performing split matrix weighting processing on each sub-filter in each path in the generated three-dimensional Farrow structure filter bank to obtain a new filter coefficient and obtain a new three-dimensional Farrow structure filter bank;
step S5: and designing a multi-path parallel high-efficiency three-dimensional Farrow structure variable fractional delay structure according to the obtained third filter coefficient and the three-dimensional Farrow structure, so that the structure can carry out variable fractional delay on the broadband W-band radio-frequency signal.
Preferably, the step S1:
solving coefficients of each filter in the Farrow structure by using a Lagrange interpolation method;
the L refers to the parallel path number of the multi-path parallel architecture.
Preferably, the step S2:
and matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module according to the obtained variable fraction delay filter of the first Farrow structure, and simultaneously ensuring that the amplitude-frequency response and the phase-frequency response of the realization structure are greater than the delay precision in the effective bandwidth to obtain the optimal fitting order M and the length N of the filter.
Preferably, the obtaining of the best fit order M and the filter length N:
comparing the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the first Farrow structure with the amplitude-frequency response ji and the phase-frequency response of the variable fractional delay filter of the second Farrow structure, under the condition that the amplitude-frequency response and the phase-frequency response of the filter are larger than the delay precision in the effective bandwidth, M, N is smaller, consumed resources are less, the system efficiency is higher, and the optimal fitting order M and the filter length N are obtained.
Preferably, the splitting matrix weighting processing refers to matrix weighting of the filter by using a fast FIR algorithm in a Very Large Scale Integration (VLSI) technique, so as to obtain new filter coefficients.
The step S5: multiplying the obtained output of the new three-dimensional Farrow structure by the decimal delay amount, and then adding the result to obtain the final W-waveband broadband variable fractional delay implementation structure.
The variable fraction delay system of the W-band broadband radar semi-physical simulation system can be realized through the step flow of the variable fraction delay method of the W-band broadband radar semi-physical simulation system. A person skilled in the art may understand the variable fractional delay method of the W-band broadband radar semi-physical simulation system as a preferred example of the variable fractional delay system of the W-band broadband radar semi-physical simulation system.
The W-band broadband variable fractional delay system provided by the invention comprises
An initial coefficient calculation module: designing a variable fraction delay filter based on a Farrow structure, enabling the delay precision to meet the delay precision required to be realized, solving coefficients of each filter in the Farrow structure, and obtaining the variable fraction delay filter of a first Farrow structure;
an N-M parameter optimization module: according to the obtained variable fraction delay filter with the first Farrow structure, matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module to obtain an optimal fitting order M and the length N of the filter, and recalculating coefficients of the filters to obtain a variable fraction delay filter with a second Farrow structure;
a parallel multipath filter coefficient mapping module: l-path copying is carried out on the variable fractional delay filter of the second Farrow structure, and the filter coefficient is mapped to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank;
a split matrix weighting module: performing split matrix weighting processing on each sub-filter in each path in the generated three-dimensional Farrow structure filter bank to obtain a new filter coefficient and obtain a new three-dimensional Farrow structure filter bank;
a fraction weighting module: and designing a multi-path parallel high-efficiency three-dimensional Farrow structure variable fractional delay structure according to the obtained third filter coefficient and the three-dimensional Farrow structure, so that the structure can carry out variable fractional delay on the broadband W-band radio-frequency signal.
Preferably, the initial coefficient calculation module:
solving coefficients of each filter in the Farrow structure by using a Lagrange interpolation method;
the L refers to the parallel path number of the multi-path parallel architecture.
Preferably, the N-M parameter optimization module:
and matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module according to the obtained variable fraction delay filter of the first Farrow structure, and simultaneously ensuring that the amplitude-frequency response and the phase-frequency response of the realization structure are greater than the delay precision in the effective bandwidth to obtain the optimal fitting order M and the length N of the filter.
Preferably, the obtaining of the best fit order M and the filter length N:
comparing the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the first Farrow structure with the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the second Farrow structure, under the condition that the amplitude-frequency response and the phase-frequency response of the filter are larger than the delay precision in the effective bandwidth, the smaller the M, N, the less the consumed resources are, the higher the system efficiency is, and the optimal fitting order M and the filter length N are obtained.
Preferably, the splitting matrix weighting processing refers to matrix weighting of the filter by using a fast FIR algorithm in a Very Large Scale Integration (VLSI) technique, so as to obtain new filter coefficients.
The fraction weighting module: multiplying the obtained output of the new three-dimensional Farrow structure by the decimal delay amount, and then adding the result to obtain the final W-waveband broadband variable fractional delay implementation structure.
The present invention will be described more specifically below with reference to preferred examples.
Preferred example 1:
the invention aims to solve the technical problem of providing a variable fraction delay method of a W-band broadband radar semi-physical simulation system, which designs a variable fraction delay method based on a novel efficient Farrow structure by utilizing a fast FIR algorithm in a very large scale integrated circuit (VLSI), and effectively reduces multiplier resources required by a multipath parallel Farrow structure under the condition of not reducing delay precision. The invention reduces the complexity and the design cost of the delay module, shortens the development period, improves the wave band coverage of the semi-physical simulation test system to the W wave band, and expands the bandwidth of the simulation system to the GHz level.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention provides a W-band broadband variable fraction delay method, which specifically comprises the following steps: the system comprises a multipath parallel digital signal processing architecture, a Farrow structure variable fractional delay filter, an initial coefficient calculation module, an N-M parameter optimization module, a parallel multipath filter coefficient mapping module, a split matrix weighting module, a decimal weighting module and a fast parallel FIR algorithm.
Specifically, the method comprises the following steps:
firstly, designing a Farrow structure variable fraction delay filter according to delay precision required to be realized;
the initial coefficient calculation module solves the filter coefficient according to a Lagrange interpolation method;
then, matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module, and obtaining an optimal fitting order M and a filter length N by using an N-M parameter optimization module;
then the parallel multi-channel filter coefficient mapping module converts the Farrow structure filter into a three-dimensional Farrow structure filter bank according to a multi-channel parallel digital signal processing architecture;
and then, a splitting matrix weighting module carries out splitting matrix weighting processing on each sub-filter in each path in the three-dimensional Farrow structure filter bank to obtain a new filter coefficient. (Split matrix weighting: weighting the filter by using the fast FIR algorithm (well known in the art) in Very Large Scale Integration (VLSI) to obtain new filter coefficients)
And finally, multiplying the output of the newly generated three-dimensional Farrow structure by the decimal delay amount by a decimal weighting module, and then adding the result to obtain the final W-waveband broadband variable fractional delay implementation structure.
The W-band broadband variable fractional delay system is schematically composed as a block diagram as shown in fig. 1, and the work flow is as follows:
1) sending the delay precision to be realized to a coefficient calculation module, and solving the coefficient of each filter in the Farrow structure by the coefficient calculation module;
2) the N-M parameter optimization module uses whether the amplitude-frequency response and the phase-frequency response of the filter in 1) are greater than the delay precision in the effective bandwidth, and if not, the proper fitting order M and the length N of the filter are intelligently adjusted; if yes, directly carrying out the next step;
3) the parallel multipath filter coefficient mapping module performs L-path copying on the Farrow structure filter solved in the step 2), and maps the coefficient to other L-1 Farrow structure filters;
4) the splitting matrix weighting module uses a fast parallel FIR algorithm to perform splitting matrix weighting processing on the Mth order sub-filters (L sub-filters in total) of each path in the L paths of parallel filter groups solved in the step 3), and B, P, H, Q matrixes are solved respectively to obtain new filter coefficients and filter implementation structures;
5) repeating step 4), and processing the rest M-1 order filter in the mode of step 4) to obtain a new filter coefficient and an implementation structure;
6) the decimal weighting module multiplies the newly generated output of the M groups of filters by a decimal delay amount p, and then the result is added to obtain the final W-waveband broadband variable fractional delay structure
Preferred example 2:
the invention is realized by the following steps:
step 1, designing a variable fraction delay filter based on a Farrow structure to enable the delay precision to meet the delay precision required to be realized, and solving coefficients of each filter in the Farrow structure by using a Lagrange interpolation method (comparing amplitude-frequency response and phase-frequency response of the filter realized by using the filter coefficients with amplitude-frequency response and phase-frequency response of the filter obtained after M, N is adjusted in step 2, wherein under the condition that the amplitude-frequency response and the phase-frequency response of the filter are greater than the delay precision in an effective bandwidth, the smaller the M, N is, the less resources are consumed, and the higher the system efficiency is);
step 2, designing a fitting order M and a filter length N, enabling the whole variable fractional delay implementation structure to match a signal bandwidth to be processed and the sampling rate of a front-end AD module, simultaneously ensuring that the amplitude-frequency response and the phase-frequency response of the implementation structure are greater than the delay precision in an effective bandwidth, and recalculating each filter coefficient;
step 3, designing a parallel multi-channel filter coefficient mapping module, enabling the coefficient of the Farrow structure to be capable of being applied to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank, wherein L refers to the number of parallel channels of a multi-channel parallel architecture;
step 4, designing a splitting matrix weighting module, carrying out splitting matrix weighting processing on each sub-filter in each path in the three-dimensional Farrow structure filter bank, and respectively solving B, P, H, Q matrixes to obtain new filter coefficients;
and 5, designing a multi-path parallel high-efficiency three-dimensional Farrow structure variable fractional delay structure according to the new filter coefficient obtained in the step 4 and the three-dimensional Farrow structure, so that the structure can carry out variable fractional delay on the broadband W-band radio-frequency signal.
The invention provides a time delay method of a wide-band radar semi-physical simulation system, which adjusts transmission time delay caused by array antenna position errors through an efficient variable fraction time delay module designed based on a multipath parallel architecture, ensures the consistency of radio frequency signal phases of triple radiation, realizes the spatial position of a simulated radiation target of the radar semi-physical simulation system under different working frequencies, and finally realizes the detection of the detection, target tracking and other capabilities of a radar guidance system under different working frequencies.
The invention aims to overcome the defects of complex system, high requirement on hardware index, high manufacturing cost and the like in the prior art.
Preferred example 3:
assuming that a target echo to be simulated in the W-band array semi-physical simulation system is a wideband chirp signal (bandwidth B is 400MHz), the variable delay module device down-converts the W-band radio frequency signal to a baseband signal, the sampling rate of AD is 1.6GHz, the symbol rate is 1.6GSPS, and the multi-path parallel architecture reduces the data processing speed to 400MHz under a clock in which the FPGA can stably work by using a 4-path parallel processing architecture.
The delay corresponding to one wavelength (3mm) of the signal of the W wave band is 0.01ns, and the delay precision required to be compensated is 10 ps. In order to ensure the precision, firstly, a fractional delay filter with variable delay and 1ps delay precision is designed by using a Farrow structure. The Farrow structure filter transfer function can be approximated as:
Figure BDA0002401270710000101
h (w, p) is equivalent to a weighted sum of fractional delay p over M filter banks. Solving the coefficient of each filter in the Farrow structure by a Lagrange interpolation method to obtain the specific filter bank coefficient { CM(0),……,CM(N-1),CM(N)}… {C0(0),……,C0(N-1),C0(N) } (step 1).
If a traditional parallel FIR filter design structure is adopted, L × N × M multipliers needed by a single module are obtained, and a set of parameters of 1.6GHz sampling rate of AD, 4-path parallel architecture and 400MHz bandwidth is determined to consume 1024 multiplier resources (the number of multiplier resources of a current mainstream commercial FPGA chip Xilinx _ V7_485T is about 1800), so that the number of the consumed multipliers is huge on the premise of ensuring the delay precision of the filter, and a new parallel solution needs to be found.
The designed Farrow structure filter is expanded into a 4-way parallel Farrow structure filter bank according to a 4-way parallel digital processing architecture (four identical Farrow structure filters are used to access the 4-way parallel digital processing architecture), as shown in fig. 3 (step 3). According to this patent design, the original 4-parallel FIR filter designed is represented in matrix form using a fast FIR algorithm as follows (step 4):
Figure BDA0002401270710000102
wherein
Figure BDA0002401270710000103
Figure BDA0002401270710000104
Figure BDA0002401270710000105
The 4-way parallel Farrow filter requires 4 × N × M multiplication and addition operations, while using the fast parallel algorithm requires the consumption of 9N/4 × M multipliers. According to the design method, the parallel FIR filter structurally designs a 4-path parallel Farrow structure decimal delayer FPGA implementation structure required by a W-band simulation system.
The W-band broadband variable fractional delay method designed by the patent can compensate the W band, is also suitable for a broadband radio frequency array system with UHF-Ka band, and has stronger universality; the method can not only carry out time delay processing on the broadband signal, but also be applicable to the narrowband signal; the method designed by the patent has more obvious advantages under the conditions of higher delay precision and more parallel paths.
Preferred example 4:
the invention will be further explained with reference to the drawings and examples. The invention provides a variable fractional delay method of a W-band broadband radar semi-physical simulation system, which can realize the adjustment of delay errors of the PS level of W-band broadband signals and effectively reduce multiplier resources required by the realization of structural hardware under the condition of not reducing delay precision.
The method is realized by the following steps:
the method comprises the following steps: the coefficient calculation module designs a variable fractional delay filter based on a Farrow structure according to delay precision required to be realized, and solves the coefficient of each filter in the Farrow structure by using a Lagrange interpolation method;
step two: the N-M parameter optimization module selects a proper fitting order M and a filter length N according to the bandwidth of a signal to be processed and the sampling rate of the front-end AD module, so that the amplitude-frequency response and the phase-frequency response of the Farrow structure filter are greater than the delay precision in the effective bandwidth, and the coefficients of the filters are recalculated;
step three: the parallel multi-path filter coefficient mapping module performs L-path copying on the Farrow structure filter solved in the step 2) according to a multi-path (L-path) parallel framework, and maps the coefficient to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank;
step four: the splitting matrix weighting module performs splitting matrix weighting processing on the Mth order sub-filter (total L sub-filters) of each path in the three-dimensional Farrow structure filter group solved in the step 3) by using a fast parallel FIR algorithm according to a multi-path parallel architecture (L paths), and respectively solves B, P, H, Q matrixes to obtain new filter coefficients and an implementation structure;
step five: repeating the step 4 to process the rest M-1 order filters in the mode of the step 4) to obtain new filter coefficients and an implementation structure;
step six: multiplying the newly generated output of the M groups of filters by the decimal delay amount p, and then adding the result to obtain the final W-band broadband variable fractional delay structure.
In the design and research process of the invention, the design of the variable fraction delay module is more complex, but the actual use is very convenient and efficient, the research and development cost is very low, and the later maintenance is relatively simple. The invention calculates the filter coefficient for variable delay through the coefficient calculation module and the N-M parameter optimization module, then performs parallel multi-path filter coefficient mapping according to the number of paths of a parallel framework, and the split matrix weighting module performs rapid FIR algorithm operation on the filter group, thereby realizing high simplification of the original multi-path parallel variable delay structure and reducing multiplier resources consumed by hardware realization.
In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present application and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application.
Those skilled in the art will appreciate that, in addition to implementing the systems, apparatus, and individual modules thereof provided by the present invention in purely computer readable program code, the same procedures can be implemented entirely by logically programming method steps into logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Therefore, the system, the device and the modules thereof provided by the present invention can be considered as a hardware component, and the modules included in the system, the device and the modules thereof for implementing various programs can also be considered as structures in the hardware component; modules for performing various functions may also be considered to be both software programs for performing the methods and structures within hardware components.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.

Claims (10)

1. A W-band broadband variable fraction delay method is characterized by comprising
Step S1: designing a variable fraction delay filter based on a Farrow structure, enabling the delay precision to meet the delay precision required to be realized, solving coefficients of each filter in the Farrow structure, and obtaining the variable fraction delay filter of a first Farrow structure;
step S2: according to the obtained variable fraction delay filter with the first Farrow structure, matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module to obtain an optimal fitting order M and the length N of the filter, and recalculating coefficients of the filters to obtain a variable fraction delay filter with a second Farrow structure;
step S3: l-path copying is carried out on the variable fractional delay filter of the second Farrow structure, and the filter coefficient is mapped to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank;
step S4: performing split matrix weighting processing on each sub-filter in each path in the generated three-dimensional Farrow structure filter bank to obtain a new filter coefficient and obtain a new three-dimensional Farrow structure filter bank;
step S5: and designing a multi-path parallel high-efficiency three-dimensional Farrow structure variable fractional delay structure according to the obtained third filter coefficient and the three-dimensional Farrow structure, so that the structure can carry out variable fractional delay on the broadband W-band radio-frequency signal.
2. The W-band wideband variable fraction delay method according to claim 1, wherein said step S1:
solving coefficients of each filter in the Farrow structure by using a Lagrange interpolation method;
the L refers to the parallel path number of the multi-path parallel architecture.
3. The W-band wideband variable fraction delay method according to claim 1, wherein said step S2:
and matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module according to the obtained variable fraction delay filter of the first Farrow structure, and simultaneously ensuring that the amplitude-frequency response and the phase-frequency response of the realization structure are greater than the delay precision in the effective bandwidth to obtain the optimal fitting order M and the length N of the filter.
4. The W-band wideband variable fraction delay method of claim 3, wherein said deriving the best fit order M and the filter length N is:
comparing the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the first Farrow structure with the amplitude-frequency response ji and the phase-frequency response of the variable fractional delay filter of the second Farrow structure, under the condition that the amplitude-frequency response and the phase-frequency response of the filter are larger than the delay precision in the effective bandwidth, M, N is smaller, the consumed resources are less, the system efficiency is higher, and the optimal fitting order M and the filter length N are obtained.
5. The W-band wideband variable fractional delay method according to claim 1, wherein the split matrix weighting process is to perform matrix weighting on the filter by using a fast FIR algorithm in VLSI, thereby obtaining new filter coefficients.
The step S5: multiplying the obtained output of the new three-dimensional Farrow structure by the decimal delay amount, and then adding the result to obtain the final W-waveband broadband variable fractional delay implementation structure.
6. A W-band broadband variable fraction delay system is characterized by comprising
An initial coefficient calculation module: designing a variable fraction delay filter based on a Farrow structure, enabling the delay precision to meet the delay precision required to be realized, solving coefficients of each filter in the Farrow structure, and obtaining the variable fraction delay filter of a first Farrow structure;
an N-M parameter optimization module: according to the obtained variable fraction delay filter with the first Farrow structure, matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module to obtain an optimal fitting order M and the length N of the filter, and recalculating coefficients of the filters to obtain a variable fraction delay filter with a second Farrow structure;
a parallel multipath filter coefficient mapping module: l-path copying is carried out on the variable fractional delay filter of the second Farrow structure, and the filter coefficient is mapped to other L-1 Farrow structure filters to generate a three-dimensional Farrow structure filter bank;
a split matrix weighting module: performing split matrix weighting processing on each sub-filter in each path in the generated three-dimensional Farrow structure filter bank to obtain a new filter coefficient and obtain a new three-dimensional Farrow structure filter bank;
a fraction weighting module: and designing a multi-path parallel high-efficiency three-dimensional Farrow structure variable fractional delay structure according to the obtained third filter coefficient and the three-dimensional Farrow structure, so that the structure can carry out variable fractional delay on the broadband W-band radio-frequency signal.
7. The W-band wideband variable fractional delay system according to claim 6 wherein the initial coefficient calculation module:
solving coefficients of each filter in the Farrow structure by using a Lagrange interpolation method;
the L refers to the parallel path number of the multi-path parallel architecture.
8. The W-band wideband variable fractional delay system according to claim 6 wherein the N-M parameter optimization module:
and matching the bandwidth of a signal to be processed and the sampling rate of a front-end AD module according to the obtained variable fraction delay filter of the first Farrow structure, and simultaneously ensuring that the amplitude-frequency response and the phase-frequency response of the realization structure are greater than the delay precision in the effective bandwidth to obtain the optimal fitting order M and the length N of the filter.
9. The W-band wideband variable fractional delay system of claim 8 where the best fit order M and filter length N are derived:
comparing the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the first Farrow structure with the amplitude-frequency response and the phase-frequency response of the variable fractional delay filter of the second Farrow structure, under the condition that the amplitude-frequency response and the phase-frequency response of the filter are larger than the delay precision in the effective bandwidth, the smaller M, N is, the less resources are consumed, the higher the system efficiency is, and the optimal fitting order M and the filter length N are obtained.
10. The W-band broadband variable fraction delay system of claim 6, wherein the split matrix weighting process is a matrix weighting of the filter by a fast FIR algorithm in VLSI (very Large Scale integration) to obtain new filter coefficients.
The fraction weighting module: multiplying the obtained output of the new three-dimensional Farrow structure by the decimal delay amount, and then adding the result to obtain the final W-waveband broadband variable fractional delay implementation structure.
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