CN111354780A - Super junction terminal with inversion injection side wall and manufacturing method thereof - Google Patents
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- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000005530 etching Methods 0.000 claims abstract description 12
- 238000002513 implantation Methods 0.000 claims description 34
- 239000012535 impurity Substances 0.000 claims description 13
- 238000005468 ion implantation Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 6
- 239000007943 implant Substances 0.000 claims description 5
- 238000001259 photo etching Methods 0.000 claims description 2
- 230000005684 electric field Effects 0.000 abstract description 13
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- 230000015556 catabolic process Effects 0.000 description 8
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- 239000000463 material Substances 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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Abstract
A super junction termination with inversion injection and a method of fabricating the same are disclosed. The super junction terminal formed by the side wall injection comprises an epitaxial column, an inversion injection side wall and a groove, wherein the epitaxial column and the groove are doped semiconductor regions formed on a substrate through epitaxial growth and are formed through etching, the inversion injection side wall is formed by performing ion injection on the side wall of the groove, and the groove and the epitaxial column regions are arranged at intervals and are positioned between two adjacent epitaxial column regions. The super junction terminal with inversion injection can enable the edge electric field distribution of the active region to be uniform when the device blocks voltage, so that the withstand voltage of the edge region is improved, and the withstand voltage capability of the active region is fully exerted.
Description
Technical Field
The present invention relates to semiconductor devices, and more particularly, to a super junction termination with an inversion injection sidewall and a method for fabricating the same.
Background
In recent years, energy conservation and emission reduction are more and more emphasized internationally, which puts higher requirements on loss control and efficiency improvement of large-scale power electronic equipment. Semiconductor power devices have received much attention in the industry as an important component of power electronic equipment.
Breakdown voltage is an important indicator of a semiconductor power device and represents the maximum voltage that the device can withstand. The active region of the power device can obtain the breakdown voltage of several kilovolts through reasonable design, thereby being suitable for the application occasions with higher power. However, the active region is not infinitely extended, and at the edge of the active region, i.e. the terminal of the semiconductor power device, the implementation of the active region withstand voltage is greatly limited if not reasonably designed. In order to form a termination with a high withstand voltage in as small an area as possible, various types of designs have been proposed. Including various types such as trench terminations, tilt terminations, junction terminations, field-limiting ring terminations, composite floating junction terminations, and spatial modulation junction terminations.
The conventional termination technology can realize a larger breakdown voltage, but the electric field distribution of the termination region is not uniform enough when a large voltage is blocked, so that the maximum withstand voltage designed by an active region cannot be exerted to the maximum extent, and the required termination area is larger.
Disclosure of Invention
To solve the problems set forth in the background, the present patent proposes a super junction termination with inversion-implanted sidewalls and a method of making the same.
According to the embodiment of the invention, the super junction terminal with the inversion injection side wall is positioned at the edge of an active area and comprises the following components: a substrate; a plurality of epitaxial column regions located above the substrate and around the active region, surrounding the active region, each epitaxial column region including an epitaxial column and an inversion implantation sidewall, the inversion implantation sidewall being located on the sidewall of the epitaxial column; and a plurality of trenches alternately arranged with the plurality of epitaxial pillar regions, each trench being located between two adjacent epitaxial pillar regions.
According to the manufacturing method of the super junction terminal with the inversion injection side wall, the super junction terminal with the inversion injection side wall is located at the edge of the active region, and the manufacturing method comprises the following steps: growing an epitaxial layer on a substrate; etching a plurality of epitaxial columns on the epitaxial layer by using a mask, wherein the plurality of epitaxial columns are positioned around the active region and surround the active region; and performing ion implantation on one or both sidewalls of each epitaxial pillar to form inversion implantation sidewalls; and a groove is formed between two adjacent epitaxial columns and is alternately arranged with the epitaxial columns.
The invention provides a super junction terminal with an inversion injection side wall and a manufacturing method thereof, which are based on the super junction principle, form a terminal with high withstand voltage as high as possible on an area as small as possible, can be widely applied to semiconductor power devices, and are characterized in that the doping type of the inversion injection side wall is set to be opposite to that of an epitaxial column to realize P-type and N-type doping regions distributed alternately to form charge balance, so that the electric field distribution is more uniform, and higher voltage can be endured under the condition of the same size and epitaxial doping.
Drawings
FIG. 1 is a three-dimensional perspective view of a super junction termination with inverted implant sidewalls according to an embodiment of the present invention;
FIG. 2 is a three-dimensional view of a super junction termination with inversion-implanted sidewalls in one direction for a PN diode according to an embodiment of the present invention;
FIG. 3 is a three-dimensional view of a super-junction Schottky diode with a super-junction termination having an inversion-implanted sidewall oriented parallel to the pillar region according to an embodiment of the present invention;
fig. 4 is a three-dimensional view of a super junction schottky diode with a super junction termination having an inversion-implanted sidewall oriented perpendicular to the epitaxial pillar region in accordance with an embodiment of the present invention.
Detailed Description
Specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings, and it should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be understood by those of ordinary skill in the art that these specific details are not required in order to practice the present invention. In other instances, well-known circuits, materials, or methods have not been described in detail in order to avoid obscuring the present invention.
Throughout the specification, reference to "one embodiment," "an embodiment," "one example," or "an example" means: the particular features, structures, or characteristics described in connection with the embodiment or example are included in at least one embodiment of the invention. Thus, the appearances of the phrases "in one embodiment," "in an embodiment," "one example" or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable combination and/or sub-combination in one or more embodiments or examples. Further, those of ordinary skill in the art will appreciate that the figures provided herein are for illustrative purposes, and wherein like reference numerals refer to like elements throughout. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. The appearances of the phrases "left," "right," "inner," "outer," "front," "back," "upper," "lower," "top," "bottom," "over," "under," and the like in the specification or claims are for illustrative purposes only and are not intended to be depicting fixed relative positions. It is to be understood that the above terms are interchangeable under appropriate circumstances such that the corresponding embodiments can operate properly in other orientations. Further, "contact" appearing in the specification or claims may be direct contact or indirect contact, such as contact through a wire connection.
The super junction technology is a technology which enables adjacent regions to compensate each other through N-type and P-type doped regions which are alternately arranged, realizes charge balance, and approaches zero-doped charge distribution, and can be expressed in various types; the embodiments also include impurity diffusion, repetition of epitaxial growth and ion implantation, and the like.
FIG. 1 is a three-dimensional perspective view of a super junction termination with inversion-implanted sidewalls according to an embodiment of the present invention. The super junction termination with inversion injection sidewall comprises: a substrate 6; an epitaxial column region 4 located above the substrate 6 and including an epitaxial column 2 and an inversion implantation sidewall 3, wherein the epitaxial column 2 is located around the active region 1, the extending direction of the epitaxial column is perpendicular to the edge 7 of the active region 1, the epitaxial column surrounds the active region 1 and may be in contact with the active region 1 or not, the active region 1 is a region of the power device that implements a main body function, and the inversion implantation sidewall 3 is located on sidewalls of two sides or one side of the epitaxial column 2; and the grooves 5 are arranged at intervals with the epitaxial pillar regions 4 and are positioned between two adjacent epitaxial pillar regions 4.
In one embodiment, the inversion implantation sidewall 3 has a doping type opposite to that of the epitaxial pillar 2. In one embodiment, the inversion implantation sidewall 3 is formed by ion implantation at the sidewall of the epitaxial pillar 2. In one embodiment, the width refers to a dimension parallel to the edge direction of the active region, the width of the epi-pillar region 2 is less than 10 μm, and the width of the trench 5 is less than 10 μm, because the larger epi-pillar region 4 and trench width 5 cannot achieve mutual depletion of charges of the N-type region and the P-type region or can achieve mutual depletion but cause an excessive electric field at the interface of the epi-pillar 2 and the inversion implantation sidewall 3, so that the withstand voltage is lowered. In one embodiment, the thickness of the epitaxial column region 4 is greater than 1 μm, because the smaller thickness of the epitaxial column region 4 does not modulate the electric field well in the region therebelow, resulting in a reduced withstand voltage.
In one embodiment, the actual manufacturing process includes:
in a first step, a semiconductor epitaxial layer is grown on an N-type semiconductor substrate, the doping of the epitaxial layer is still N-type doping, and the doping concentration is 1 × 1015cm-3～1×1017cm-3Then, forming an active region through a series of processes;
and secondly, protecting the active region, and etching strip-shaped grooves in the terminal region at a certain interval by using dry etching, wherein the interval is less than 10 microns, and the etching depth is more than 5 microns.
Third, by ion implantation with inclined side wallThe side wall of the groove is implanted with P-type impurities with the doping concentration of 1 × 1015cm-3～1×1019cm-3The implantation depth is less than 3 μm, and the implantation amount is controlled so that the total amount of the P-type impurity and the impurity in the N-type epitaxial column region is approximately the same, thereby forming charge balance.
The super junction terminal with the inversion injection side wall formed by the method is characterized in that charges in the adjacent epitaxial columns 2 and the inversion injection side wall 3 are mutually compensated when the device blocks voltage through the N-type and P-type doping regions which are alternately arranged, namely the inversion injection side wall 3 and the epitaxial columns 2 which are alternately arranged, so that charge balance is realized, the zero-doped charge distribution is approached, the electric field distribution of the terminal can be very uniform, namely the electric field intensity difference of each point of the terminal is smaller, and the larger breakdown voltage is realized in a smaller area. Note that the N-type and P-type doping described in this embodiment may be interchanged, and similar effects may be produced.
Fig. 2 is a three-dimensional view of a super junction termination with inversion-implanted sidewalls in one direction for a PN diode according to an embodiment of the present invention. The super junction termination with inversion injection sidewall comprises: a substrate 6; the active region 1 comprises a P-type injection region 8 and an N-type drift region 9; an epitaxial column region 4 located above the substrate 6 and including an epitaxial column 2 and an inversion implantation sidewall 3, wherein the epitaxial column 2 is located around the active region 1, the extending direction of the epitaxial column is perpendicular to the edge 7 of the active region 1, the epitaxial column surrounds the active region 1 and may be in contact with the active region 1 or not, the active region 1 is a region of the power device that implements a main body function, and the inversion implantation sidewall 3 is located on sidewalls of two sides or one side of the epitaxial column 2; and the grooves 5 are arranged at intervals with the epitaxial pillar regions 4 and are positioned between two adjacent epitaxial pillar regions 4.
In one embodiment, the P-type injection region 8 and the N-type drift region 9 contact each other to form a PN junction that collectively constitutes the active region 1, forming a PN diode. In one embodiment, the inversion implantation sidewall 3 has a doping type opposite to that of the epitaxial pillar 2. In one embodiment, the inversion implantation sidewall 3 is formed by ion implantation at the sidewall of the epitaxial pillar 2. In one embodiment, the epitaxial pillar 2 is perpendicular to the active region 1. In one embodiment, the width refers to a dimension parallel to the edge direction of the active region, the width of the epi-pillar region 2 is less than 10 μm, and the width of the trench 5 is less than 10 μm, because the larger epi-pillar region 4 and trench width 5 cannot achieve mutual depletion of charges of the N-type region and the P-type region or can achieve mutual depletion but cause an excessive electric field at the interface of the epi-pillar 2 and the inversion implantation sidewall 3, so that the withstand voltage is lowered. In one embodiment, the thickness of the epitaxial column region 4 is greater than 1 μm, because the smaller thickness of the epitaxial column region 4 does not modulate the electric field well in the region therebelow, resulting in a reduced withstand voltage. In one embodiment, the P-type implantation region 8 is a P-type doped region formed by P-type ion implantation after a semiconductor region having N-type doping is epitaxially grown on the substrate 6. In one embodiment, the top of the epitaxial pillar region 4 is lower than the top of the active region 1 in order to isolate the termination region from the top of the active region 1.
In one embodiment, the actual manufacturing process includes:
in a first step, a semiconductor epitaxial layer is grown on an N-type semiconductor substrate, the doping of the epitaxial layer is still N-type doping, and the doping concentration is 1 × 1015cm-3～1×1017cm-3Then forming a P-type implantation area by ion implantation with the doping concentration more than 1 × 1017cm-3；
And secondly, protecting the active region, etching the P-type injection region in the terminal region by using dry etching, and etching the strip-shaped grooves at a certain interval, wherein the interval is less than 10 microns, and the etching depth is more than 5 microns.
Thirdly, injecting P-type impurities into the side wall of the groove by inclined side wall ion injection, wherein the doping concentration is 1 × 1015cm-3～1×1019cm-3The implantation depth is less than 3 μm, and the implantation amount is controlled so that the total amount of the P-type impurity and the impurity in the N-type epitaxial column region is approximately the same, thereby forming charge balance.
The PN diode with the super junction terminal with the inversion injection side wall is arranged in four directions on the surface, when positive voltage is applied to the cathode and the anode is grounded, uniform electric field distribution can be obtained in the terminal region, so that larger breakdown voltage can be realized in a smaller area, and the breakdown voltage of the terminal is larger than that of the active region. Note that the N-type and P-type doping described in this embodiment may be interchanged, and similar effects may be produced.
Fig. 3 is a three-dimensional perspective view of a super junction termination of a super junction schottky diode according to an embodiment of the present invention, the super junction termination having an inversion-type implantation sidewall in a direction parallel to a pillar region, the super junction termination formed by sidewall implantation comprising: a substrate 6; the active region epitaxial columns 10 and the active region grooves 11 are arranged alternately to form a super junction structure of the active region; an epitaxial column region 4, located above the substrate 6, including an epitaxial column 2 and an inversion implantation sidewall 3, where the epitaxial column 2 is located around the active region 1, and the extension direction of the epitaxial column 2 is perpendicular to the edge 7 of the active region 1, and parallel to the extension direction of the active region epitaxial column 10, so as to surround the active region 1, and may be in contact with the active region 1 or not, where the active region 1 is a region in a power device that implements a main body function, and the inversion implantation sidewall 3 is located on a sidewall at two sides or one side of the epitaxial column 2; and the grooves 5 are arranged at intervals with the epitaxial pillar regions 4 and are positioned between two adjacent epitaxial pillar regions 4.
Fig. 4 is a three-dimensional view of a super junction schottky diode with a super junction termination having an inversion-implanted sidewall oriented perpendicular to the epitaxial pillar region in accordance with an embodiment of the present invention. The super junction terminal formed by the sidewall injection comprises: a substrate 6; the active region epitaxial columns 10 and the active region grooves 11 are arranged alternately to form a super junction structure of the active region; an epitaxial column region 4, located above the substrate 6, including an epitaxial column 2 and an inversion implantation sidewall 3, where the epitaxial column 2 is located around the active region 1, and the extension direction of the epitaxial column is perpendicular to the edge 7 of the active region 1, and perpendicular to the extension direction of the epitaxial column 8 of the active region, so as to surround the active region 1, and may be in contact with the active region 1 or not, where the active region 1 is a region in a power device that implements a main body function, and the inversion implantation sidewall 3 is located on a sidewall at two sides or one side of the epitaxial column 2; and the grooves 5 are arranged at intervals with the epitaxial pillar regions 4 and are positioned between two adjacent epitaxial pillar regions 4.
Referring to fig. 3 and 4, in one embodiment, the sidewalls of the active region epitaxial pillars 10 have an inversion implantation layer 12 to form a super junction structure of the active region. In one embodiment, the inversion implantation sidewall 3 has a doping type opposite to that of the epitaxial pillar 2. In one embodiment, the inversion implantation sidewall 3 is formed by ion implantation at the sidewall of the epitaxial pillar 2. In one embodiment, the epitaxial pillar 2 is perpendicular to the active region 1. In one embodiment, the width refers to a dimension parallel to the edge direction of the active region, the width of the epi-pillar region 2 is less than 10 μm, and the width of the trench 5 is less than 10 μm, because the larger epi-pillar region 4 and trench width 5 cannot achieve mutual depletion of charges of the N-type region and the P-type region or can achieve mutual depletion but cause an excessive electric field at the interface of the epi-pillar 2 and the inversion implantation sidewall 3, so that the withstand voltage is lowered. In one embodiment, the thickness of the epitaxial column region 4 is greater than 1 μm, because the smaller thickness of the epitaxial column region 4 does not modulate the electric field well in the region therebelow, resulting in a reduced withstand voltage. In one embodiment, the top of the epitaxial pillar region 4 is lower than the top of the active region 1 in order to isolate the termination region from the top of the active region 1.
In one embodiment, the actual manufacturing process includes:
in a first step, a semiconductor epitaxial layer is grown on an N-type semiconductor substrate, the doping of the epitaxial layer is still N-type doping, and the doping concentration is 1 × 1015cm-3～1×1017cm-3；
Secondly, protecting the active region, and etching the P-type injection region in the terminal region by using dry etching;
and thirdly, removing the protective material of the active region, and drawing active region super junction stripes and terminal super junction stripe patterns on the surface of the epitaxial layer by photoetching according to the patterns shown in the figures 3 and 4, wherein the stripe interval is less than 10 mu m, and the etching depth is more than 5 mu m.
Thirdly, injecting P-type impurities into the side walls of the active region groove and the terminal groove through two times of inclined side wall ion injection, wherein the doping concentration is 1 × 1015cm-3～1×1019cm-3An implantation depth of less than 3 μm, and an implantation amount is controlled so that P-type impurities andthe total amount of impurities in the N-type epitaxial column region is approximately the same, and charge balance is formed.
The super junction Schottky diode with the super junction terminal with the inversion injection side wall is formed around the active region, when positive voltage is applied to the cathode and the anode is grounded, uniform electric field distribution can be obtained in the terminal region, and therefore large breakdown voltage can be achieved in a small area, and the breakdown voltage of the terminal is larger than that of the active region. Note that the N-type and P-type doping described in this embodiment may be interchanged, and similar effects may be produced.
While the present invention has been described with reference to several exemplary embodiments, it is understood that the terminology used is intended to be in the nature of words of description and illustration, rather than of limitation. As the present invention may be embodied in several forms without departing from the spirit or essential characteristics thereof, it should also be understood that the above-described embodiments are not limited by any of the details of the foregoing description, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the meets and bounds of the claims, or equivalences of such meets and bounds are therefore intended to be embraced by the appended claims.
Claims (11)
1. A super junction termination with inversion implanted sidewalls, the super junction termination at an edge of an active region, comprising:
a substrate;
the epitaxial column regions are positioned above the substrate and around the active region to surround the active region, each epitaxial column region comprises an epitaxial column and an inversion injection side wall, the inversion injection side wall is positioned on the side wall of the epitaxial column, and the doping type of the inversion injection side wall is opposite to that of the epitaxial column; and
and a plurality of trenches alternately arranged with the plurality of epitaxial pillar regions, each trench being located between two adjacent epitaxial pillar regions.
2. The super-junction termination of claim 1 wherein the inversion implant sidewalls are formed by ion implantation at sidewalls of the epitaxial pillar.
3. The super junction termination of claim 1, wherein an extension direction of the epitaxial pillar of the super junction termination is perpendicular to an edge of the active region.
4. The super-junction termination of claim 1 wherein the active region comprises an active region epitaxial pillar, the extension direction of the epitaxial pillar of the super-junction termination being parallel or perpendicular to the extension direction of the active region epitaxial pillar.
5. The super-junction termination of claim 4 wherein sidewalls of the active region epitaxial pillar comprise an inversion implant layer, the inversion implant layer being of the same doping type as the inversion implant sidewalls of the super-junction termination.
6. The super junction termination of claim 1, wherein a top of the epitaxial pillar region is lower than a top of the active region.
7. The super-junction termination of claim 1 wherein the width of the epitaxial pillar is less than 10 μ ι η, the width of the trench is less than 10 μ ι η, and the thickness of the epitaxial pillar is greater than 1 μ ι η.
8. A method of fabricating a super junction termination with inversion implantation sidewalls at the edge of an active region, the method comprising:
growing an epitaxial layer on a substrate;
etching a plurality of epitaxial columns on the epitaxial layer by using a mask, etching the epitaxial columns to the substrate or etching the epitaxial columns to a distance above the substrate, wherein the plurality of epitaxial columns are positioned around the active region and surround the active region; and
performing ion implantation on one or two side walls of each epitaxial column to form inversion implantation side walls, wherein the doping type of the inversion implantation side walls is opposite to that of the epitaxial columns; wherein
And a groove is formed between two adjacent epitaxial columns and is alternately arranged with the epitaxial columns.
9. The method of claim 8, wherein the extension direction of the epitaxial pillar of the super junction termination is perpendicular to the edge of the active region.
10. The method of manufacturing of claim 8, further comprising:
drawing patterns of active region super junction stripes and terminal super junction stripes on the surface of the epitaxial layer through photoetching;
forming an active region groove; and
and injecting P-type impurities into the side walls of the active region groove and the terminal groove by two times of inclined side wall ion injection.
11. The method of manufacturing of claim 8, further comprising: the total amount of impurities in the implanted sidewall and the total amount of impurities in the epitaxial column are controlled to be approximately the same.
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| CN112420807A (en) * | 2020-11-04 | 2021-02-26 | 浙江大学 | Super junction device and terminal thereof |
Citations (13)
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