CN111342854A - Multi-point frequency signal receiving and processing device - Google Patents
Multi-point frequency signal receiving and processing device Download PDFInfo
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- CN111342854A CN111342854A CN202010151888.4A CN202010151888A CN111342854A CN 111342854 A CN111342854 A CN 111342854A CN 202010151888 A CN202010151888 A CN 202010151888A CN 111342854 A CN111342854 A CN 111342854A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/185—Space-based or airborne stations; Stations for satellite systems
- H04B7/1851—Systems using a satellite or space-based relay
- H04B7/18515—Transmission equipment in satellites or space-based relays
Abstract
The invention discloses a multi-point frequency signal receiving and processing device, which adopts a receiving module capable of receiving multi-point frequency input signals to process the multi-point frequency input signals into multi-point frequency intermediate frequency signals, and then inputs the multi-point frequency intermediate frequency signals into a parallel processing module, wherein the parallel processing module can decompose the multi-point frequency intermediate frequency signals into signals of single frequency points, demodulate the signals into baseband signals, and configure a digital password for each baseband signal, so that an instruction execution module can execute instructions in a targeted manner according to the digital password. The device realizes the parallel receiving and the parallel processing of the multi-point frequency signals, outputs the digital password, carries out the execution of the instruction in a pertinence way, meets the use requirement of the cooperation target of the multi-station system receiving, and has important significance for further improving the system reliability and reducing the system interference.
Description
Technical Field
The invention belongs to the field of design of spacecraft signal receiving, and particularly relates to a multi-point frequency signal receiving and processing device.
Background
With the continuous development of modern telemetry, the application of the unified measurement and control system is gradually wide, and the unified measurement and control system is used as a key factor for judging the combat performance of the aerospace type system and the success or failure of a flight test and has an extremely important position in a test target range task. Therefore, the integration design of the remote station becomes one of important factors of project construction, and equipment such as a common antenna, a baseband and the like can greatly improve the combat flexibility and reduce the construction cost.
In addition, the multi-station receiving has the advantages of good flame resistance, high reliability, good equipment realizability and the like, can further improve the telemetering reliability, and has important significance for reducing system interference.
However, the receiver of the existing spacecraft is provided with a fixed frequency point, so that only signals with specific frequencies can be received. Because the frequency point of the receiver is fixed and unchanged, when the communication frequency is changed, the receiver needs to be changed; if signals of a plurality of frequency points need to be received simultaneously, a plurality of receivers are needed, and therefore, a signal receiving and processing device of the spacecraft is complex and redundant.
Disclosure of Invention
The invention aims to provide a multi-point frequency signal receiving and processing device, which can receive and process multi-point frequency signals in parallel and meet the use requirement of a multi-station system receiving cooperative target; and the circuit is simple and easy to realize.
In order to solve the problems, the technical scheme of the invention is as follows:
a multi-point signal receiving and processing apparatus, comprising:
the receiving module receives the multi-point frequency input signal, and outputs the multi-point frequency intermediate frequency signal after sequentially filtering, mixing and amplifying the multi-point frequency input signal;
the parallel processing module is used for receiving the multi-point frequency intermediate frequency signals sent by the receiving module, filtering the multi-point frequency intermediate frequency signals into intermediate frequency signals of a plurality of single frequency points, simultaneously carrying out signal processing on the intermediate frequency signals of the single frequency points to obtain baseband signals corresponding to the intermediate frequency signals of the single frequency points, and outputting digital password information of the baseband signals;
and the instruction execution module is used for receiving the digital password information sent by the parallel processing module, comparing the digital password information with password data prestored in the instruction execution module one by one, and if a digital password identical to the prestored password data exists in the digital password information, executing an instruction corresponding to the digital password by the instruction execution module.
According to an embodiment of the present invention, the receiving module includes an input terminal acoustic surface filter, a low noise amplifier, a mixer, an intermediate frequency amplifier, and an intermediate frequency acoustic surface filter, which are connected in sequence, where the acoustic surface filter receives a multi-point frequency input signal, and the intermediate frequency acoustic surface filter outputs a multi-point frequency intermediate frequency signal.
According to an embodiment of the present invention, the input terminal acoustic surface filter is an acoustic surface filter bank composed of two acoustic surface filters, and the audio suppression degree for the multi-point frequency input signal is not less than 70 dB.
According to an embodiment of the present invention, the parallel processing module adopts an AD + FPGA architecture, configures a plurality of intermediate frequency filtering channels, receives the multi-spot frequency intermediate frequency signals in parallel, and performs FM demodulation and baseband signal demodulation on the received multi-spot frequency intermediate frequency signals in parallel.
According to an embodiment of the invention, the frequency of the multi-point frequency intermediate frequency signal is in the range of 0-200 MHz, after the parallel processing module receives the multi-point frequency intermediate frequency signal, AD conversion is performed on the multi-point frequency intermediate frequency signal, and the obtained digital multi-point frequency intermediate frequency signal is subjected to band-pass sampling to carry out first shifting of the signal frequency; and after m times of sampling frequency is extracted and filtered, the frequency of the multi-point frequency intermediate frequency signal is shifted to 1 MHz.
According to one embodiment of the invention, the multi-point frequency intermediate frequency signal realizes the suppression of non-band-pass frequency points through band-pass suppression filters corresponding to the frequency points, and provides the signal-to-noise ratio of FM demodulation signals.
According to an embodiment of the present invention, the multi-point frequency input signal is a mixed signal of N different frequencies, where 1< N < 6.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects:
the device adopts a receiving module capable of receiving multi-point frequency input signals, processes the multi-point frequency input signals into multi-point frequency intermediate frequency signals, inputs the multi-point frequency intermediate frequency signals into a parallel processing module, and the parallel processing module can decompose the multi-point frequency intermediate frequency signals into signals of single frequency points, demodulate the signals into baseband signals and configure digital passwords for each baseband signal, so that an instruction execution module can execute instructions in a targeted manner according to the digital passwords. The device realizes the parallel receiving and the parallel processing of the multi-point frequency signals, outputs the digital password, carries out the execution of the instruction in a pertinence way, meets the use requirement of the cooperation target of the multi-station system receiving, and has important significance for further improving the system reliability and reducing the system interference.
Drawings
Fig. 1 is a block diagram of a multi-point signal receiving and processing apparatus according to an embodiment of the invention;
FIG. 2 is a block diagram of FPGA software processing in an embodiment of the present invention;
FIG. 3 is a signal histogram of a multi-spot frequency signal after bandpass sampling according to an embodiment of the present invention;
fig. 4 is a graph showing the amplitude-frequency response of the band-pass suppression filter according to an embodiment of the present invention.
Detailed Description
The following describes a multi-point frequency signal receiving and processing apparatus according to the present invention in detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims.
The invention provides a multi-point frequency signal receiving and processing device, comprising: the receiving module receives the multi-point frequency input signal, and outputs the multi-point frequency intermediate frequency signal after sequentially filtering, mixing and amplifying the multi-point frequency input signal;
the parallel processing module is used for receiving the multi-point frequency intermediate frequency signals sent by the receiving module, filtering the multi-point frequency intermediate frequency signals into intermediate frequency signals of a plurality of single frequency points, simultaneously performing signal processing on the intermediate frequency signals of the single frequency points to obtain baseband signals corresponding to the intermediate frequency signals of the single frequency points, and outputting digital password information of the baseband signals;
and the instruction execution module is used for receiving the digital password information sent by the parallel processing module, comparing the digital password information with the pre-stored password data one by one, and if the digital password information contains the digital password which is the same as the pre-stored password data, executing the instruction corresponding to the digital password.
Specifically, refer to fig. 1. The number of frequency points that can be received by the multi-point frequency signal receiving and processing device is N, N may be an integer greater than 1 and smaller than 6, and in this embodiment, N is taken as an example 4. The multi-point frequency signal receiving and processing device receives mixed signals of 4 different frequency points, wherein the 4 frequency points can be 4 frequency points which are all in a certain bandwidth of an L wave band, and can also be 4 frequency points consisting of an S wave band or other wave bands.
The multi-point frequency signal receiving and processing device can receive the mixed signals of the 4 frequency points, a receiving module 1 of the device is a single receiving channel module, and after the receiving module 1 receives the mixed signals of the 4 frequency points, the mixed signals are sequentially filtered, mixed and amplified, and then multi-point frequency intermediate frequency signals within 200MHz are output to a parallel processing module 2.
Specifically, the receiving channel of the receiving module 1 includes an input terminal acoustic meter filter, a low noise amplifier, a mixer, an intermediate frequency amplifier, and an intermediate frequency acoustic meter filter circuit, which are connected in sequence, where the input terminal acoustic meter filter receives a multi-point frequency input signal, and the intermediate frequency acoustic meter filter circuit outputs a multi-point frequency intermediate frequency signal.
The input end filter is two sound meter filters, under the premise of ensuring a certain bandwidth, the out-of-band rejection capability is improved by designing a plurality of narrow-band sound meter filters, and the audio rejection degree of the multi-point frequency input signal is not less than 70 dB.
In the practical use process, the noise coefficient of the radio frequency front end of the receiving module 1 is not more than 3.5dB, the bandwidth of each intermediate frequency point frequency signal of the multi-point frequency is not less than 75KHz, and the receiving sensitivity is better than-135 dBW. Through the amplitude limiting design of the receiving module 1 and the full utilization of the A/D converter bits, the intermediate frequency multi-point frequency signals are output to the FPGA for multi-point frequency signal parallel processing, and the dynamic range can reach 90 dB.
The parallel processing module 2 receives the multi-point frequency intermediate frequency signals sent by the receiving module 1, filters the multi-point frequency intermediate frequency signals into intermediate frequency signals of a plurality of single frequency points, simultaneously performs signal processing on the intermediate frequency signals of the single frequency points to obtain baseband signals corresponding to the intermediate frequency signals of the single frequency points, and outputs digital password information of the baseband signals. Referring to fig. 2, the parallel processing module 2 adopts an FPGA multi-point frequency parallel processing platform, which includes an FPGA software configuration item written in verilog hdl hardware description language. The parallel processing module 2 receives the multi-point frequency intermediate frequency signals in parallel to perform parallel processing of multi-point frequency instructions, FM demodulation and baseband signal demodulation, simultaneously realizes functions of interface signal processing, cipher read-write control, multi-version decoding, three-judgment two-execution and the like, and can adapt to demodulation of two different systems by downloading main letter demodulation software or PSK demodulation software.
In addition, the multi-point frequency intermediate frequency signal is subjected to analog-to-digital conversion through an AD. Instruction receiving software in the FPGA adopts a bandpass sampling scheme, and refers to fig. 3, a multi-point frequency signal histogram after bandpass sampling. After sampling, the frequency of the multi-point frequency signal is shifted for the first time, and after m times of sampling frequency is extracted and filtered, the frequency of the multi-point frequency signal is finally shifted to be near 1 MHz.
The 4 carrier signals realize the inhibiting effect on other frequency points through the band-pass inhibiting filter of each frequency point, the mutual inhibition can reach 60dB, and simultaneously, the signal-to-noise ratio of FM demodulation signals can be further improved. The invention provides an amplitude-frequency response curve of a band-pass suppression filter for multi-point frequency signals, and referring to fig. 4, the suppression among the signals basically reaches 60 dB.
And the instruction execution module 3 is used for receiving the digital password information sent by the parallel processing module 2, comparing the digital password information with pre-stored password data one by one, and if a digital password identical to the pre-stored password data exists in the digital password information, executing an instruction corresponding to the digital password.
In practical application, the instruction execution module 3 receives the start and stop instructions and feeds the instructions back to the FPGA multi-point frequency parallel processing platform, reads related password data, and executes the instruction corresponding to the password after any password data is compared correctly.
In summary, the multipoint frequency signal receiving and processing device has the greatest advantages of being capable of achieving receiving and parallel processing of the multipoint frequency signals, outputting the closed contact to execute the instruction, and assisting in completing the flight mission. Meanwhile, the device has a simple circuit and is easy to realize. The multi-point frequency signal receiving and processing device meets the use requirement of a cooperative target of multi-station receiving of space communication, and has important significance for further improving the reliability of a space communication system and reducing system interference.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments. Even if various changes are made to the present invention, it is still within the scope of the present invention if they fall within the scope of the claims of the present invention and their equivalents.
Claims (7)
1. A multi-point signal receiving and processing apparatus, comprising:
the receiving module receives the multi-point frequency input signal, and outputs the multi-point frequency intermediate frequency signal after sequentially filtering, mixing and amplifying the multi-point frequency input signal;
the parallel processing module is used for receiving the multi-point frequency intermediate frequency signals sent by the receiving module, filtering the multi-point frequency intermediate frequency signals into intermediate frequency signals of a plurality of single frequency points, simultaneously carrying out signal processing on the intermediate frequency signals of the single frequency points to obtain baseband signals corresponding to the intermediate frequency signals of the single frequency points, and outputting digital password information of the baseband signals;
and the instruction execution module is used for receiving the digital password information sent by the parallel processing module, comparing the digital password information with password data prestored in the instruction execution module one by one, and if a digital password identical to the prestored password data exists in the digital password information, executing an instruction corresponding to the digital password by the instruction execution module.
2. The multi-point frequency signal receiving and processing device as claimed in claim 1, wherein the receiving module comprises an input-end acoustic meter filter, a low noise amplifier, a mixer, an intermediate frequency amplifier and an intermediate frequency acoustic meter filter connected in sequence, the input-end acoustic meter filter receives a multi-point frequency input signal, and the intermediate frequency acoustic meter filter outputs a multi-point frequency intermediate frequency signal.
3. The multi-point signal processing apparatus as claimed in claim 2, wherein said input port acoustic surface filter is an acoustic surface filter bank of two acoustic surface filters, and the degree of audio suppression for the multi-point signal is not less than 70 dB.
4. The apparatus according to claim 1, wherein the parallel processing module employs AD + FPGA architecture, configures a plurality of if filtering channels, receives the multi-point if signals in parallel, and performs FM demodulation and baseband signal demodulation on the received multi-point if signals in parallel.
5. The multi-point frequency signal receiving and processing device according to claim 4, wherein the frequency of the multi-point frequency intermediate frequency signal is in the range of 0-200 MHz, after the parallel processing module receives the multi-point frequency intermediate frequency signal, the multi-point frequency intermediate frequency signal is subjected to AD conversion, and the obtained digital multi-point frequency intermediate frequency signal is subjected to band-pass sampling to carry out first shifting of the signal frequency; and after m times of sampling frequency is extracted and filtered, the frequency of the multi-point frequency intermediate frequency signal is shifted to 1 MHz.
6. The multi-spot frequency signal receiving and processing device as claimed in claim 4, wherein the multi-spot frequency intermediate frequency signal realizes suppression of non-bandpass frequency points through bandpass suppression filters corresponding to the frequency points, and improves the signal-to-noise ratio of the FM demodulation signal.
7. The multi-spot frequency signal receiving and processing apparatus according to any one of claims 1 to 6, wherein the multi-spot frequency input signal is a mixed signal of N different frequencies, where 1< N < 6.
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| CN202010151888.4A CN111342854A (en) | 2020-03-06 | 2020-03-06 | Multi-point frequency signal receiving and processing device |
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| CN1423493A (en) * | 2001-12-07 | 2003-06-11 | 深圳市中兴通讯股份有限公司上海第二研究所 | Signal receiving method and apparatus in wireless base station |
| US20030202616A1 (en) * | 2002-04-25 | 2003-10-30 | Broadcom Corporation, A California Corporation | Radio receiver utilizing a single analog to digital converter |
| CN1561024A (en) * | 2004-02-20 | 2005-01-05 | 清华大学 | Multi-address digital communication method for miniature aircraft and its system |
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| CN106446667A (en) * | 2015-08-07 | 2017-02-22 | 阿里巴巴集团控股有限公司 | Password data processing method, apparatus and device |
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Patent Citations (8)
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| CN1423493A (en) * | 2001-12-07 | 2003-06-11 | 深圳市中兴通讯股份有限公司上海第二研究所 | Signal receiving method and apparatus in wireless base station |
| US20030202616A1 (en) * | 2002-04-25 | 2003-10-30 | Broadcom Corporation, A California Corporation | Radio receiver utilizing a single analog to digital converter |
| CN1561024A (en) * | 2004-02-20 | 2005-01-05 | 清华大学 | Multi-address digital communication method for miniature aircraft and its system |
| CN1960554A (en) * | 2006-11-17 | 2007-05-09 | 北京天碁科技有限公司 | Device and method capable of detecting and receiving multicarrier jointly |
| US20160261444A1 (en) * | 2007-05-08 | 2016-09-08 | Microsoft Technology Licensing, Llc | Ofdm transmission and reception for non-ofdm signals |
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Application publication date: 20200626 |