CN210157213U - Satellite modem - Google Patents

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CN210157213U
CN210157213U CN201921277985.7U CN201921277985U CN210157213U CN 210157213 U CN210157213 U CN 210157213U CN 201921277985 U CN201921277985 U CN 201921277985U CN 210157213 U CN210157213 U CN 210157213U
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signal
radio frequency
outputting
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digital
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王威
曾文斌
侯啸林
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Shenzhen Qiyuan Core Technology Co Ltd
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Shenzhen Qiyuan Core Technology Co Ltd
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Abstract

The utility model discloses a satellite modem, including received signal module, transmission signal module, first analog-to-digital conversion module, second digital-to-analog conversion module and FPGA chip. Through the FPGA chip, radio frequency signals can be output according to the requirements of users, and the communication data bandwidth can be expanded to be more than several times of that of the traditional satellite television on the premise of reasonable cost optimization. By adopting the separation devices for the receiving channel part and the signal conditioning part, each module can achieve better performance and has strong flexibility and expansibility.

Description

Satellite modem
Technical Field
The utility model relates to a data transmission technical field especially relates to a satellite modem.
Background
The satellite modem is applied to the field of satellite communication, is used as an important component of a satellite communication ground terminal, a gateway station and the like, and has the functions of demodulating a received satellite L-Band signal into a BBframe (baseband frame) data stream, interacting the BBframe data stream to a data control center (such as a data interaction server and the like) through a PCIE bus, modulating the BBframe data stream sent by the data control center into an L-Band signal, and transmitting the L-Band signal to the satellite through equipment such as a rear-end exciter. And realizing data communication between the satellite and the ground.
The core of a satellite modem in the prior art is a dedicated integrated circuit chip, when a signal needs to be received, a Tuner chip amplifies a received radio frequency signal and down-converts the radio frequency signal to a baseband, and the dedicated integrated circuit chip analyzes and processes the baseband signal and restores the baseband signal to a BBframe data stream. When a signal needs to be transmitted, the special integrated circuit chip encapsulates the BBframe data stream from the data control center into a baseband signal specified by a protocol, and the baseband signal is converted into a radio frequency band through the I/Q modulator and then transmitted. The special chip is highly integrated, the signal conditioning part of the receiving part, namely an LNA (low noise amplifier), an IQ demodulator, an ADC and the like are integrated in the chip, and due to the high integration, each module of the signal conditioning part can not obtain good performance, can only meet the requirement of universality and can not be qualified in occasions with high performance requirements.
SUMMERY OF THE UTILITY MODEL
An object of the embodiments of the present invention is to provide a satellite modem, which can improve the performance of signal conditioning.
In order to achieve the above object, a satellite modem is provided, which includes a signal receiving module, a signal transmitting module, a first analog-to-digital conversion module, a second analog-to-digital conversion module, and an FPGA chip, wherein:
the receiving signal module is used for processing the received satellite radio frequency input signal and outputting a first analog baseband signal;
the first analog-to-digital conversion module is connected with the signal receiving module and used for processing the first analog baseband signal and outputting a first digital signal;
the FPGA chip is connected with the first analog-to-digital conversion module and used for processing the first digital signal and outputting a corresponding data stream to external equipment; or the FPGA chip is used for processing a data stream input by external equipment and outputting a second digital signal;
the second digital-to-analog conversion module is connected with the FPGA chip and used for processing the second digital signal and outputting a second analog baseband signal;
the transmitting signal module is connected with the second digital-to-analog conversion module and is used for processing the second analog baseband signal and outputting a corresponding radio frequency output signal to the satellite.
In one possible implementation manner, the received signal module includes an attenuation range switching module, a first band-pass filter, a first variable attenuator, a first low-noise amplifier, a first IQ demodulator, a variable gain amplifier, and an adjustable low-pass filter;
the attenuation range switching module is used for receiving a radio frequency input signal sent by a satellite, attenuating or amplifying the radio frequency input signal and outputting a corresponding first radio frequency input signal;
the first band-pass filter is connected with the attenuation range switching module and used for filtering the first radio frequency input signal and outputting a second radio frequency input signal;
the first variable attenuator is connected with the first band-pass filter and used for attenuating the second radio frequency input signal and outputting a third radio frequency input signal;
the first low noise amplifier is connected with the first variable attenuator and is used for amplifying the third radio frequency input signal and outputting a fourth radio frequency input signal;
the first IQ demodulator is connected with the first low noise amplifier and is configured to demodulate the fourth radio frequency input signal and output a demodulated analog baseband signal;
the variable gain amplifier is connected with the first IQ demodulator and is used for amplifying the demodulated analog baseband signal and outputting the amplified analog baseband signal;
the adjustable low-pass filter is connected with the variable gain amplifier and is used for filtering the amplified analog baseband signal and outputting the first analog baseband signal.
In one possible implementation manner, the attenuation range switching module includes a first radio frequency switch, a second low noise amplifier, and a fixed attenuator;
one end of the first radio frequency switch is connected with a radio frequency input signal sent by a satellite, and the other end of the first radio frequency switch can be connected with the second low noise amplifier or the fixed attenuator;
one end of the second radio frequency switch can be connected with the second low noise amplifier or the fixed attenuator, and the other end of the second radio frequency switch is connected with the first band-pass filter and is used for being matched with the first radio frequency switch to switch on the second low noise amplifier or the fixed attenuator;
the second low noise amplifier is used for amplifying a radio frequency input signal sent by a satellite when the second low noise amplifier is connected into the satellite modem;
the fixed attenuator is used for attenuating a radio frequency input signal transmitted by a satellite when the fixed attenuator is connected into the satellite modem.
In one possible implementation manner, the transmission signal module includes a first power amplifier, a second variable attenuator, a second power amplifier, a second band-pass filter, and a second IQ demodulator;
the second IQ demodulator is connected with the second digital-to-analog conversion module and is used for demodulating the second analog baseband signal and outputting a demodulated radio frequency signal;
the second bandpass filter is connected with the second IQ demodulator, and is configured to filter the demodulated radio frequency signal and output a filtered radio frequency signal;
the first power amplifier is connected with the second band-pass filter and used for amplifying the filtered radio-frequency signal and outputting the amplified radio-frequency signal;
the second variable attenuator is connected with the first power amplifier and is used for attenuating the amplified radio-frequency signal and outputting the attenuated radio-frequency signal;
and the second power amplifier is connected with the second variable attenuator and used for amplifying the attenuated radio frequency signal and outputting the radio frequency output signal to the satellite.
In one possible implementation, the first analog-to-digital conversion module includes a 12-bit analog-to-digital converter.
In one possible implementation, the second digital-to-analog conversion module includes a 16-bit digital-to-analog converter.
In one possible implementation, the satellite modem further comprises a temperature management module;
the temperature management module is connected with the FPGA chip.
In one possible implementation, the satellite modem further includes a power management module;
and the power supply management module is connected with the FPGA chip.
In one possible implementation manner, the FPGA chip is connected to the external device through a PCIE bus.
Implement the embodiment of the utility model provides a following beneficial effect has: the embodiment of the utility model provides a satellite modem, including received signal module, transmission signal module, first analog-to-digital conversion module, second digital-to-analog conversion module and FPGA chip, the received signal module is used for handling received satellite radio frequency input signal, exports first analog baseband signal. The first analog-to-digital conversion module is connected with the signal receiving module and used for processing the first analog baseband signal and outputting a first digital signal. The FPGA chip is connected with the first analog-to-digital conversion module and used for processing the first digital signal and outputting a corresponding data stream to external equipment; or the FPGA chip is used for processing a data stream input by external equipment and outputting a second digital signal. The second digital-to-analog conversion module is connected with the FPGA chip and used for processing the second digital signal and outputting a second analog baseband signal. The transmitting signal module is connected with the second digital-to-analog conversion module and is used for processing the second analog baseband signal and outputting a corresponding radio frequency output signal to the satellite. The FPGA chip can output directional radio frequency signals according to the requirements of users, and can expand the communication data bandwidth to more than several times of that of the traditional satellite television on the premise of reasonable cost optimization. By adopting the separation devices in the receiving channel part and the signal conditioning part, each module can achieve better performance and has strong flexibility and expansibility.
Drawings
Fig. 1 is a schematic structural diagram of a satellite modem according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a signal receiving module according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another satellite modem according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of the attenuation range switching module according to the embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
As described in the background art, the ASIC chip is used to implement the satellite modem in the prior art, which makes the conventional satellite modem highly integrated due to the dedicated chip, and the signal conditioning part of the receiving part, i.e. LNA (low noise amplifier), IQ demodulator, ADC, etc., are integrated in the chip, and due to the high integration, each module of the signal conditioning part cannot obtain good performance. When the inventor researches the problem, the FPGA chip is considered to be used for replacing an ASIC chip to realize the satellite modem, and the receiving channel part and the signal conditioning part adopt separate devices, so that each module can achieve better performance and has strong flexibility and expansibility. From the inventive concept of the present invention, the utility model discloses can see that the contribution to prior art lies in using the FPGA chip to replace the ASIC chip to realize satellite modem to when using the FPGA chip to realize satellite modem, adopted separation device with receiving channel part and signal conditioning part, solved the high integrated problem of chip.
Referring to fig. 1, an embodiment of the present invention provides a satellite modem, including a receiving signal module 01, a transmitting signal module 02, a first analog-to-digital conversion module 03, a second digital-to-analog conversion module 04, and an FPGA chip 05, which will be described in detail below.
The receiving signal module 01 is configured to process a received satellite radio frequency input signal and output a first analog baseband signal. In one possible implementation manner, referring to fig. 2, the received signal module 01 includes an attenuation range switching module 06, a first band-pass filter 07, a first variable attenuator 08, a first low noise amplifier 09, a first IQ demodulator 10, a variable gain amplifier 11, and an adjustable low-pass filter 12, which are described in detail below.
The attenuation range switching module 06 is configured to receive a radio frequency input signal sent by a satellite, attenuate or amplify the radio frequency input signal, and output a corresponding first radio frequency input signal. By attenuating or amplifying the radio frequency input signal, the strong and weak signals can be ensured to be received. The first band-pass filter 07 is connected to the attenuation range switching module 06, and is configured to filter the first radio frequency input signal and output a second radio frequency input signal. The first band-pass filter 07 can filter out interference and retain radio frequency signals with preset frequencies. The first variable attenuator 08 is connected to the first band-pass filter 07, and is configured to attenuate the second radio frequency input signal and output a third radio frequency input signal. The first low noise amplifier 09 is connected to the first variable attenuator 08, and is configured to amplify the third rf input signal and output a fourth rf input signal. The gain of the whole radio frequency link is adjusted through the first variable attenuator 08 and the first low noise amplifier 09, automatic gain control is realized by matching with the FPGA chip 05, when an input signal is stronger, the gain of the radio frequency link is reduced, and when the input signal is weaker, the gain of the radio frequency link is increased. The first IQ demodulator 10 is connected to the first low noise amplifier 09, and configured to demodulate the fourth radio frequency input signal and output a demodulated analog baseband signal. Referring to fig. 3, the first IQ demodulator 10 may be of a zero-if architecture, and the first IQ demodulator 10 includes a local oscillator. The variable gain amplifier 11 is connected to the first IQ demodulator 10, and is configured to amplify the demodulated analog baseband signal and output the amplified analog baseband signal. The baseband signal gain is adjusted by the variable gain amplifier 11. The adjustable low-pass filter 12 is connected to the variable gain amplifier 11, and is configured to filter the amplified analog baseband signal and output the first analog baseband signal. The bandwidth of the baseband signal is adjusted through the adjustable low-pass filter 12, and the system noise is reduced.
In one possible implementation, as shown in fig. 4, the attenuation range switching module 06 includes a first rf switch 061, a second rf switch 062, a second low noise amplifier 063, and a fixed attenuator 064, which is described in detail below.
One end of the first rf switch 061 is connected to an rf input signal transmitted from a satellite, and the other end of the first rf switch 061 may be connected to the second low noise amplifier 063 or the fixed attenuator 064. One end of the second rf switch 062 may be connected to the second low noise amplifier 063 or the fixed attenuator 064, and the other end of the second rf switch 062 may be connected to the first bandpass filter 07, so as to cooperate with the first rf switch 061 to turn on the second low noise amplifier 063 or the fixed attenuator 064. The second low noise amplifier 063 is configured to amplify a radio frequency input signal transmitted by a satellite when the second low noise amplifier 063 is coupled to the satellite modem. The fixed attenuator 064 is used to attenuate the radio frequency input signal transmitted by the satellite when it is plugged into the satellite modem. The first analog-to-digital conversion module 03 is connected to the signal receiving module 01, and is configured to process the first analog baseband signal and output a first digital signal.
In the embodiment of the present invention, the first stage of the input of the signal receiving module 01 may obtain a larger dynamic range by using the mode of gating the second low noise amplifier 063 or the fixed attenuator 064 with the rf switch.
In one possible implementation, the first analog-to-digital conversion module 03 comprises a 12-bit analog-to-digital converter. The 12-bit analog-to-digital converter may be a 125MSPS ADC, which may be a 50MHz baseband bandwidth signal corresponding to a radio frequency bandwidth of 100 MHz.
The FPGA chip 05 is connected to the first analog-to-digital conversion module 03, and is configured to process the first digital signal and output a corresponding data stream to an external device; or, the FPGA chip 05 is configured to process a data stream input by an external device, and output a second digital signal.
It should be noted that the FPGA chip 05 is a field programmable gate array, and the FPGA chip 05 has a large number of flip-flops and I/O pins therein, and the working state thereof is set by a program stored in the RAM in the chip, so that the RAM in the chip needs to be programmed during working. The user can adopt different programming modes according to different configuration modes. When power is on, the FPGA chip 05 reads data in an EPROM (erasable programmable read only memory) into an on-chip programming RAM (random access memory), and after configuration is completed, the FPGA chip 05 enters a working state. After power failure, the FPGA is restored to a white chip, and the internal logic relation disappears, so that the FPGA chip 05 can be repeatedly used. The programming of the FPGA chip 05 does not need a special FPGA programmer, and only needs a general EPROM and a PROM programmer. When the function of the FPGA chip 05 needs to be modified, only one EPROM needs to be replaced. Thus, different circuit functions can be generated by the same FPGA and different programming data.
As shown in fig. 3, the FPGA chip 05 may be connected to a flash memory through an SPI interface, or connected to a DDR4 through a DDR interface, for storing data. Or the device also comprises a temperature management module 13, wherein the temperature management module 13 is connected with the FPGA chip 05. Or the system can further comprise a power management module 14, wherein the power management module 14 is connected with the FPGA chip 05. The FPGA chip 05 can also be connected with RJ45, the RJ45 is an information socket (i.e. a communication leading-out connector) in a wiring system, the FPGA chip 05 can also be connected with a UART interface, the UART is a universal asynchronous receiving and transmitting device, and the FPGA chip 05 can also be connected with an external LED.
In this embodiment, the physical layer protocol of modulation and demodulation is completed by the FPGA chip 05, the index parameters of the modulation channel are as shown in table 1, and the index parameters of the demodulation channel are as shown in table 2.
Figure BDA0002157350340000071
TABLE 1
Figure BDA0002157350340000072
TABLE 2
In one possible implementation manner, the FPGA chip 05 is connected to the external device through a PCIE bus. In one possible implementation, the FPGA chip 05 receives BBframe (baseband frame) data from an external device, and modulates a BBframe data stream sent from the external device center into an L-Band signal. The FPGA chip 05 can also receive parameter configuration data of an external device through the PCIE bus, and the FPGA chip 05 changes the content of the FPGA chip 05 according to the parameter configuration data, that is, modifies corresponding parameters and programs, so that the FPGA chip 05 can change modulation parameters according to the parameter configuration data, and further outputs a corresponding radio frequency signal. Therefore, the satellite signal format is designed according to the protocol standard, a unique protocol standard is customized according to the requirements of customers, and radio frequency signal transmission is realized.
It should be noted that the embodiment of the utility model provides an overcome current prejudice and replace the ASIC chip of conventional use into FPGA chip 05, make full use of FPGA chip 05 can change the device characteristic of chip internal parameter procedure, realize directional the establishment according to customer's needs.
The second digital-to-analog conversion module 04 is connected to the FPGA chip 05, and is configured to process the second digital signal and output a second analog baseband signal.
In one possible implementation, the second digital-to-analog conversion module 04 includes a 16-bit digital-to-analog converter.
The transmitting signal module 02 is connected to the second digital-to-analog conversion module 04, and is configured to process the second analog baseband signal and output a corresponding radio frequency output signal to the satellite.
In one possible implementation, as shown in fig. 3, the transmit signal module 02 includes a first power amplifier 021, a second variable attenuator 022, a second power amplifier 023, a second band-pass filter 024, and a second IQ demodulator 025, which are described in detail below.
The second IQ demodulator 025 is connected to the second digital-to-analog conversion module 04, and configured to demodulate the second analog baseband signal and output a demodulated radio frequency signal. The FPGA chip 05, in cooperation with a 6-bit digital-to-analog converter with a sampling rate greater than 1.5GSPS, can generate a baseband signal with a bandwidth of 600MHz, which can process a radio frequency bandwidth of 1 GHz. In one possible implementation manner, the second IQ demodulator 025 modulates the baseband signal into a radio frequency signal with a frequency range of 950-2150 MHz. The second band-pass filter 024 is connected to the second IQ demodulator 025, and is configured to filter the demodulated radio frequency signal and output a filtered radio frequency signal. The interference signal from outside the second IQ demodulator 025 is filtered out by the second band pass filter 024. The first power amplifier 021 is connected to the second band-pass filter 024, and is configured to amplify the filtered radio frequency signal and output an amplified radio frequency signal. The second variable attenuator 022 is connected to the first power amplifier 021, and configured to attenuate the amplified radio frequency signal and output the attenuated radio frequency signal. The second power amplifier 023 is connected to the second variable attenuator 022, and configured to amplify the attenuated radio frequency signal and output the radio frequency output signal to the satellite.
The implementation of the embodiment has the following characteristics:
the satellite modem comprises a signal receiving module 01, a signal transmitting module 02, a first analog-to-digital conversion module 03, a second digital-to-analog conversion module 04 and an FPGA chip 05, and each module adopts a separating device, so that each module achieves better performance and has strong flexibility and expansibility. The satellite modem is realized by using the FPGA chip to replace an ASIC chip, and the FPGA chip can be used for changing the device characteristics of a parameter program in the chip so as to output radio frequency signals according to the requirements of users. The communication data bandwidth is expanded to more than several times of that of the traditional satellite television.
The foregoing is a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations are also considered as the protection scope of the present invention.

Claims (9)

1. A satellite modem is characterized by comprising a signal receiving module, a signal transmitting module, a first analog-to-digital conversion module, a second digital-to-analog conversion module and an FPGA chip, wherein:
the receiving signal module is used for processing the received satellite radio frequency input signal and outputting a first analog baseband signal;
the first analog-to-digital conversion module is connected with the signal receiving module and used for processing the first analog baseband signal and outputting a first digital signal;
the FPGA chip is connected with the first analog-to-digital conversion module and used for processing the first digital signal and outputting a corresponding data stream to external equipment; or the FPGA chip is used for processing a data stream input by external equipment and outputting a second digital signal;
the second digital-to-analog conversion module is connected with the FPGA chip and used for processing the second digital signal and outputting a second analog baseband signal;
the transmitting signal module is connected with the second digital-to-analog conversion module and is used for processing the second analog baseband signal and outputting a corresponding radio frequency output signal to the satellite.
2. The satellite modem of claim 1, wherein said received signal module comprises an attenuation range switching module, a first band pass filter, a first variable attenuator, a first low noise amplifier, a first IQ demodulator, a variable gain amplifier, and an adjustable low pass filter, wherein:
the attenuation range switching module is used for receiving a radio frequency input signal sent by a satellite, attenuating or amplifying the radio frequency input signal and outputting a corresponding first radio frequency input signal;
the first band-pass filter is connected with the attenuation range switching module and used for filtering the first radio frequency input signal and outputting a second radio frequency input signal;
the first variable attenuator is connected with the first band-pass filter and used for attenuating the second radio frequency input signal and outputting a third radio frequency input signal;
the first low noise amplifier is connected with the first variable attenuator and is used for amplifying the third radio frequency input signal and outputting a fourth radio frequency input signal;
the first IQ demodulator is connected with the first low noise amplifier and is configured to demodulate the fourth radio frequency input signal and output a demodulated analog baseband signal;
the variable gain amplifier is connected with the first IQ demodulator and is used for amplifying the demodulated analog baseband signal and outputting the amplified analog baseband signal;
the adjustable low-pass filter is connected with the variable gain amplifier and is used for filtering the amplified analog baseband signal and outputting the first analog baseband signal.
3. The satellite modem of claim 2, wherein said fading range switching module comprises a first rf switch, a second low noise amplifier, and a fixed attenuator, wherein:
one end of the first radio frequency switch is connected with a radio frequency input signal sent by a satellite, and the other end of the first radio frequency switch can be connected with the second low noise amplifier or the fixed attenuator;
one end of the second radio frequency switch can be connected with the second low noise amplifier or the fixed attenuator, and the other end of the second radio frequency switch is connected with the first band-pass filter and is used for being matched with the first radio frequency switch to switch on the second low noise amplifier or the fixed attenuator;
the second low noise amplifier is used for amplifying a radio frequency input signal sent by a satellite when the second low noise amplifier is connected into the satellite modem;
the fixed attenuator is used for attenuating a radio frequency input signal transmitted by a satellite when the fixed attenuator is connected into the satellite modem.
4. The satellite modem of claim 1, wherein said transmit signal module comprises a first power amplifier, a second variable attenuator, a second power amplifier, a second band pass filter, and a second IQ demodulator, wherein:
the second IQ demodulator is connected with the second digital-to-analog conversion module and is used for demodulating the second analog baseband signal and outputting a demodulated radio frequency signal;
the second bandpass filter is connected with the second IQ demodulator, and is configured to filter the demodulated radio frequency signal and output a filtered radio frequency signal;
the first power amplifier is connected with the second band-pass filter and used for amplifying the filtered radio-frequency signal and outputting the amplified radio-frequency signal;
the second variable attenuator is connected with the first power amplifier and is used for attenuating the amplified radio-frequency signal and outputting the attenuated radio-frequency signal;
and the second power amplifier is connected with the second variable attenuator and used for amplifying the attenuated radio frequency signal and outputting the radio frequency output signal to the satellite.
5. A satellite modem as claimed in any one of claims 1 to 4, wherein said first analogue to digital conversion module comprises a 12 bit analogue to digital converter.
6. A satellite modem as claimed in any one of claims 1 to 4, wherein said second digital to analogue conversion module comprises a 16 bit digital to analogue converter.
7. The satellite modem of any one of claims 1 to 4, further comprising a temperature management module;
the temperature management module is connected with the FPGA chip.
8. The satellite modem of any one of claims 1 to 4, further comprising a power management module;
and the power supply management module is connected with the FPGA chip.
9. The satellite modem according to any one of claims 1 to 4, wherein said FPGA chip is connected to said external device via a PCIE bus.
CN201921277985.7U 2019-08-06 2019-08-06 Satellite modem Active CN210157213U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111475454A (en) * 2020-03-27 2020-07-31 西安广和通无线软件有限公司 PCIe interface-based communication method and device, computer equipment and computer-readable storage medium
CN111884966A (en) * 2020-07-20 2020-11-03 贵州航天天马机电科技有限公司 Modulation-demodulation circuit based on GMSK technology

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111475454A (en) * 2020-03-27 2020-07-31 西安广和通无线软件有限公司 PCIe interface-based communication method and device, computer equipment and computer-readable storage medium
CN111475454B (en) * 2020-03-27 2022-04-15 西安广和通无线软件有限公司 PCIe interface-based communication method and device, computer equipment and computer-readable storage medium
CN111884966A (en) * 2020-07-20 2020-11-03 贵州航天天马机电科技有限公司 Modulation-demodulation circuit based on GMSK technology
CN111884966B (en) * 2020-07-20 2022-11-04 贵州航天天马机电科技有限公司 Modulation-demodulation circuit based on GMSK technology

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