CN111341509A - Anti-vulcanization chip resistor and manufacturing method thereof - Google Patents
Anti-vulcanization chip resistor and manufacturing method thereof Download PDFInfo
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- CN111341509A CN111341509A CN202010193567.0A CN202010193567A CN111341509A CN 111341509 A CN111341509 A CN 111341509A CN 202010193567 A CN202010193567 A CN 202010193567A CN 111341509 A CN111341509 A CN 111341509A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/003—Thick film resistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/02—Housing; Enclosing; Embedding; Filling the housing or enclosure
- H01C1/024—Housing; Enclosing; Embedding; Filling the housing or enclosure the housing or enclosure being hermetically sealed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/02—Housing; Enclosing; Embedding; Filling the housing or enclosure
- H01C1/032—Housing; Enclosing; Embedding; Filling the housing or enclosure plural layers surrounding the resistive element
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/02—Housing; Enclosing; Embedding; Filling the housing or enclosure
- H01C1/034—Housing; Enclosing; Embedding; Filling the housing or enclosure the housing or enclosure being formed as coating or mould without outer sheath
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/281—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thick film techniques
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/288—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thin film techniques
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Abstract
The invention discloses an anti-vulcanization chip resistor and a manufacturing method thereof. The resistance layer is arranged right above the substrate, and the first protective layer is arranged above the resistance layer; a second protective layer over the first protective layer; the two auxiliary electrode layers are respectively arranged on the two front electrodes and are respectively connected with the second protective layers on the same side; each vacuum coating layer is positioned on the side surface of the substrate; the two electroplated layers are respectively arranged on two side surfaces of the substrate and the front surface and the back surface close to the side surfaces. The structure is firm and has strong sealing performance, and the formation of interface gaps under cold and hot impact can be effectively avoided; effectively resists the vulcanization erosion under the severe conditions of high temperature, high humidity, oil boiling and the like, and has stronger weather resistance.
Description
Technical Field
The invention relates to the technical field of chip resistors, in particular to an anti-vulcanization chip resistor and a manufacturing method thereof.
Background
A conventional chip resistor generally includes: the resistor body is connected across the front electrodes, the protective layer covers the resistor body and the front electrodes, the pair of back electrodes is connected across the two ends of the lower surface of the substrate, and the pair of end electrodes is disposed on the two end faces of the substrate in the length direction and is connected with the front electrodes and the back electrodes. The surfaces of the front electrode, the end face electrode and the back electrode are provided with a nickel plating layer and a tin plating layer which jointly form a substrate electrode layer of the resistor.
The conventional chip resistor anti-vulcanization method is to cover a nickel alloy barrier layer on the front electrode or cover a nickel-tin electroplated layer on the joint of the front electrode and the protective layer, and both can meet the requirement of anti-vulcanization to a certain degree. However, as the requirement for vulcanization resistance is increased, such as exposure to severe aging tests such as high temperature, high humidity, oil boiling, etc., the nickel alloy, nickel and tin plating layers and the protective layer have a significant deficiency in bonding, and interface gaps are likely to occur at the overlapping portions, so that sulfides are likely to invade along the interface, thereby causing product failure.
Therefore, in combination with the above-mentioned technical problems, there is a need to provide a new technical solution.
Disclosure of Invention
In order to solve the technical problems in the prior art, the invention provides an anti-vulcanization chip resistor and a manufacturing method thereof, and the specific technical scheme is as follows:
the invention provides an anti-sulfuration chip resistor, comprising:
a substrate having a front surface, a back surface, and side surfaces;
back electrodes disposed at intervals on a back surface of the substrate;
front electrodes which are arranged on the front plate surface of the substrate at intervals;
a resistive layer provided on the front surface of the substrate;
the first protective layer covers the resistor layer, and two opposite sides of the first protective layer are respectively connected with the front electrode;
the second protective layer covers the first protective layer, and two opposite sides of the second protective layer are respectively connected to the front electrode;
the auxiliary electrode layers are respectively arranged on the two front electrodes and are respectively overlapped with the second protective layers on the same side;
the vacuum coating layers are symmetrically arranged on the side surface of the substrate, each vacuum coating layer extends downwards from the upper part of the auxiliary electrode layer to the back electrode, and the vacuum coating layers cover the side surface of the substrate;
and the electroplated layers are respectively and symmetrically covered on the vacuum coating layers, each electroplated layer extends downwards from the upper part of the auxiliary electrode layer to the back electrode, and the electroplated layers cover the back electrode and are connected to the substrate.
Further, the first protective layer, the second protective layer, the auxiliary electrode layer and the electroplated layer are overlapped with each other to form the first protective region.
Further, the front electrode is made of a high-palladium electrode material.
Further, the first protective layer is a glass layer;
the second protective layer is a resin layer.
Further, the auxiliary electrode layer is a resin type conductive material, such as a silver material.
Further, the substrate is a ceramic substrate.
A method of manufacturing a sulfuration resistant chip resistor, comprising the steps of:
s1, providing a substrate, wherein the substrate is provided with a front plate surface, a back plate surface and a side surface;
s2, arranging back electrodes on the back plate surface of the substrate, wherein the back electrodes are arranged on the back plate surface of the substrate at intervals, and each back electrode is provided with an outer side surface;
s3, arranging two front electrodes on the front plate surface of the substrate, wherein the front electrodes are spaced and each front electrode is provided with an outer side surface;
s4, forming a resistance layer in the middle area of the front surface of the substrate, wherein two opposite sides of the resistance layer are respectively connected with the front surface electrode;
s5, arranging a first protective layer above the resistance layer, wherein two opposite sides of the first protective layer are respectively connected with the front electrode;
s6, arranging a second protective layer above the first protective layer, wherein the second protective layer covers the first protective layer, and two opposite sides of the second protective layer are respectively connected to the front electrode;
s7, arranging two auxiliary electrode layers on the two front electrodes respectively, wherein the auxiliary electrode layers are overlapped with second protection layers on the same side respectively;
s8, symmetrically arranging vacuum coating layers on the side surfaces of the substrate, wherein each vacuum coating layer extends downwards from the upper part of the auxiliary electrode layer to the back electrode and covers the side surface of the ceramic substrate;
and S9, respectively and symmetrically covering the vacuum coating layers with two electroplated layers, wherein each electroplated layer extends downwards from the upper parts of the front electrode and the auxiliary electrode layer to the back electrode, and the electroplated layers cover the back electrode and are connected to the substrate.
Further, in step S2, two back electrodes are formed on the back plate side of the substrate by screen printing;
in step S3, forming two front electrodes on the front surface of the substrate by screen printing;
in step S4, forming a resistive layer on the front plate surface of the substrate by screen printing;
in step S5, forming a first protective layer over the resistive layer by screen printing;
in step S6, a second protective layer is formed over the first protective layer by screen printing.
Further, in step S8, plating nickel-chromium alloy on both sides of the substrate under vacuum to form a vacuum coating layer;
in step S9, nickel and tin are plated on the outer sides of the auxiliary electrode layer, the back electrode, and the vacuum plating layer to form a plating layer.
Furthermore, the first protective layer, the second protective layer, the auxiliary electrode layer and the electroplated layer are overlapped with each other to form a first protective area.
The anti-sulfuration chip resistor and the manufacturing method thereof have the following beneficial effects:
the sulfur-resistant structure is firm and has strong sealing performance, and the formation of interface gaps under cold and hot impact can be effectively avoided; effectively resists the vulcanization erosion under the severe conditions of high temperature, high humidity, oil boiling and the like, and has stronger weather resistance.
Secondly, the high-palladium electrode material is combined with the structure to form multiple protection for sulfuration erosion, and expensive metal materials such as electrode slurry with palladium content of more than 30 percent, gold slurry, foil slurry or mixture slurry thereof are not needed, so that the low-cost benefit is achieved.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an anti-sulfuration chip resistor provided in the present embodiment;
fig. 2 is a flow chart illustrating a method for fabricating a sulfuration resistant chip resistor according to the present invention.
The electrode structure comprises a back electrode 1, a front electrode 2, a resistance layer 3, a first protective layer 4, a second protective layer 5, an auxiliary electrode layer 6, a vacuum coating layer 7, an electroplated layer 8, a first protective area 9 and a substrate 10.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar components or components having the same or similar functions throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
In the description of the present invention, it is to be understood that the terms "upper", "lower", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced device or assembly must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, and the two components can be communicated with each other or mutually interacted. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
Examples
Referring to fig. 1 and 2, fig. 1 is a schematic structural diagram of an anti-sulfuration chip resistor; fig. 2 is a flow chart illustrating a method for fabricating a sulfuration resistant chip resistor according to the present invention.
The substrate 10 is a ceramic substrate; the substrate 10 has a front surface, a back surface and two side surfaces;
herein, "inner" refers to a direction close to the middle region of the substrate, "outer" refers to a direction away from the middle region of the substrate;
two back electrodes 1 are arranged on the back plate surface of the substrate 10, the back electrodes 1 are spaced and not connected with each other, and each back electrode 1 has an inner side surface and an outer side surface; and printing the back electrode slurry on the back plate surface of the substrate 10 by adopting a screen printing technology, and drying to form the back electrode.
Two front electrodes 2 are arranged on the front plate surface of the substrate 10, the front electrodes 2 are spaced and not connected with each other, and each front electrode 2 has an outer side surface and an inner side surface; and printing the front electrode slurry on the front surface of the substrate 10 by adopting a screen printing technology, and drying to form the front electrode 2.
The front electrode 2 and the back electrode 1 are sintered at 850 ℃ to burn out the high molecular organic matter to form a glass phase, and conductive substances such as silver, palladium and the like are firmly attached to the substrate 10.
Forming a resistive layer 3 in a middle region on a front surface of the substrate 10; printing resistance paste between the inner side surfaces of the two front electrodes 2 by adopting a screen printing technology, wherein two opposite sides of the resistance layer 3 are respectively connected with the front electrodes 2; after the resistance layer is sintered at 850 ℃, the high molecular organic matters in the resistance layer 3 volatilize and carbonize to form a glass phase, and the semiconductor material is solidified on the substrate 10.
A first protective layer 4 is arranged above the resistive layer 3, the first protective layer 4 covers the resistive layer 3, and two opposite sides of the first protective layer 4 are respectively connected to the front electrode 2; covering the upper surface of the resistance layer 3 and two edges of the resistance layer 3 with glass slurry by adopting a screen printing technology; performing a sintering process at 600-620 ℃ on the first protection layer 4, volatilizing and carbonizing a high molecular organic matter in the first protection layer 4, vitrifying the slurry of the first protection layer 4, forming a glass layer above the resistance layer 3 and the front electrode 2 at the edge of the resistance layer 3, and protecting a covered area; the edge of a cutting groove of the resistor is prevented from being broken in the laser trimming process, and the moisture resistance and the insulating property of the resistor, the sulfuration corrosion resistance of the conductor and the like are improved;
and trimming the resistance value of the resistance layer by laser cutting, and adjusting the discrete resistance value to be within the range of the target resistance value.
A second protective layer 5 is arranged above the first protective layer 4, and the second protective layer covers 5 a part of the front electrode 2; a resin insulating material is covered over the first protective layer 4 by a screen printing technique.
The two auxiliary electrode layers 6 are respectively arranged on the two front electrodes 2, and the two auxiliary electrode layers 6 are respectively connected with the second protective layers 5 on the same side; and a layer of resin type conductive material is covered on the edges of the front electrode 2 and the second protective layer 5 to protect the electrodes, and the surface of the auxiliary electrode layer 6 after electroplating is covered by nickel and tin to protect the auxiliary materials and meet the size requirement of the front terminal.
A white material is printed on the upper surface of the outermost second protective layer 5 to mark resistance.
The second protective layer 5, the auxiliary electrode layer 6 and the white material on the outermost layer are cured at 200 ℃ to form a firm structure, so that the requirements of abrasion resistance and weather resistance are met.
And folding the sheet-shaped printed resistor into strips by mechanical force, and orderly arranging the strips in the jig.
The vacuum coating layers 7 are symmetrically arranged on the side surface of the substrate 10, each vacuum coating layer 7 extends downwards from the upper part of the auxiliary electrode layer to the back electrode 2, and the vacuum coating layers 7 cover the side surface of the substrate 10; the resistance side terminals arranged in the jig are plated with nichrome or similar series of conductive materials or alloy materials under vacuum conditions, so that the front electrode 2 and the back electrode 1 are connected to form the side terminals.
And folding the strip resistor with the side surface plated with the nickel-chromium alloy into a granular unit by mechanical force.
Two electroplated layers 8 are respectively arranged on two side surfaces of the substrate 10, and the electroplated layers 8 respectively cover the auxiliary electrode layer 6, the back electrode 2, the vacuum coating layer 7 and part of the second protective layer 5; nickel and tin layers are deposited respectively below the auxiliary electrode layer 6 on the front plate surface and the back electrode 2 on the back plate surface.
The first protective region 9 is formed by screen printing of the first protective layer 4, screen printing of the second protective layer 5, and electroplating and depositing a nickel-tin layer on the auxiliary electrode layer 6 and the terminal, thereby protecting the front electrode 2 densely.
The back electrode 1 is attached above the back plate surface of the substrate 10, the end surface of the outer side is connected with the vacuum coating layer 7, and the front surface and the electroplated layer 8 form the back electrode together;
the front electrode 2 is attached above the front surface of the substrate 10, the outer end surface is connected with the vacuum coating layer 7, and the resistance layer 3, the first protection layer 4, the second protection layer 5 and the auxiliary electrode layer 6 are sequentially covered above the front electrode.
The inner side surface of the front electrode 2 is overlapped with the resistance layer 3 to form impedance; the inner side surface of the front electrode 2 is overlapped with the first protective layer 4 and the second protective layer 5, the resistive layer 3, the first protective layer 4 and the second protective layer 5 form sealing protection on the electrode of the covering area, and the first protective layer 4 blocks the influence of moisture carrying vulcanizing substances under severe environment;
the resin type conducting material of the auxiliary electrode layer 6 and the resin insulation of the second protective layer 5 have strong binding force, can generate plastic deformation in a cold and hot environment, cannot form an interface gap, and has effective sealing protection on the front electrode 2.
In the sintered high-palladium electrode material, palladium can form a blocking vulcanized layer on the surface of the silver layer, and the high-palladium material inhibits chain chemical reaction to achieve the effect of multiple protection.
The invention has the beneficial effects that: the sulfur-resistant structure is firm and has strong sealing performance, and the formation of interface gaps under cold and hot impact can be effectively avoided; effectively resists the vulcanization erosion under the severe conditions of high temperature, high humidity, oil boiling and the like, and has stronger weather resistance.
Secondly, the high-palladium electrode material is combined with the structure to form multiple protection for sulfuration erosion, and expensive metal materials such as electrode slurry with palladium content of more than 30 percent, gold slurry, foil slurry or mixture slurry thereof are not needed, so that the low-cost benefit is achieved.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example" or "some examples" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by one skilled in the art.
While embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and not to be construed as limiting the present invention, and that changes, modifications and variations may be made therein by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. An anti-sulfuration chip resistor, comprising:
a substrate (10) having a front plate surface, a back plate surface, and side surfaces;
back electrodes (1) provided at intervals on a back plate surface of the substrate (10);
front electrodes (2) provided at intervals on the front surface of the substrate (10);
a resistive layer (3) provided on the front surface of the substrate (10);
the first protective layer (4) covers the resistor layer (3), and two opposite sides of the first protective layer (4) are respectively connected with the front electrode (2);
the second protective layer (5) covers the first protective layer (4), and two opposite sides of the second protective layer (5) are respectively connected to the front electrode (2);
the auxiliary electrode layers (6) are respectively arranged on the two front electrodes (2), and the auxiliary electrode layers (6) are respectively overlapped with the second protective layers (5) on the same side;
the vacuum coating layers (7) are symmetrically arranged on the side surface of the substrate (10), each vacuum coating layer (7) extends downwards from the upper part of the auxiliary electrode layer (6) to the back electrode (1), and the vacuum coating layers (7) cover the side surface of the substrate (10);
and the electroplated layers (8) are respectively and symmetrically covered on the vacuum coating layer (7), each electroplated layer (8) extends downwards from the upper part of the auxiliary electrode layer (6) to the back electrode (1), and the electroplated layers (8) cover the back electrode and are connected to the substrate (10).
2. Sulfuration resistant chip resistor according to claim 1, wherein the first protective layer (4), the second protective layer (5), the auxiliary electrode layer (6) and the plating layer (8) are overlapped by nickel and tin after electrodeposition to form the first protective region (9).
3. Sulfuration resistant chip resistor according to claim 1, wherein the front side electrode (2) is of a high palladium electrode material.
4. Sulfuration resistant chip resistor according to claim 1, wherein the first protective layer (4) is a glass layer;
the second protective layer (5) is a resin layer.
5. Sulfuration resistant chip resistor according to claim 1, wherein the auxiliary electrode layer (6) is a resin type conductive material, such as a silver material.
6. Sulfuration resistant chip resistor according to claim 1, wherein the substrate (10) is a ceramic substrate.
7. A method of manufacturing an anti-sulfuration chip resistor, comprising the steps of:
s1, providing a substrate (10), wherein the substrate (10) is provided with a front plate surface, a back plate surface and a side surface;
s2, arranging back electrodes (1) on the back plate surface of the substrate (10), wherein the back electrodes (1) are arranged on the back plate surface of the substrate (10) at intervals, and each back electrode (1) is provided with an outer side surface;
s3, arranging two front electrodes (2) on the front plate surface of the substrate (10), wherein the front electrodes (2) are spaced, and each front electrode (2) is provided with an outer side surface;
s4, forming a resistance layer (3) in the middle area of the front plate surface of the substrate (10), wherein two opposite sides of the resistance layer (3) are respectively connected with the front electrode (2);
s5, arranging a first protective layer (4) above the resistance layer (3), wherein two opposite sides of the first protective layer (4) are respectively connected with the front electrode (2);
s6, arranging a second protective layer (5) above the first protective layer (4), wherein the second protective layer (5) covers the first protective layer (2), and two opposite sides of the second protective layer are respectively connected to the front electrode (2);
s7, arranging two auxiliary electrode layers (6) on the two front electrodes (2) respectively, wherein the auxiliary electrode layers (6) are overlapped with the second protection layers (5) on the same side respectively;
s8, symmetrically arranging vacuum coating layers (7) on the side faces of the substrate (10), wherein each vacuum coating layer (7) extends downwards to the back electrode (1) from the upper part of the auxiliary electrode layer (6), and the vacuum coating layers (7) cover the side faces of the ceramic substrate (10);
and S9, respectively and symmetrically covering the vacuum coating layer (7) with two electroplated layers (8), wherein each electroplated layer (8) extends downwards to the back electrode (1) from the upper parts of the front electrode (2) and the auxiliary electrode layer (6), and the electroplated layers cover the back electrode and are connected to the substrate.
8. The method of manufacturing a sulfuration resistant chip resistor according to claim 6,
in step S2, two back electrodes (1) are formed on the back surface of the substrate (10) by screen printing;
in step S3, two front electrodes (2) are formed on the front surface of the substrate (10) by screen printing;
in step S4, forming a resistive layer (3) on the front plate surface of the substrate (10) by screen printing;
in step S5, forming a first protective layer (4) over the resistive layer (3) by screen printing;
in step S6, a second protective layer (5) is formed over the first protective layer (4) by screen printing.
9. The method of manufacturing a sulfuration resistant chip resistor according to claim 6,
in step S8, plating nickel-chromium alloy on two side surfaces of the substrate (10) under vacuum condition to form a vacuum coating layer (7);
in step S9, nickel and tin are plated on the outer sides of the auxiliary electrode layer (6), the back electrode (1), and the vacuum plating layer (7) to form a plating layer (8).
10. The method for manufacturing a chip resistor having resistance to sulfidation as recited in claim 6, wherein the first protective layer (4), the second protective layer (5), the auxiliary electrode layer (6) and the plating layer (8) are overlapped with nickel and tin after electrodeposition to form the first protective region (9).
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010193567.0A CN111341509A (en) | 2020-03-18 | 2020-03-18 | Anti-vulcanization chip resistor and manufacturing method thereof |
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| CN202010193567.0A CN111341509A (en) | 2020-03-18 | 2020-03-18 | Anti-vulcanization chip resistor and manufacturing method thereof |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112992403A (en) * | 2021-04-21 | 2021-06-18 | 西安宏星电子浆料科技股份有限公司 | Silver migration resistant and silver sulfide resistant electrode slurry and preparation method thereof |
| CN113690003A (en) * | 2021-07-12 | 2021-11-23 | 华南理工大学 | Thick film chip resistor and manufacturing method thereof |
| CN114388209A (en) * | 2022-01-18 | 2022-04-22 | 翔声科技（厦门）有限公司 | Negative temperature coefficient thermistor suitable for severe environment and manufacturing process thereof |
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2020
- 2020-03-18 CN CN202010193567.0A patent/CN111341509A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112992403A (en) * | 2021-04-21 | 2021-06-18 | 西安宏星电子浆料科技股份有限公司 | Silver migration resistant and silver sulfide resistant electrode slurry and preparation method thereof |
| CN113690003A (en) * | 2021-07-12 | 2021-11-23 | 华南理工大学 | Thick film chip resistor and manufacturing method thereof |
| CN114388209A (en) * | 2022-01-18 | 2022-04-22 | 翔声科技（厦门）有限公司 | Negative temperature coefficient thermistor suitable for severe environment and manufacturing process thereof |
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