CN111338455A - A server power management device, method and system - Google Patents

Abstract

The invention provides a server power supply management device, method and system, wherein the device comprises: the control chip is connected with the processor through an I2C bus; the enabling pin of the control chip is connected with the server power supply module; the input pin of the control chip is connected with the output end of the power supply module; the control chip is connected with the BMC through an SJTAG interface. The invention realizes the rapid and accurate control of the power module, can accurately monitor the power module in real time, can review the previous monitoring result once the power module fails, and realizes the failure traceability of the power module.

Description

A server power management device, method and system

technical field

The invention belongs to the technical field of servers, and in particular relates to a server power management device, method and system.

Background technique

At present, the commonly used server power control methods are the CPLD of lattice manufacturers and the ARM chips of ASPEED manufacturers to realize the power management function. The CPLD or ARM uses the Power Good signal to control the DC-DC module (power module).

The power good signal of the DC-DC module (power module) generally has a large error, about 8% to 20%. It is inaccurate to use this signal to record the state of the power supply, because most chips require the accuracy of the power supply is 5% or even lower. If Power Good is used as the sign of whether the power-on or power-off is ok, there is a certain risk for some chips, especially for chips with high power supply accuracy requirements; for example: during the power-off process, when the Power Good signal After it becomes low, the CPLD thinks that the power-down has been completed, but there are still some power supplies in the chip that have not been completely turned off. The control module inside the chip thinks that it is in a power-supply state. At this time, if it continues to be powered on, after the power is supplied, the power of the chip has not been completely turned off before. , Power on again, the power supply module inside the chip will not respond to the external power supply, which will cause the chip to have a latch-up effect, and then cause a downtime problem. When doing error logging, the BMC cannot record the status of all power supplies at the moment of power failure due to the serial execution of the program itself. What's more, the BMC crashes without time to record the erroneous power supply information. In this way, since the power supply information at the time point when the power supply is abnormal cannot be recorded in time, it is meaningless for debugging. Using CPLD to monitor the Power Good signal to record whether the power supply is ok or not has a great error. If there are many power supplies to be monitored, the link topology is complex, and there are many miscellaneous lines in the schematic and layout files.

SUMMARY OF THE INVENTION

In view of the above shortcomings of the prior art, the present invention provides a server power management device, method and system to solve the above technical problems.

The present invention provides a server power management device, the device comprising:

control chip, the control chip is connected to the processor through the I2C bus; the enable pin of the control chip is connected to the server power supply module; the input pin of the control chip is connected to the output end of the power supply module; the control chip is connected through the SJTAG interface BMC.

Further, the control chip is connected to the offline programmer through the SJTAG interface.

Further, the control chip includes a plurality of enabling pins and a plurality of corresponding input pins; the enabling pins are connected to the input end of the power supply module, and the corresponding input pins are connected to the output end of the power supply module to form a power management loop. .

Further, the control chip adopts POER1220 chip.

The present invention also provides a server power management method, the method comprising:

Control the power state according to the power control command issued by the processor;

Collect the actual voltage of the current power module;

Determine whether the actual voltage matches the power state:

If not, generate an error message and report the error message to the processor.

Further, the control of the power supply state according to the power supply control instruction issued by the processor includes:

Collect and save the mapping relationship between the power module device code and the enable pin number;

extracting the target power module device code of the control instruction;

Invoke the corresponding enable pin according to the target power module device code and the mapping relationship;

A control instruction is issued to the target power supply module through the corresponding enable pin.

Further, the judging whether the actual voltage conforms to the power supply state includes:

Recording the target power state of the latest control instruction of the target power module, the power state includes a power-on state and a power-off state;

If the target power state is the power-on state, it is determined whether the actual voltage is not 0, and if so, the actual voltage conforms to the power state;

If the target power state is the power-off state, it is determined whether the actual voltage is 0, and if so, the actual voltage conforms to the power state.

Further, the method also includes:

Set the reference voltage value;

Collect the actual voltage of the power module in the power-on state;

Call the voltage comparator to compare whether the actual voltage is consistent with the reference voltage value:

If not, write the difference between the actual voltage and the reference voltage value into an error log and save the error log.

The present invention also provides a server power management system, which includes:

a power control unit, configured to control the power state according to the power control instruction issued by the processor;

The voltage acquisition unit is configured to collect the actual voltage of the current power module;

a voltage judging unit, configured to judge whether the actual voltage conforms to the power state;

An error reporting unit, configured to generate an error prompt and report the error prompt to the processor if the actual voltage does not conform to the power state.

Further, the system also includes:

a reference setting unit, configured to set the reference voltage value;

The voltage monitoring unit is configured to collect the actual voltage of the power module in the power-on state;

a consistent comparison unit, configured to call a voltage comparator to compare whether the actual voltage is consistent with the reference voltage value;

A log recording unit, configured to write the difference between the actual voltage and the reference voltage value into an error log and save the error log if the actual voltage is inconsistent with the reference voltage value.

The beneficial effect of the present invention is that,

The invention provides a server power management device, method and system. By adding a control chip, the control chip is used to establish a direct control link between a processor (CPU or CPLD) and a power supply module, and the PowerGood signal of the power supply module is no longer used as a control The medium, using the voltage parameters, realizes the fast and accurate control of the power module, and can monitor the power module accurately in real time. Once the power module fails, the previous monitoring results can also be reviewed, and the fault of the power module can be traced back. sex. In addition, the topology of the present invention is simple, and the problem of excessive stray lines will not occur even if the power supply is relatively large.

In addition, the present invention has reliable design principle and simple structure, and has a very wide application prospect.

Description of drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. In other words, other drawings can also be obtained based on these drawings without creative labor.

FIG. 1 is a schematic structural diagram of an apparatus according to an embodiment of the present application.

Detailed ways

In order to make those skilled in the art better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described The embodiments are only some of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

It should be noted that the embodiments of the present invention and the features of the embodiments may be combined with each other under the condition of no conflict.

In the description of the present invention, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense, unless otherwise expressly specified and limited, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; can be mechanical connection, can also be electrical connection; can be directly connected, can also be indirectly connected through an intermediate medium, can be internal communication between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood through specific situations.

The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

Example 1

Referring to FIG. 1 , this embodiment provides a server power management device, the device structure is as follows:

The CPU or CPLD is connected to the POER1220 chip through the IIC bus, which is used for the CPU to obtain the power supply status, current value and temperature value from the POER1220 chip; the BMC is connected to the POER1220 chip through the SJTAG interface, which is used to upgrade the logic program of the 1220 chip. In addition, the POER1220 chip A SJTAG Header (offline programmer) is also connected through the SJTAG interface for offline upgrade of the logic program of the POER1220 chip; the Enable0 and Enablen pins of the POER1220 chip are connected to an external DC-DC module for enabling DC-DC The module outputs the power supply voltage to supply the load, and the voltages Vout0 and Voutn output by the DC-DC module are connected to the VMON pin of the POER1220 signal for real-time monitoring of the power supply voltage. A voltage comparator is used inside the VMON pin to compare the Vout voltage with the reference voltage designed by the internal logic program, and then obtain the overvoltage and undervoltage states, and obtain the accurate value of Vout. In this embodiment, the POER1220 chip controls multiple power modules. For example, Enable0, power module 0 and VMON0 form a control loop, and Enablen, power module n and VMONn form a control loop.

The Signals section contains the following definitions:

The SJTAG signal is used to upgrade the logic program of the POER1220 chip.

The IIC signal is used by the CPU to obtain the power supply voltage, current and temperature from the 1220 chip.

The Enable0/Enablen signal is used to enable the DC-DC module.

Vout0/Voutn is the output voltage of the DC-DC module.

Example 2

This embodiment provides a server power management device, the device includes:

FPGA, the FPGA is connected to the processor through the I2C bus; the enable pin of the FPGA is connected to the server power supply module; the input pin of the FPGA is connected to the output end of the power supply module; the FPGA is connected to the BMC through the SJTAG interface.

Example 3

This embodiment provides a server power management device, the device includes:

The control chip is connected to the processor through the I2C bus. The control chip is connected to the BMC through the SJTAG interface. A group of power modules is connected between a pair of enable pins and input pins of the control chip.

Example 4

This embodiment provides a server power management method, including the following steps:

S1. After receiving the power control instruction issued by the processor (CPU or CPLD), extract the target power module device code and the target power state in the instruction. Collect and save the mapping relationship between the power module device code and the enable pin number in advance, call the corresponding enable pin according to the target power module device code and mapping relationship, and issue a control command to the target power module through the corresponding enable pin to control the The target power module switches to the target power state.

S2. Collect the actual voltage of the target power module through the corresponding input pin of the target power module, and judge whether the actual voltage is consistent with the target power state (power-on state or power-off state). Whether the actual voltage is not 0, if yes, the actual voltage conforms to the power state, if not, it does not conform; if the target power state is the power-off state, then judge whether the actual voltage is 0, if so, the actual voltage conforms to the power state, if not, then incompatible. If the actual voltage does not match the power state, an error message will be generated and reported to the processor, and the error message will be written to the local error log at the same time.

S3. Set the reference voltage value (12V), collect the actual voltage of the power module in the power-on state; call the voltage comparator to compare whether the actual voltage and the reference voltage value are consistent: if they are inconsistent, compare the actual voltage with the reference voltage value. The difference value is written to the error log and saved in the control chip.

Example 5

This embodiment provides a server power management system, including:

a power control unit, configured to control the power state according to the power control instruction issued by the processor;

The voltage acquisition unit is configured to collect the actual voltage of the current power module;

a voltage judging unit, configured to judge whether the actual voltage conforms to the power state;

An error reporting unit, configured to generate an error prompt and report the error prompt to the processor if the actual voltage does not conform to the power state.

Further, as an embodiment of the present application, the system further includes:

a reference setting unit, configured to set the reference voltage value;

The voltage monitoring unit is configured to collect the actual voltage of the power module in the power-on state;

a consistent comparison unit, configured to call a voltage comparator to compare whether the actual voltage is consistent with the reference voltage value;

A log recording unit, configured to write the difference between the actual voltage and the reference voltage value into an error log and save the error log if the actual voltage is inconsistent with the reference voltage value.

Although the present invention has been described in detail in conjunction with the preferred embodiments with reference to the accompanying drawings, the present invention is not limited thereto. Without departing from the spirit and essence of the present invention, those of ordinary skill in the art can make various equivalent modifications or substitutions to the embodiments of the present invention, and these modifications or substitutions should all fall within the scope of the present invention/any Those skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should all be included within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims (10)

1. A server power management apparatus, the apparatus comprising:

the control chip is connected with the processor through an I2C bus; the enabling pin of the control chip is connected with the server power supply module; the input pin of the control chip is connected with the output end of the power supply module; the control chip is connected with the BMC through an SJTAG interface.

2. The device of claim 1, wherein the control chip is connected to the offline burner through an SJTAG interface.

3. The apparatus of claim 1, wherein the control chip comprises a plurality of enable pins and a plurality of corresponding input pins; the enabling pin is connected with the input end of the power supply module, and the corresponding input pin is connected with the output end of the power supply module to form a power supply management loop.

4. The device of claim 1, wherein the control chip is a POER1220 chip.

5. A server power management method, the method comprising:

controlling the power state according to a power control instruction issued by the processor;

collecting the actual voltage of the current power supply module;

judging whether the actual voltage meets the power supply state:

and if not, generating an error prompt and reporting the error prompt to the processor.

6. The method of claim 5, wherein the controlling the power state according to the power control command issued by the processor comprises:

acquiring and storing a mapping relation between a power module device code and an enabling pin number;

extracting a target power module device code of the control instruction;

calling a corresponding enabling pin according to the target power module equipment code and the mapping relation;

and issuing a control instruction to the target power supply module through the corresponding enabling pin.

7. The method of claim 5, wherein the determining whether the actual voltage meets the power state comprises:

recording a target power supply state of a latest control instruction of a target power supply module, wherein the power supply state comprises a power-on state and a power-off state;

if the target power state is a power-on state, judging whether the actual voltage is not 0, and if so, conforming to the power state;

if the target power supply state is a power-off state, judging whether the actual voltage is 0, and if so, determining that the actual voltage conforms to the power supply state.

8. The method of claim 5, further comprising:

setting a reference voltage value;

collecting the actual voltage of the power supply module in the power-on state;

calling a voltage comparator to compare whether the actual voltage is consistent with the reference voltage value:

and if not, writing the difference value of the actual voltage and the reference voltage value into an error log and storing the error log.

9. A server power management system, the system comprising:

the power supply control unit is configured for controlling the power supply state according to a power supply control instruction issued by the processor;

the voltage acquisition unit is configured for acquiring the actual voltage of the current power supply module;

the voltage judging unit is configured for judging whether the actual voltage accords with the power supply state;

and the error reporting unit is configured to generate an error prompt and report the error prompt to the processor if the actual voltage does not conform to the power state.

10. The system of claim 9, further comprising:

a reference setting unit configured to set a reference voltage value;

the voltage monitoring unit is used for acquiring the actual voltage of the power supply module in the power-on state;

the consistency comparison unit is configured to call a voltage comparator to compare whether the actual voltage is consistent with the reference voltage value;

and the log recording unit is configured to write the difference value between the actual voltage and the reference voltage value into an error log and store the error log if the actual voltage is inconsistent with the reference voltage value.

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