CN111327221A - Inverter space vector pulse width modulation method and device - Google Patents
Inverter space vector pulse width modulation method and device Download PDFInfo
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- CN111327221A CN111327221A CN201811525360.8A CN201811525360A CN111327221A CN 111327221 A CN111327221 A CN 111327221A CN 201811525360 A CN201811525360 A CN 201811525360A CN 111327221 A CN111327221 A CN 111327221A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
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Abstract
The invention provides a space vector pulse width modulation method and a space vector pulse width modulation device for an inverter, which are characterized by comprising the following steps: acquiring a reference coordinate of a reference voltage vector of the inverter on a rectangular coordinate system; determining three component vectors of the reference voltage vector according to the reference coordinate; determining three action times of the reference voltage vector according to the three component vectors of the reference voltage vector and the reference voltage vector; respectively allocating the three action times to the three component vectors according to a preset allocation rule; and controlling the main circuit switching device by respectively distributing three action times for the three component vectors. The space vector pulse width modulation method of the inverter provided by the invention improves the operation speed of the processor.
Description
Technical Field
The invention relates to the field of mechanical control, in particular to a space vector pulse width modulation method and device for an inverter.
Background
The Pulse Width Modulation (PWM) control technique is a common and core technique of high-performance power electronic system, and is a technique which utilizes the turn-on and pipe section of semiconductor device to program DC voltage into voltage pulse sequence with a certain form so as to implement frequency conversion and voltage transformation and effectively control and eliminate harmonic wave. The space voltage vector modulation (SVPWM) method is a pulse width modulation method established on the space voltage vector synthesis concept, and the method is easy to realize digitalization, has good output waveform quality, is close to sine, reasonably arranges space vectors, can reduce switching frequency and switching loss.
In the existing inverter space vector pulse width modulation method, three basic vectors for synthesizing a reference voltage vector are determined according to a reference voltage vector synthesis principle and a vector angle where the obtained vector is located, action time corresponding to each basic vector of reference voltage is determined according to the three basic vectors, and finally time states are distributed, so that the inverter space vector pulse width modulation is realized.
However, in the existing inverter space vector pulse width modulation method, three basic vectors of the reference voltage vector are operated through the vector angle of the obtained vector, and the operation speed of the processor is slow, which is not beneficial to quickly and efficiently completing the inverter space vector pulse width modulation.
Disclosure of Invention
The invention provides a space vector pulse width modulation method and device of an inverter, which are used for improving the operation speed of a processor.
The invention provides an inverter space vector pulse width modulation method in a first aspect, which comprises the following steps:
acquiring a reference coordinate of a reference voltage vector of the inverter on a rectangular coordinate system;
determining three component vectors of the reference voltage vector according to the reference coordinate;
determining three action times of the reference voltage vector according to the three component vectors of the reference voltage vector and the reference voltage vector;
respectively distributing the three action times to the three component vectors according to a preset distribution rule;
and controlling the main circuit switching device by respectively distributing the three action times to the three component vectors.
Optionally, the determining three component vectors of the reference voltage vector according to the reference coordinate includes:
determining a vector angle of the reference voltage vector according to the reference coordinate;
determining an algorithm area corresponding to the vector angle of the reference voltage vector;
determining an algorithm unit corresponding to the reference voltage vector from the algorithm area;
and synthesizing the reference vector corresponding to the algorithm unit into three component vectors corresponding to the reference voltage vector.
Optionally, the determining, from the algorithm area, an algorithm unit corresponding to the reference voltage vector includes:
determining a comparison model corresponding to the reference voltage vector according to the vector angle of the reference voltage vector;
inputting the reference coordinates into a comparison model corresponding to the reference voltage vector, so that the comparison model corresponding to the reference voltage vector outputs a label of an algorithm unit;
and determining the algorithm unit corresponding to the reference voltage vector from the algorithm area according to the label of the algorithm unit.
Optionally, the determining three action times of the reference voltage vector according to the three sub-vectors of the reference voltage vector and the reference voltage vector includes:
inputting the three component vectors of the reference voltage vector and the reference voltage vector into a volt-second balance calculation model, and outputting three action times of the reference voltage vector through the volt-second balance calculation model.
Optionally, the volt-second balance calculation model is V1*T1+V2*T2+V3*T3＝Vref*Ts，
T1+T2+T3＝Ts，
Wherein, T1、T2And T3Three action times, V, of the reference voltage vector, respectively1、V2And V3Three components, T, of a reference voltage vector, respectivelysIs a sampling period, VrefIs a vector of reference voltages.
A second aspect of the present invention provides an inverter space vector pulse width modulation apparatus, including:
the coordinate acquisition module is used for acquiring a reference coordinate of a reference voltage vector of the inverter on a rectangular coordinate system;
the component vector determining module is used for determining three component vectors of the reference voltage vector according to the reference coordinate;
the action time determining module is used for determining three action times of the reference voltage vector according to the three component vectors of the reference voltage vector and the reference voltage vector;
the distribution module is used for distributing the three action times to the three sub-vectors according to a preset distribution rule;
and the control module is used for controlling the main circuit switching device through the three action times respectively distributed to the three component vectors.
Optionally, the component vector determining module includes:
the vector angle determining unit is used for determining the vector angle of the reference voltage vector according to the reference coordinate;
the algorithm area determining unit is used for determining an algorithm area corresponding to the vector angle of the reference voltage vector;
the algorithm determining unit is used for determining an algorithm unit corresponding to the reference voltage vector from the algorithm area;
and the synthesis unit is used for synthesizing the reference vector corresponding to the algorithm unit into three component vectors corresponding to the reference voltage vector.
Optionally, the algorithm determining unit includes:
the selection subunit is used for determining a comparison model corresponding to the reference voltage vector according to the vector angle of the reference voltage vector;
the comparison subunit is used for inputting the reference coordinates into the comparison model corresponding to the reference voltage vector, so that the comparison model corresponding to the reference voltage vector outputs a label of the algorithm unit;
and the result determining subunit is used for determining the algorithm unit corresponding to the reference voltage vector from the algorithm area according to the label of the algorithm unit.
Optionally, the action time determining module is specifically configured to input the three sub-vectors of the reference voltage vector and the reference voltage vector into a volt-second balance calculation model, and output the three action times of the reference voltage vector through the volt-second balance calculation model.
Optionally, the volt-second balance calculation model is V1*T1+V2*T2+V3*T3＝Vref*Ts，
T1+T2+T3＝Ts，
Wherein, T1、T2And T3Three action times, V, of the reference voltage vector, respectively1、V2And V3Three components, T, of a reference voltage vector, respectivelysIs a sampling period, VrefIs a vector of reference voltages.
A third aspect of the present invention provides an electronic apparatus comprising: a memory and a processor;
the memory for storing executable instructions of the processor;
the processor is configured to perform the method referred to in the first aspect and alternatives thereof via execution of the executable instructions.
In a fourth aspect of the present invention, there is provided a storage medium having stored thereon a computer program which, when executed by a processor, implements the method of the first aspect and its alternatives.
According to the space vector pulse width modulation method and device for the inverter, the reference coordinate of the reference voltage vector on the rectangular coordinate system is obtained, the component vector corresponding to the reference voltage vector and the action time are determined according to the reference coordinate, and the main circuit switching device is controlled according to the component vector and the action time, so that operation through a vector angle is avoided, and the operation speed of a processor is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a method for modulating a space vector pulse width of an inverter according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an algorithm area division of a reference voltage vector according to an embodiment of the present invention;
FIG. 3 is a seven-segment SVPWM waveform of a first algorithm unit in a first algorithm area according to an embodiment of the present invention;
fig. 4 is a schematic flowchart of a step S12 according to the embodiment of the present invention;
fig. 5 is a schematic diagram illustrating division of an algorithm area according to an embodiment of the present invention;
fig. 6 is a schematic flowchart of a step S43 according to the embodiment of the present invention;
fig. 7 is a schematic structural diagram of an inverter space vector pulse width modulation apparatus according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a component vector determining module according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of an algorithm determining unit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," and the like in the description of the invention and the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein.
It should be understood that, in various embodiments of the present invention, the sequence numbers of the processes do not mean the execution sequence, and the execution sequence of the processes should be determined by the functions and the internal logic of the processes, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
It should be understood that in the present application, "comprising" and "having" and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be understood that in the present invention, "B corresponding to a", "a corresponds to B", or "B corresponds to a" means that B is associated with a, from which B can be determined. Determining B from a does not mean determining B from a alone, but may be determined from a and/or other information.
As used herein, "if" may be interpreted as "at … …" or "when … …" or "in response to a determination" or "in response to a detection", depending on the context.
The technical scheme of the application is described in detail as follows:
the application scenario of the embodiment of the present application is introduced below, and space voltage vector modulation (SVPWM) is a pulse width modulation method based on a space voltage vector synthesis concept, and this method has the advantages of high voltage utilization rate, easy digitization, good output waveform quality, approaching to sine, reasonable arrangement of space vectors, reduction of switching frequency of switching devices in an inverter, and reduction of switching loss.
The technical solution of the present invention will be described in detail below with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
Fig. 1 is a schematic flowchart of a method for modulating a space vector pulse width of an inverter according to an embodiment of the present invention.
Referring to fig. 1, the inverter space vector pulse width modulation method includes:
s11: and acquiring a reference coordinate of a reference voltage vector of the inverter on a rectangular coordinate system.
The inverter in the embodiment can adopt a three-level inverter, and a three-level topological structure of the three-level inverter has the advantages of large output capacity, high output voltage, small current harmonic content and the like, so that the three-level structure is widely applied to the field of variable frequency speed regulation of high-voltage high-power alternating current motors.
In practical applications, the inverter space vector pulse width modulation method may be applied to an inverter space vector pulse width modulation device, and a main body of the inverter space vector pulse width modulation device may be implemented by a computer program, such as a software application, or may also be implemented by a physical device integrated with a related computer program, such as a processor, or may also be implemented by a storage medium storing the related computer program. The main body of the method is a processor.
In practical applications, the processor may represent the reference voltage vector of the inverter on the rectangular coordinate plane α - β by using the reference coordinates of the α axis and the β axis, and then, the three component vectors of the reference voltage vector and the vector angles of the reference vector may be represented by the reference coordinates of the α axis and the β axis.
S12: three component vectors of the reference voltage vector are determined according to the reference coordinates.
In practical application, after the processor acquires the reference coordinates of the reference voltage vector, the processor may find the corresponding algorithm unit of the reference voltage vector in the algorithm region partition map in a region judgment manner, acquire three reference Vectors corresponding to the algorithm unit, and synthesize the three component Vectors of the reference voltage according to the Nerester Triangle Vector (NTV) rule.
Specifically, fig. 2 is a schematic diagram of algorithm region division of a reference voltage vector according to an embodiment of the present invention.
Referring to fig. 2, an algorithm area division diagram divides the whole vector space into six algorithm areas i-vi, each of which may include 1-6 algorithm units, taking area i as an example, fig. 2 shows the corresponding relationship between different switch states and space vectors, where pon indicates that the switch states of the three-phase outputs a, B, and C are positive, zero, and negative, respectively, the same voltage vector may correspond to different switch states, and the more redundant switch states correspond, the more the corresponding redundant switch states, the more each layer goes from the outermost hexagon to the inside, the redundancy of the switch states corresponding to the vector is increased by 1, for example, the redundancy of the long vector and the medium vector at the outermost layer is 1, the redundancy of the short vector is 2, and the redundancy of the zero vector at the innermost layer is 3.
S13: and determining three action times of the reference voltage vector according to the three sub-vectors of the reference voltage vector and the reference voltage vector.
Optionally, the method may specifically include inputting the three partial vectors of the reference voltage vector and the reference voltage vector into a volt-second balance calculation model, and outputting three action times of the reference voltage vector through the volt-second balance calculation model.
Wherein, the volt-second balance calculation model is as follows:
V1*T1+V2*T2+V3*T3＝Vref*Ts，
T1+T2+T3＝Ts，
wherein, T1、T2And T3Three action times, V, of the reference voltage vector, respectively1、V2And V3Three components, T, of a reference voltage vector, respectivelysIs a sampling period, VrefIs a vector of reference voltages.
In practical application, the processor determines three component vectors V1、V2、V3And a reference voltage vector VrefThe voltage-second balance calculation model is brought together, and the three action times T of the reference voltage vector are solved by the voltage-second balance calculation model1、T2And T3。
In another possible implementation manner, the action time corresponding to the reference voltage vector corresponding to each arithmetic unit can be calculated in advance through the volt-second balance calculation model to form a reference voltage vector action time table, and the reference coordinate value a corresponding to the α axis and the reference coordinate value B corresponding to the β axis are substituted into the corresponding time formula to calculate three action times T1、T2And T3. Specifically, table 1 is a reference voltage vector action time table, where T is a sampling period and U is a bus voltage.
TABLE 1
S14: and respectively allocating the three action times to the three component vectors according to a preset allocation rule.
In practical application, the distribution rule can be preset according to specific control requirements, and the three action times are distributed. In one allocation rule, a centrosymmetric seven-segment SVPWM waveform can be adopted to allocate the action time of the vector component to the corresponding vector state.
Fig. 3 is a seven-segment SVPWM waveform of a first algorithm unit in a first algorithm region according to an embodiment of the present invention. Specifically, the first algorithm unit in the first algorithm area may be taken as an example, and refer to fig. 3. Wherein, V1、V2And V3Three component vectors of the reference voltage vector are respectively, and T is a sampling period.
S15: and controlling the main circuit switching device by respectively distributing three action times for the three component vectors.
In practical application, the three component vectors are respectively distributed to three action times, namely, the on time and the off time are respectively distributed to the switching devices of the inverter, so that the control of the main circuit switching devices in the inverter is completed.
Optionally, fig. 4 is a schematic flowchart of step S12 according to an embodiment of the present invention.
Referring to fig. 4, step S12 may specifically include:
s41: and determining the vector angle of the reference voltage vector according to the reference coordinate.
In practical application, the sine value and the cosine value of the vector angle of the reference voltage vector can be obtained through the reference coordinate value A corresponding to the α axis and the reference coordinate value B corresponding to the β axis in the reference coordinate, and further the vector angle of the reference voltage vector can be obtained.
S42: and determining an algorithm area corresponding to the vector angle of the reference voltage vector.
In practical application, referring to fig. 2, the vector angle is divided into an algorithm region every 60 °, and the algorithm region corresponding to the vector angle of the reference voltage vector can be determined by referring to fig. 3 according to the determined vector angle.
S43: and determining an algorithm unit corresponding to the reference voltage vector from the algorithm area.
In an implementation manner, reference may be made to fig. 5, and fig. 5 is a schematic diagram illustrating division of an algorithm area according to an embodiment of the present invention.
Specifically, the algorithm unit corresponding to the reference voltage vector may be determined by the relationship between the position of the reference voltage vector and the reference lines a, b, c, and d in fig. 5. Specifically, an algorithm unit 1 is arranged on the left side of the reference line a and on the lower side of the reference line d; on the left side of the reference line a and on the upper side of the reference line d is an arithmetic unit 2; simultaneously, an arithmetic unit 3 is arranged at the right side of the reference line a, at the lower side of the reference line d and at the left side of the reference line c; simultaneously, an arithmetic unit 4 is arranged on the right side of the reference line a, on the upper side of the reference line d and on the lower side of the reference line b; an arithmetic unit 6 is arranged on the upper side of the reference line b; to the right of the reference line c is an arithmetic unit 5. Reference line a, reference line b, reference line c, and reference line d may each be represented by coordinates.
S44: and synthesizing the reference vectors corresponding to the algorithm unit into three component vectors corresponding to the reference voltage vector.
In practical application, after the algorithm unit where the reference voltage vector is located is determined, three reference Vectors corresponding to the algorithm unit can be obtained, and three partial Vectors of the reference voltage are synthesized according to the Nergy Triangle Vector (NTV) rule.
Optionally, fig. 6 is a schematic flowchart of step S23 according to an embodiment of the present invention.
Referring to fig. 6, step S43 may specifically include:
s61: and determining a comparison model corresponding to the reference voltage vector according to the vector angle of the reference voltage vector.
In practical applications, referring to fig. 5, when the vector angle is greater than or equal to 30 ° compared with the α axis, the comparison model corresponding to the reference voltage vector may be determined as the first comparison model, and when the vector angle is greater than or equal to 30 ° compared with the α axis, the comparison model corresponding to the reference voltage vector may be determined as the second comparison model.
S62: inputting the reference coordinates into a comparison model corresponding to the reference voltage vector, so that the comparison model corresponding to the reference voltage vector outputs a label of an algorithm unit;
s63: and determining the algorithm unit corresponding to the reference voltage vector from the algorithm area according to the label of the algorithm unit.
In practical application, taking the area of the first algorithm as an example, the reference voltage vector VrefThe coordinate value on the α axis is a, the flag value on the β axis is B, and U is the bus voltage.
Wherein the first comparison model is obtained by respectively comparing B with B
And
making a comparison if B is less than or equal to
The first comparison model outputs the label 1 of the algorithm unit; if B is less than or equal to
The first comparison model outputs the reference number 5 of the algorithm unit; if B is greater than
And is greater than
The first comparison model outputs the reference numeral 3 of the arithmetic unit.
A second comparison model, comparing B with B
And
making a comparison if B is less than or equal to
The second comparison model outputs the reference number 2 of the algorithm unit; if B is greater than or equal to
The second comparison model outputs the reference number 6 of the algorithm unit; if B is greater than
And is less than
The second comparison model outputs the reference numeral 4 of the algorithm unit.
And finally, according to the labels of the algorithm units output by the comparison model, determining the algorithm units corresponding to the reference voltage vectors from the determined algorithm model.
According to the inverter space vector pulse width modulation method provided by the embodiment, the reference coordinate of the reference voltage vector on the rectangular coordinate system is obtained, the component vector and the acting time corresponding to the reference voltage vector are determined according to the reference coordinate, and the main circuit switching device is controlled according to the component vector and the acting time, so that the operation through the vector angle is avoided, the mathematical operation of the processor corresponding to sine and cosine is reduced, and the operation speed of the processor is further improved.
Fig. 7 is a schematic structural diagram of an inverter space vector pulse width modulation apparatus according to an embodiment of the present invention.
Referring to fig. 7, the inverter space vector pwm apparatus includes:
and a coordinate obtaining module 71, configured to obtain a reference coordinate of the reference voltage vector of the inverter on a rectangular coordinate system.
And a component vector determining module 72, configured to determine three component vectors of the reference voltage vector according to the reference coordinate.
And the action time determining module 73 is used for determining three action times of the reference voltage vector according to the three sub-vectors of the reference voltage vector and the reference voltage vector.
The action time determining module 73 is specifically configured to input the three partial vectors of the reference voltage vector and the reference voltage vector into the volt-second balance calculation model, and output the three action times of the reference voltage vector through the volt-second balance calculation model.
Wherein, the volt-second balance calculation model is V1*T1+V2*T2+V3*T3＝Vref*Ts，
T1+T2+T3＝Ts，
Wherein, T1、T2And T3Three action times, V, of the reference voltage vector, respectively1、V2And V3Three components, T, of a reference voltage vector, respectivelysIs a sampling period, VrefIs a vector of reference voltages.
And the distribution module 74 is configured to distribute the three action times to the three component vectors according to a preset distribution rule.
And a control module 75 for controlling the main circuit switching device by respectively allocating three action times to the three component vectors.
Optionally, fig. 8 is a schematic structural diagram of a component vector determining module according to an embodiment of the present invention.
Referring to fig. 8, the partition vector determining module includes:
a vector angle determination unit 81 for determining a vector angle of the reference voltage vector based on the reference coordinates;
an algorithm region determining unit 82, configured to determine an algorithm region corresponding to a vector angle of the reference voltage vector;
an algorithm determining unit 83, configured to determine an algorithm unit corresponding to the reference voltage vector from the algorithm area;
and a synthesizing unit 84, configured to synthesize the reference vector corresponding to the arithmetic unit into three component vectors corresponding to the reference voltage vector.
Optionally, fig. 9 is a schematic structural diagram of an algorithm determining unit according to an embodiment of the present invention.
Referring to fig. 9, the algorithm determining unit includes:
the selection subunit 91 is configured to determine a comparison model corresponding to the reference voltage vector according to the vector angle of the reference voltage vector;
a comparison subunit 92, configured to input the reference coordinate into the comparison model corresponding to the reference voltage vector, so that the comparison model corresponding to the reference voltage vector outputs a label of the algorithm unit;
and the result determining subunit 93 is configured to determine, according to the label of the algorithm unit, an algorithm unit corresponding to the reference voltage vector from the algorithm area.
According to the space vector pulse width modulation device for the inverter, the reference coordinate of the reference voltage vector on the rectangular coordinate system is obtained, the component vector and the acting time corresponding to the reference voltage vector are determined according to the reference coordinate, and the main circuit switching device is controlled according to the component vector and the acting time, so that the operation through the vector angle is avoided, the mathematical operation of the processor corresponding to sine and cosine is reduced, and the operation speed of the processor is further improved.
The present invention also provides an electronic device, comprising: a memory and a processor;
a memory for storing executable instructions of the processor;
the processor is configured to execute the inverter space vector pulse width modulation method referred to in fig. 2-5 via execution of executable instructions.
The readable storage medium may be a computer storage medium or a communication medium. Communication media includes any medium that facilitates transfer of a computer program from one place to another. Computer storage media may be any media that can be accessed by a general purpose or special purpose computer. For example, a readable storage medium is coupled to the processor such that the processor can read information from, and write information to, the readable storage medium. Of course, the readable storage medium may also be an integral part of the processor. The processor and the readable storage medium may reside in an Application Specific Integrated Circuits (ASIC). Additionally, the ASIC may reside in user equipment. Of course, the processor and the readable storage medium may also reside as discrete components in a communication device.
The present invention also provides a storage medium having stored thereon a computer program which, when executed by a processor, implements the inverter space vector pulse width modulation method of fig. 2-5.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (12)
1. An inverter space vector pulse width modulation method, comprising:
acquiring a reference coordinate of a reference voltage vector of the inverter on a rectangular coordinate system;
determining three component vectors of the reference voltage vector according to the reference coordinate;
determining three action times of the reference voltage vector according to the three component vectors of the reference voltage vector and the reference voltage vector;
respectively distributing the three action times to the three component vectors according to a preset distribution rule;
and controlling the main circuit switching device by respectively distributing the three action times to the three component vectors.
2. The method of claim 1, wherein determining three components of the reference voltage vector from the reference coordinates comprises:
determining a vector angle of the reference voltage vector according to the reference coordinate;
determining an algorithm area corresponding to the vector angle of the reference voltage vector;
determining an algorithm unit corresponding to the reference voltage vector from the algorithm area;
and synthesizing the reference vector corresponding to the algorithm unit into three component vectors corresponding to the reference voltage vector.
3. The method of claim 2, wherein determining the algorithm unit corresponding to the reference voltage vector from the algorithm area comprises:
determining a comparison model corresponding to the reference voltage vector according to the vector angle of the reference voltage vector;
inputting the reference coordinates into a comparison model corresponding to the reference voltage vector, so that the comparison model corresponding to the reference voltage vector outputs a label of an algorithm unit;
and determining the algorithm unit corresponding to the reference voltage vector from the algorithm area according to the label of the algorithm unit.
4. The method of claim 1, wherein said determining three times of action of said reference voltage vector based on three components of said reference voltage vector and said reference voltage vector comprises:
inputting the three component vectors of the reference voltage vector and the reference voltage vector into a volt-second balance calculation model, and outputting three action times of the reference voltage vector through the volt-second balance calculation model.
5. The method of claim 4, wherein the volt-second equilibrium calculation model is
V1*T1+V2*T2+V3*T3＝Vref*Ts，
T1+T2+T3＝Ts，
Wherein, T1、T2And T3Three action times, V, of the reference voltage vector, respectively1、V2And V3Three components, T, of a reference voltage vector, respectivelysIs a sampling period, VrefIs a vector of reference voltages.
6. An inverter space vector pulse width modulation device, comprising:
the coordinate acquisition module is used for acquiring a reference coordinate of a reference voltage vector of the inverter on a rectangular coordinate system;
the component vector determining module is used for determining three component vectors of the reference voltage vector according to the reference coordinate;
the action time determining module is used for determining three action times of the reference voltage vector according to the three component vectors of the reference voltage vector and the reference voltage vector;
the distribution module is used for distributing the three action times to the three sub-vectors according to a preset distribution rule;
and the control module is used for controlling the main circuit switching device through the three action times respectively distributed to the three component vectors.
7. The apparatus of claim 6, wherein the component vector determining module comprises:
the vector angle determining unit is used for determining the vector angle of the reference voltage vector according to the reference coordinate;
the algorithm area determining unit is used for determining an algorithm area corresponding to the vector angle of the reference voltage vector;
the algorithm determining unit is used for determining an algorithm unit corresponding to the reference voltage vector from the algorithm area;
and the synthesis unit is used for synthesizing the reference vector corresponding to the algorithm unit into three component vectors corresponding to the reference voltage vector.
8. The apparatus of claim 7, wherein the algorithm determination unit comprises:
the selection subunit is used for determining a comparison model corresponding to the reference voltage vector according to the vector angle of the reference voltage vector;
the comparison subunit is used for inputting the reference coordinates into the comparison model corresponding to the reference voltage vector, so that the comparison model corresponding to the reference voltage vector outputs a label of the algorithm unit;
and the result determining subunit is used for determining the algorithm unit corresponding to the reference voltage vector from the algorithm area according to the label of the algorithm unit.
9. The apparatus according to claim 6, wherein the action time determining module is specifically configured to input the three components of the reference voltage vector and the reference voltage vector into a volt-second balance calculation model, and output the three action times of the reference voltage vector via the volt-second balance calculation model.
10. The apparatus of claim 9, wherein the volt-second equilibrium computational model is V1*T1+V2*T2+V3*T3＝Vref*Ts，
T1+T2+T3＝Ts，
Wherein, T1、T2And T3Three action times, V, of the reference voltage vector, respectively1、V2And V3Three components, T, of a reference voltage vector, respectivelysIs a sampling period, VrefIs a vector of reference voltages.
11. An electronic device, comprising: a memory and a processor;
the memory for storing executable instructions of the processor;
the processor is configured to perform the method of any of claims 1-5 via execution of the executable instructions.
12. A storage medium having a computer program stored thereon, comprising: the program, when executed by a processor, implements the method of any of claims 1-5.
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