CN111326839A - On-chip reconfigurable transmission line and communication system - Google Patents
On-chip reconfigurable transmission line and communication system Download PDFInfo
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- CN111326839A CN111326839A CN202010144038.1A CN202010144038A CN111326839A CN 111326839 A CN111326839 A CN 111326839A CN 202010144038 A CN202010144038 A CN 202010144038A CN 111326839 A CN111326839 A CN 111326839A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/003—Coplanar lines
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
- H01L23/5223—Capacitor integral with wiring layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
- H01L23/5225—Shielding layers formed together with wiring layers
Abstract
The embodiment of the application discloses an on-chip reconfigurable transmission line and a communication system, wherein the on-chip reconfigurable transmission line unit comprises a top metal layer, a middle metal layer and a grounding shielding layer, the middle metal layer comprises a first middle metal sheet and a second middle metal sheet, and a shielding cavity is formed between the top metal layer and the grounding shielding layer; the top metal layer comprises a signal wire, a first ground plane and a second ground plane, the two sides of the signal wire are respectively connected with the ground shielding layer through a first switch capacitor and a second switch capacitor, the first ground plane is connected with the ground shielding layer through a first middle metal sheet and a via hole, and the second ground plane is connected with the ground shielding layer through a second middle metal sheet and a via hole. By adopting the technical scheme provided by the embodiment of the application, the integration level of the reconfigurable transmission line can be improved, and miniaturization is realized; and the resolution of the reconfigurable transmission line is improved.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to an on-chip reconfigurable transmission line and a communication system.
Background
With the development of wireless communication systems with multiple functions and supporting multiple standards, reconfigurable circuits are increasingly used in the systems. The on-chip reconfigurable transmission line with high resolution and miniaturization can realize functions of high-precision phase shift, impedance transformation, resonant frequency transformation and the like without sacrificing the whole area of a system chip, and has wide application prospect.
Fig. 1 is a schematic structural diagram of an on-chip reconfigurable transmission line in the prior art, and as shown in fig. 1, the scheme employs a reconfigurable ground capacitor and a signal return path, and can implement a phase shift function without changing characteristic impedance. In the low phase shift mode, the switch C-bit is switched off, the switch L-bit is switched on, and the transmission line is in the conditions of low line inductance and low line capacitance. In the high phase shift mode, the switch C-bit is turned on, the switch L-bit is turned off, the line inductance and the line capacitance of the transmission line are simultaneously changed, and high signal delay is realized to improve phase shift. However, the insertion loss of this solution varies greatly under different switching conditions, and in practical applications, a variable gain amplifier is also needed to compensate for the loss variation under different conditions. Meanwhile, the technical scheme also has the problems of large size, incapability of further improving the resolution and large insertion loss.
Fig. 2 is a schematic structural diagram of another on-chip reconfigurable transmission line in the prior art, and as shown in fig. 2, the scheme adopts a coplanar waveguide CPW in combination with a numerically controlled ground plane, a capacitor, and a resistor to realize a phase shift function without changing insertion loss. In the high phase shift mode, the switch C controls the capacitor to be grounded, and meanwhile the near-end ground plane controls the switch L to be switched off; in the low phase shift mode, the switch L controls the ground plane at the near end of the signal line to be grounded, and simultaneously controls the switch S to be turned on to serve as a ground resistor to realize the path loss consistent with the high phase shift mode. However, this solution also cannot realize a high-resolution reconfigurable transmission line, and has a large insertion loss and a large circuit size.
Disclosure of Invention
The embodiment of the application provides an on-chip reconfigurable transmission line and a communication system, which are beneficial to solving the problems in the prior art.
In a first aspect, an embodiment of the present application provides an on-chip reconfigurable transmission line, including an on-chip reconfigurable transmission line unit, where the on-chip reconfigurable transmission line unit includes a top metal layer, a middle metal layer, and a ground shielding layer, where the middle metal layer includes a first middle metal sheet and a second middle metal sheet, and a gap exists between the first middle metal sheet and the second middle metal sheet, so that a shielding cavity is formed between the top metal layer and the ground shielding layer;
the top metal level includes signal line, first ground plane and second ground plane, first ground plane with the second ground plane is located the both sides of signal line, the signal line both sides respectively through first switched capacitor and second switched capacitor with ground connection shielding layer links to each other, first ground plane through first middle sheetmetal and via hole with ground connection shielding layer links to each other, the second ground plane through second middle sheetmetal and via hole with ground connection shielding layer links to each other.
Preferably, additional branches are arranged on two sides of the signal line, and the additional branches are used for connecting the first switch capacitor and the second switch capacitor.
Preferably, the ground shield layer is formed of a plurality of metal lines arranged along an extending direction of the signal line.
Preferably, the line width and/or line spacing of the metal lines is 50 nm. Preferably, the first switch capacitor comprises a first switch and a first capacitor, and the first switch is used for controlling the opening or the disconnection of the first capacitor;
the second switch capacitor comprises a second switch and a second capacitor, and the second switch is used for controlling the opening or the disconnection of the second capacitor.
Preferably, the first capacitor and/or the second capacitor is a capacitor with low electromagnetic leakage.
Preferably, the number of the on-chip reconfigurable transmission line units is n, wherein the signal lines, the first ground planes and the second ground planes of the kth and (k + 1) th on-chip reconfigurable transmission line units are respectively connected along the signal transmission direction, and k is greater than or equal to 1 and is less than n.
In a second aspect, an embodiment of the present application provides a communication system, where the communication system includes the on-chip reconfigurable transmission line according to any one of the first aspect.
The technical scheme provided by the application has the following advantages:
1. the integration level of the reconfigurable transmission line is improved, and miniaturization is realized;
2. the resolution of the reconfigurable transmission line is improved.
3. And a shielding cavity is formed between the top metal layer and the grounding shielding layer, so that the loss caused by signal leakage is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an on-chip reconfigurable transmission line in the prior art;
FIG. 2 is a schematic diagram of another prior art on-chip reconfigurable transmission line structure;
fig. 3 is a schematic structural diagram of an on-chip reconfigurable transmission line unit according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an on-chip reconfigurable transmission line provided in an embodiment of the present application;
FIG. 5 is a schematic diagram of a photomicrograph of an on-chip reconfigurable transmission line provided by an embodiment of the present application
Fig. 6 is a schematic diagram illustrating a test result of an on-chip reconfigurable transmission line according to an embodiment of the present application;
the symbols in the figures are represented as: 100-on-chip reconfigurable transmission line element, 110-top metal layer, 111-signal line, 112-first ground plane, 113-second ground plane, 114-additional branch, 120-intermediate metal layer, 121-first intermediate metal sheet, 122-second intermediate metal sheet, 130-ground shield layer, 131-metal line, 140-via hole, C1A first capacitor, C2-a second capacitor, 200-an on-chip reconfigurable transmission line.
Detailed Description
In order to make those skilled in the art better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application provides a novel on-chip reconfigurable transmission line aiming at the problems of low resolution and large circuit size of the on-chip reconfigurable transmission line in the prior art.
Fig. 3 is a schematic structural diagram of an on-chip reconfigurable transmission line unit provided in an embodiment of the present application, and as shown in fig. 3, the on-chip reconfigurable transmission line unit provided in the embodiment of the present application includes a top metal layer 110, an intermediate metal layer 120, and a ground shielding layer 130, where the intermediate metal layer 120 includes a first intermediate metal sheet 121 and a second intermediate metal sheet 122, and a gap exists between the first intermediate metal sheet 121 and the second intermediate metal sheet 122, so that a shielding cavity is formed between the top metal layer 110 and the ground shielding layer 130, and the shielding cavity can reduce loss caused by signal leakage.
For convenience of illustration, in the embodiment shown in fig. 3, a rectangular coordinate system is established, and the plane of the coordinate system is parallel to the plane of the ground shield 130, wherein the X axis is perpendicular to the signal transmission direction, and the Y axis is parallel to the signal transmission direction.
Specifically, the top metal layer 110 includes a signal line 111, a first ground plane 112 and a second ground plane 113, the first ground plane 112 and the second ground plane 113 are located on two sides (along the X-axis direction) of the signal line 111, the first ground plane 112 is connected to the ground shield layer 130 through a first middle metal sheet 121 and a via 140, in other words, the first ground plane 112, the first middle metal sheet 121 and the ground shield layer 130 are connected through the via 140, and as can be seen from fig. 3, the position of the first middle metal sheet 121 matches with the first ground plane 112. Similarly, the second ground plane 113 is connected to the ground shield 130 through a second middle metal plate 122 and a via 140, in other words, the second ground plane 113, the second middle metal plate 122 and the ground shield 130 are connected through the via 140, and as can be seen from fig. 3, the position of the second middle metal plate 122 matches with the second ground plane 113.
In addition, two sides of the signal line 111 are connected to the ground shielding layer 130 through a first switched capacitor and a second switched capacitor, respectively. The reconfigurable function is realized by controlling the on and off of the switch capacitor. The structure can improve the integration level of the reconfigurable transmission line and realize miniaturization.
Because the distance between two adjacent switch capacitors is small, large capacitive coupling interference is easy to generate. Therefore, in order to improve the resolution of the reconfigurable transmission line, an additional branch 114 is grown on the signal line 111 in the X direction to connect the switched capacitors, thereby increasing the distance between the switched capacitors on the left and right sides and reducing coupling interference. In a preferred embodiment, capacitors with low electromagnetic leakage can be used to further reduce coupling interference between the switching capacitors, achieving near ideal independent control effects.
The ground shielding layer 130 is ideally a complete metal sheet to realize maximum shielding of signal leakage, but because the size of metal in the integrated circuit production process is limited, in order to meet the limit on the metal width in the production process, the ground shielding layer 130 is composed of a plurality of fine metal wires 131 arranged in parallel, and through simulation verification, the line width and the line distance of the metal wires 131 should be the lowest values allowed by the process to realize better effects. The ground shield 130 is connected to the top ground plane via the intermediate metal layer 120 and the inter-metal via 140, the number of the intermediate metal layer 120 is determined by the integrated circuit manufacturing process, and the number of the intermediate metal layer is 5 in the case of the 40nm CMOS process.
In an alternative embodiment, the first switched capacitance comprises a first switch and a first capacitor C1The first switch is used for controlling the first capacitor C1On or off; the second switched capacitor comprises a second switch and a second capacitor C2The second switch is used for controlling the second capacitor C2On or off. Wherein V is shown in FIG. 3CLAnd VCRIdentified for the switched capacitor control signal.
Based on the on-chip reconfigurable transmission line unit 100, an on-chip reconfigurable transmission line 200 is further provided in the embodiment of the present application, and fig. 4 is a schematic structural diagram of the on-chip reconfigurable transmission line provided in the embodiment of the present application, as shown in fig. 4, the on-chip reconfigurable transmission line 200 includes n on-chip reconfigurable transmission line units 100, and the n on-chip reconfigurable transmission line units 100 are sequentially connected end to end. Specifically, the signal line 111, the first ground plane 112, and the second ground plane 113 of the kth and (k + 1) th on-chip reconfigurable transmission line units 100 are respectively connected along the signal transmission direction, where k is greater than or equal to 1 and is less than n. The on-chip reconfigurable transmission line 200 has better expansibility.
Fig. 5 is a schematic diagram of a photomicrograph of an on-chip reconfigurable transmission line provided by an embodiment of the present application, fig. 6 is a schematic diagram of a test result of the on-chip reconfigurable transmission line provided by an embodiment of the present application, the on-chip reconfigurable transmission line in fig. 5 and fig. 6 is designed by using a 40nm CMOS process, and a 6-bit reconfigurable transmission line including 64 switching capacitors is manufactured, and the core circuit size is 520 × 40 μm 2.
Based on the on-chip reconfigurable transmission line, the embodiment of the application also provides a communication system, and the communication system comprises the on-chip reconfigurable transmission line.
It should be noted that, in the embodiment of the present application, an application scenario of the reconfigurable transmission line is not specifically limited, and a person skilled in the art may apply the reconfigurable transmission line to a related technology scenario according to actual needs, for example, the reconfigurable transmission line may be applied to a circuit module such as an impedance matching network of a wireless transceiver system, a digitally controlled oscillator, and a phase shifter to implement reconfigurable impedance matching, high-precision frequency tuning, and high-precision phase shifting functions. Or the reconfigurable transmission line is applied to a phase shifter, a transceiving system and an automatic detection loop to realize a self-adaptive detection calibration mechanism of a chip system, and is applied to an intelligent wireless integrated circuit and a system and the like.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The same and similar parts in the various embodiments in this specification may be referred to each other. Especially, for the terminal embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant points can be referred to the description in the method embodiment.
The above-described embodiments of the present application do not limit the scope of the present application.
Claims (8)
1. An on-chip reconfigurable transmission line is characterized by comprising an on-chip reconfigurable transmission line unit, wherein the on-chip reconfigurable transmission line unit comprises a top metal layer, a middle metal layer and a ground shielding layer, the middle metal layer comprises a first middle metal sheet and a second middle metal sheet, and a gap is formed between the first middle metal sheet and the second middle metal sheet, so that a shielding cavity is formed between the top metal layer and the ground shielding layer;
the top metal level includes signal line, first ground plane and second ground plane, first ground plane with the second ground plane is located the both sides of signal line, the signal line both sides respectively through first switched capacitor and second switched capacitor with ground connection shielding layer links to each other, first ground plane through first middle sheetmetal and via hole with ground connection shielding layer links to each other, the second ground plane through second middle sheetmetal and via hole with ground connection shielding layer links to each other.
2. The on-chip reconfigurable transmission line of claim 1, wherein additional stubs are disposed on two sides of the signal line, and the additional stubs are used for connecting the first switched capacitor and the second switched capacitor.
3. The on-chip reconfigurable transmission line according to claim 1, wherein the ground shield layer is constituted by a plurality of metal lines arranged along an extending direction of the signal line.
4. The on-chip reconfigurable transmission line according to claim 3, characterized in that the line width and/or the line pitch of the metal lines is 50 nm.
5. The on-chip reconfigurable transmission line of claim 1,
the first switch capacitor comprises a first switch and a first capacitor, and the first switch is used for controlling the opening or the disconnection of the first capacitor;
the second switch capacitor comprises a second switch and a second capacitor, and the second switch is used for controlling the opening or the disconnection of the second capacitor.
6. The on-chip reconfigurable transmission line according to claim 5, characterized in that the first capacitor and/or the second capacitor is a capacitor with low electromagnetic leakage.
7. The on-chip reconfigurable transmission line according to any one of claims 1 to 6, wherein the number of the on-chip reconfigurable transmission line units is n, wherein the signal line, the first ground plane and the second ground plane of the kth and (k + 1) th on-chip reconfigurable transmission line units are respectively connected along the signal transmission direction, and k is greater than or equal to 1 and less than n.
8. A communication system comprising an on-chip reconfigurable transmission line according to any one of claims 1 to 7.
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| CN202010144038.1A CN111326839B (en) | 2020-03-04 | 2020-03-04 | On-chip reconfigurable transmission line and communication system |
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| CN202010144038.1A CN111326839B (en) | 2020-03-04 | 2020-03-04 | On-chip reconfigurable transmission line and communication system |
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| CN111326839B CN111326839B (en) | 2022-02-08 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113314820A (en) * | 2021-06-23 | 2021-08-27 | 京信通信技术(广州)有限公司 | Signal transmission line structure, phase shifter and antenna |
| JP7072118B1 (en) | 2021-12-24 | 2022-05-19 | 株式会社フジクラ | Digital phase shift circuit and digital phase shifter |
| JP7076662B1 (en) | 2022-02-18 | 2022-05-27 | 株式会社フジクラ | Digital phase shifter |
| JP7076658B1 (en) | 2022-02-08 | 2022-05-27 | 株式会社フジクラ | Digital phase shifter |
| JP7076663B1 (en) | 2022-03-22 | 2022-05-27 | 株式会社フジクラ | Digital phase shifter |
| JP7111920B1 (en) | 2022-02-18 | 2022-08-02 | 株式会社フジクラ | digital phase shifter |
| JP7111923B1 (en) | 2022-03-22 | 2022-08-02 | 株式会社フジクラ | Digital phase shift circuit and digital phase shifter |
| JP7111880B1 (en) | 2021-12-24 | 2022-08-02 | 株式会社フジクラ | Digital phase shift circuit and digital phase shifter |
| JP7200428B1 (en) | 2022-08-19 | 2023-01-06 | 株式会社フジクラ | digital phase shifter |
| JP7314385B1 (en) * | 2022-12-20 | 2023-07-25 | 株式会社フジクラ | Digital phase shift circuit and digital phase shifter |
| JP7326645B1 (en) * | 2023-06-07 | 2023-08-15 | 株式会社フジクラ | Digital phase shift circuit and digital phase shifter |
| JP7336050B1 (en) * | 2023-06-07 | 2023-08-30 | 株式会社フジクラ | digital phase shifter |
| JP7362964B1 (en) * | 2023-06-07 | 2023-10-17 | 株式会社フジクラ | Digital phase shift circuit and digital phase shifter |
| CN117558707A (en) * | 2023-11-01 | 2024-02-13 | 广芯微电子（广州）股份有限公司 | Three-dimensional metal isolation wiring structure and wiring method for preventing crosstalk |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104051415A (en) * | 2013-03-15 | 2014-09-17 | 台湾积体电路制造股份有限公司 | Variable inductor, voltage controlled oscillator including the variable inductor, and phase locked loop including the variable inductor |
-
2020
- 2020-03-04 CN CN202010144038.1A patent/CN111326839B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104051415A (en) * | 2013-03-15 | 2014-09-17 | 台湾积体电路制造股份有限公司 | Variable inductor, voltage controlled oscillator including the variable inductor, and phase locked loop including the variable inductor |
Non-Patent Citations (1)
| Title |
|---|
| LALEH RABIEIRAD等: ""Reconfgurable CMOS Tuners for Sofware-Defned Radio"", 《IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES》 * |
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