CN111326576A - SA-LIGBT device with longitudinal separation anode - Google Patents
SA-LIGBT device with longitudinal separation anode Download PDFInfo
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- 238000000926 separation method Methods 0.000 title description 6
- 238000002955 isolation Methods 0.000 claims abstract description 57
- 238000007667 floating Methods 0.000 claims abstract description 46
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims description 72
- 239000002184 metal Substances 0.000 claims description 72
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 32
- 239000000758 substrate Substances 0.000 claims description 19
- 235000012239 silicon dioxide Nutrition 0.000 claims description 16
- 239000000377 silicon dioxide Substances 0.000 claims description 16
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 12
- 239000010949 copper Substances 0.000 claims description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 230000000694 effects Effects 0.000 abstract description 33
- 230000002829 reductive effect Effects 0.000 abstract description 13
- 238000009826 distribution Methods 0.000 abstract description 7
- 238000000034 method Methods 0.000 description 17
- 238000010586 diagram Methods 0.000 description 16
- 230000008569 process Effects 0.000 description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 13
- 229910052710 silicon Inorganic materials 0.000 description 13
- 239000010703 silicon Substances 0.000 description 13
- 238000005468 ion implantation Methods 0.000 description 7
- 230000004888 barrier function Effects 0.000 description 6
- 230000002401 inhibitory effect Effects 0.000 description 6
- 239000000969 carrier Substances 0.000 description 5
- 238000000605 extraction Methods 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- 230000002441 reversible effect Effects 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000002035 prolonged effect Effects 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000000670 limiting effect Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- INQLNSVYIFCUML-QZTLEVGFSA-N [[(2r,3s,4r,5r)-5-(6-aminopurin-9-yl)-3,4-dihydroxyoxolan-2-yl]methoxy-hydroxyphosphoryl] [(2r,3s,4r,5r)-5-(4-carbamoyl-1,3-thiazol-2-yl)-3,4-dihydroxyoxolan-2-yl]methyl hydrogen phosphate Chemical compound NC(=O)C1=CSC([C@H]2[C@@H]([C@H](O)[C@@H](COP(O)(=O)OP(O)(=O)OC[C@@H]3[C@H]([C@@H](O)[C@@H](O3)N3C4=NC=NC(N)=C4N=C3)O)O2)O)=N1 INQLNSVYIFCUML-QZTLEVGFSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
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Abstract
The invention relates to a SALIGBT device with a longitudinal separated anode structure, belonging to the field of semiconductor power devices. According to the invention, an N + anode and a P + anode of the traditional SA-LIGBT are separated, the N + anode is arranged in the device, and the longitudinal depth of the N + anode is increased to prolong the flow path of electrons in a unipolar conductive mode; the P-type floating layer below the N + anode can increase the anode distribution resistance of the device, and the snapback effect is completely eliminated by adjusting the longitudinal depth of the N + anode and the doping concentration of the P-type floating layer. The invention utilizes the longitudinal length of the device to reduce the area of the chip; when the anode short-circuit type LIGBT is conducted in the forward direction, the forward conduction voltage drop of the novel structure LIGBT is 0.91V, and compared with a separated anode short-circuit type LIGBT and a conventional anode short-circuit type LIGBT, the forward conduction voltage drop of the novel structure LIGBT is respectively reduced by 6.2% and 24%; when the cathode is turned off, the N + anode can rapidly extract electrons in the drift region, the turn-off time of the cathode is 370ns, and compared with the traditional LIGBT and the dielectric isolation type LIGBT, the turn-off time is reduced by 82% and 23%.
Description
Technical Field
The invention belongs to the field of power semiconductor devices, and relates to an SA-LIGBT device with a longitudinal separation anode.
Background
A Lateral Insulated Gate Bipolar Transistor (LIGBT) is a common Bipolar power semiconductor device, and has the advantages of high input impedance, reduced on-state voltage, and simple driving circuit. Is widely applied to the fields of communication technology, new energy equipment and various consumer electronics. The conventional LIGBT device is improved from LDMOS (Lateral Double-diffused Metal-Oxide Semiconductor), and the inventor replaces N + of the LDMOS drain with P +, so that a unipolar device is changed into a bipolar device. Due to the introduction of P +, the LIGBT can inject holes into the drift region when the LIGBT is conducted, so that the high-resistance drift region generates a conductivity modulation effect, and higher current density is obtained. However, the large number of carriers stored in the drift region can cause the device to produce a tail current phenomenon. In particular, electrons in the drift region lack an extraction channel and can only be eliminated by virtue of the recombination action of carriers, thereby causing large turn-off loss.
An anode short-circuit structure N + anode is introduced into an anode end of an SA-LIGBT (short-anode laterally Insulated Gate Bipolar Transistor) on the basis of the traditional LIGBT. When the transistor is turned off, electrons in the drift region can be rapidly extracted through the N + anode, so that the turn-off loss of the transistor is effectively reduced, and the turn-off time of the transistor is shortened. However, the introduction of the N + anode also causes the transistor to switch from the unipolar conduction mode to the bipolar conduction mode when the transistor is turned on, so that the transistor generates a voltage rebound phenomenon, i.e., snapback effect. The Snapback effect can cause uneven current distribution of the transistor and seriously affect the reliability of the work of the device.
In order to better promote the application of the SA-LIGBT, the SA-LIGBT needs to be further improved so as to avoid snapback effect and improve the reliability of the device.
Disclosure of Invention
In view of the above, the present invention is directed to an SA-LIGBT device with a longitudinally split anode structure.
In order to achieve the purpose, the invention provides the following technical scheme:
an SA-LIGBT device with a longitudinally separated anode comprises an SOI structure and a top semiconductor region arranged on the SOI structure, wherein the SOI structure comprises a P-type substrate (9), an insulating medium layer (8) and an N-type drift region (7) from bottom to top, and the top semiconductor region comprises a cathode metal (1), a P-type heavily doped cathode region (5), an N-type heavily doped cathode region (2), a gate oxide layer (3), a gate (4), a P-body (6) and an anode region gate oxide layer (3) which are positioned below the gate (4); the N-type heavily doped cathode region (2) is positioned on the right side of the P-type heavily doped cathode region (5), the cathode metal (1) is positioned on the upper sides of the P-type heavily doped cathode region (5) and the N-type heavily doped cathode region (2), the gate oxide layer (3) is positioned on the right side of the cathode metal (1), the gate (4) is arranged on the upper side of the gate oxide layer (3), and the P-type heavily doped cathode region (5) and the N-type heavily doped cathode region (2) are both surrounded by a P-body (6); the anode region and the P-body (6) are isolated by an N-type drift region (7).
Further, the anode region comprises an N-type buffer layer (10), a P-type heavily doped anode region (11), anode metal (12), an anode dielectric isolation layer (13) and an N-type heavily doped anode region (14).
Furthermore, the P-type heavily doped anode region (11) is positioned on the right side of the N-type buffer layer (10) and is wrapped by the N-type buffer layer (10); the anode metal (12) is positioned on the surface and inside of the device, contacts with the P-type heavily doped anode region (11) and the upper part of the anode dielectric isolation layer (13) on the surface, and contacts with the right side of the anode dielectric isolation layer (13) and the upper part of the N-type heavily doped anode region (14) inside; the anode dielectric isolation layer (13) is positioned on the right side of the N-type buffer layer (10), and the N-type buffer layer (10) and the anode metal (13) are isolated in the device.
Further, the N-type heavily doped anode region (14) is in contact with the lower part of the anode metal (12), and the transverse width of the N-type heavily doped anode region is consistent with that of the anode metal (12) in the device.
Further, the solar cell further comprises a P-type floating layer (15), wherein the P-type floating layer (15) is arranged at the lower end of the N-type heavily doped anode region (14).
The anode structure further comprises a P-type floating layer (15), wherein the P-type floating layer (15) is arranged at the lower end of the anode medium isolation layer (13) and is in contact with the N-type heavily doped anode region (14).
Furthermore, the insulating medium layer (8) and the anode medium isolating layer (13) are made of silicon dioxide, the cathode metal (1) and the anode metal (12) are made of copper or aluminum, and the grid (4) is made of copper, aluminum or polysilicon.
The invention has the beneficial effects that: the device is realized by separating an N + anode and a P + anode of the SA-LIGBT device, arranging the N + anode in the device and introducing a P-type floating layer below the N + anode. The flow path of electrons in the unipolar conduction mode can be extended without an additional chip length by deepening the N + anode. Thereby achieving the effects of increasing the anode short-circuit resistance and inhibiting the snapback phenomenon. In addition, the P-type floating layer below the N + anode can form an electron barrier to block electrons from flowing to the N + anode, and also has the function of inhibiting the snapback effect. The invention has the following specific advantages:
the longitudinal length of the device is effectively utilized, the flow path of electrons in conduction is prolonged on the premise of not additionally increasing the length of a chip, the snapback effect in forward conduction is favorably inhibited, and the conduction voltage drop is reduced; the electron barrier formed when the P-type floating layer is conducted can block electrons from flowing to the N + anode, anode short-circuit resistance is increased, the snapback effect is also inhibited, and the snapback effect can be completely eliminated by controlling the depth of the N + anode and the doping concentration of the P-type floating layer. When the device is turned off, the N + anode can rapidly extract the excessive carriers in the drift region, so that the turn-off loss of the device is effectively reduced, and the compromise relationship between the turn-on voltage drop and the turn-off loss is improved.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the means of the instrumentalities and combinations particularly pointed out hereinafter.
Drawings
For the purposes of promoting a better understanding of the objects, aspects and advantages of the invention, reference will now be made to the following detailed description taken in conjunction with the accompanying drawings in which:
FIG. 1 is a schematic diagram of a conventional LIGBT structure in the prior art;
FIG. 2 is a schematic diagram of a conventional anode short LIGBT structure in the prior art;
FIG. 3 is a schematic diagram of a LIGBT structure with a short-circuited separated anode in the prior art;
FIG. 4 is a schematic structural diagram of a dielectric isolated LIGBT in the prior art;
fig. 5 is a schematic structural diagram of an embodiment 1 of the LIGBT device provided by the present invention;
fig. 6 is a schematic structural diagram of an LIGBT device according to an embodiment 2 of the present invention;
FIG. 7 is a schematic structural diagram of an embodiment 3 of the LIGBT device provided by the present invention;
FIG. 8 is a schematic structural diagram of an embodiment 4 of the LIGBT device provided by the present invention;
fig. 9 is a graph showing the influence of the longitudinal length L of the anode dielectric isolation layer 13 on the forward conduction characteristic of the device in embodiment 2;
FIG. 10 is a graph comparing forward conduction curves of an anode short type LIGBT (the structure is shown in FIG. 2), a split anode short type LIGBT (the structure is shown in FIG. 3), a new structure LIGBT in example 1 and a new structure LIGBT in example 2;
fig. 11 is a schematic diagram of a forward conduction curve of the LIGBT with the new structure in embodiment 1 under different lengths of the P-type floating layers;
fig. 12(a) is a current distribution diagram of the LIGBT in the embodiment 1 in the unipolar conduction mode, and fig. 12(b) is a current distribution diagram of the LIGBT in the embodiment 1 in the bipolar conduction mode;
fig. 13 is a graph of the variation trend of the conduction voltage drop of the new-structure LIGBT, the dielectric-isolated LIGBT, the separated anode short-circuited LIGBT and the conventional anode short-circuited LIGBT with the P + anode doping concentration in embodiment 1;
FIG. 14 is a comparison graph of reverse conduction characteristics of the dielectric isolated LIGBT and the split anode shorted LIGBT in example 1 and example 2;
FIG. 15 is a graph comparing the turn-off times of a conventional LIGBT, a dielectric isolated LIGBT (the structure of which is shown in FIG. 4), a LIGBT of a new structure in embodiment 1 and a LIGBT in embodiment 2;
fig. 16 is a process flow diagram of the LIGBT of new structure in embodiment 1.
Reference numerals: the solar cell comprises 1-cathode metal, 2-N type heavily doped cathode regions, 3-gate oxide layers, 4-gates, 5-P type heavily doped cathode regions, 6-P-bodies, 7-N type drift regions, 8-insulating medium layers, 9-P type substrates, 10-N type buffer layers, 11-P type heavily doped anode regions, 12-anode metal, 13-anode medium isolation layers, 14-N type heavily doped anode regions and 15-P type floating layers.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention in a schematic way, and the features in the following embodiments and examples may be combined with each other without conflict.
Wherein the showings are for the purpose of illustrating the invention only and not for the purpose of limiting the same, and in which there is shown by way of illustration only and not in the drawings in which there is no intention to limit the invention thereto; to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The same or similar reference numerals in the drawings of the embodiments of the present invention correspond to the same or similar components; in the description of the present invention, it should be understood that if there is an orientation or positional relationship indicated by terms such as "upper", "lower", "left", "right", "front", "rear", etc., based on the orientation or positional relationship shown in the drawings, it is only for convenience of description and simplification of description, but it is not an indication or suggestion that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes, and are not to be construed as limiting the present invention, and the specific meaning of the terms may be understood by those skilled in the art according to specific situations.
Example 1:
as shown in fig. 5, an SA-LIGBT device with a longitudinally split anode structure, comprising: the cathode structure comprises cathode metal 1, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-type heavily doped cathode region 5, a P-body6, an N-type drift region 7, an insulating medium layer 8, a P-type substrate 9, an N-type buffer layer 10, a P-type heavily doped anode region 11, anode metal 12, an anode medium isolation layer 13, an N-type heavily doped anode region 14 and a P-type floating layer 15.
The P-type substrate 9, the insulating medium layer 8 and the N-type drift region 7 form an SOI structure. The P-type substrate is P-type doped silicon, and the thickness and the doping concentration of the P-type substrate have a very wide selection range; the insulating medium layer 8 is made of silicon dioxide with the thickness of 0.5-5 mu m.
The N-type drift region 7 covers the insulating medium layer 8, the N-type drift region 7 is made of silicon with the thickness of 25 microns, in order to meet the requirement of high withstand voltage, the doping concentration of the N-type drift region is selected to be 14 th power order, and the length of the N-type drift region is 17 microns.
The top semiconductor region is positioned above the SOI structure and comprises a cathode metal 1, a P-type heavily doped cathode region 5, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-body6 and an anode region from left to right; the thickness of the P-type heavily doped cathode region 5 and the thickness of the N-type heavily doped cathode region 2 are both 0.6 mu m, and the doping concentration is 19 orders of magnitude. The P-body6 is P-doped silicon with a thickness equal to 5 μm and a doping concentration of the order of magnitude of 16. The gate oxide layer is a layer of silicon dioxide below the gate, and the thickness of the gate oxide layer is 25 nm.
The anode region comprises an N-type buffer layer 10, a P-type heavily doped anode region 11, anode metal 12, an anode dielectric isolation layer 13, an N-type heavily doped anode region 14 and a P-type floating layer 15, wherein the P-type heavily doped anode region 11 is wrapped by the N-type buffer layer 10, the thickness of the N-type buffer layer is 3 mu m, and the doping concentration is 1 × 1016cm-3. The thickness of the P-type heavily doped anode region 11 is 0.6 μm, and the doping concentration is 19 orders of magnitude.
The anode metal 12 is positioned on the surface and inside of the device, the anode metal 12 is in contact with the P-type heavily doped anode region 11 and above the anode dielectric isolation layer 13 on the surface of the device, and is in contact with the right side of the anode dielectric isolation layer 13 and above the N-type heavily doped anode region 14 inside the device. The anode dielectric isolation layer 13 is located on the right side of the N-type buffer layer 10, and isolates the N-type buffer layer 10 from the anode metal 12 inside the device. The transverse width of the anode dielectric isolation layer 13 is 0.5 μm, and the longitudinal length in the device is 10 μm;
the N-type heavily doped anode region 14 is in contact with the lowest part of the anode metal 12, the transverse width of the N-type heavily doped anode region is consistent with that of the anode metal 12 in the device, the transverse width of the N-type heavily doped anode region is 1 mu m, and the doping concentration is 19 orders of magnitude. The longitudinal length of the anode metal 12 inside the device is consistent with that of the anode dielectric isolation layer 13 and is also 10 μm.
The P-type floating layer 15 is located below the N-type heavily doped anode region 14 and is in contact with the lower portion of the N-type heavily doped anode region 14, the doping concentration is 17-18 orders of magnitude, and the longitudinal length is 1 mu m.
The insulating medium layer 8 and the anode medium isolating layer 13 are made of silicon dioxide, the cathode metal 1 and the anode metal 12 are made of copper or aluminum, and the grid 4 is made of copper, aluminum or polysilicon.
The embodiment provides an SA-LIGBT device with a longitudinal separated anode structure. When conducting, under low anode voltage, the device will work in unipolar conduction mode first, and only electrons participate in conduction at this time. When electrons flow to the anode region, the electrons are blocked by the anode dielectric isolation layer and flow downwards along the left side of the anode dielectric isolation layer until the electrons are absorbed by the N-type heavily doped anode region. Compared with the traditional SA-LIGBT, the path for flowing the electrons becomes longer, so that the anode distribution resistance of the device is increased, and the effect of inhibiting the snapback effect is achieved. Meanwhile, the P-type floating layer positioned below the N-type heavily doped anode region can form an electron barrier to block electrons from flowing to the N-type heavily doped anode region in a unipolar conductive mode, so that the distributed resistance of the anode is increased, and the effect of inhibiting a snapback effect is also facilitated. The snapback effect can be completely eliminated by adjusting the depth of the N-type heavily doped anode region and the longitudinal length and concentration of the P-type floating layer. In the turn-off mode, the N-type heavily doped anode region can rapidly extract the excessive carriers in the drift region, so that the trailing current phenomenon caused by the traditional LIGBT is effectively relieved, and a good compromise relationship between the turn-on voltage drop and the turn-off loss is brought.
Example 2:
as shown in fig. 6, the present example provides an SA-LIGBT device with a longitudinally separated anode structure, and in this embodiment, on the basis of embodiment 1, the P-type floating layer 15 under the N-type heavily doped anode region 14 is removed. The specific embodiment is as follows:
an SA-LIGBT device having a longitudinally split anode structure, comprising: the cathode structure comprises cathode metal 1, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-type heavily doped cathode region 5, a P-body6, an N-type drift region 7, an insulating medium layer 8, a P-type substrate 9, an N-type buffer layer 10, a P-type heavily doped anode region 11, anode metal 12, an anode medium isolation layer 13 and an N-type heavily doped anode region 14.
The P-type substrate 9, the insulating medium layer 8 and the N-type drift region 7 form an SOI structure. The P-type substrate is P-type doped silicon, and the thickness and the doping concentration of the P-type substrate have a very wide selection range; the insulating medium layer 8 is made of silicon dioxide with the thickness of 0.5-5 mu m.
The N-type drift region 7 covers the insulating medium layer 8, the N-type drift region 7 is made of silicon with the thickness of 25 microns, in order to meet the requirement of high withstand voltage, the doping concentration of the N-type drift region is selected to be 14 th power order, and the length of the N-type drift region is 17 microns.
The top semiconductor region is positioned above the SOI structure and comprises a cathode metal 1, a P-type heavily doped cathode region 5, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-body6 and an anode region from left to right; the thickness of the P-type heavily doped cathode region 5 and the thickness of the N-type heavily doped cathode region 2 are both 0.6 mu m, and the doping concentration is 19 orders of magnitude. The P-body6 is P-doped silicon with a thickness equal to 5 μm and a doping concentration of the order of magnitude of 16. The gate oxide layer is a layer of silicon dioxide below the gate, and the thickness of the gate oxide layer is 25 nm.
The anode region comprises an N-type buffer layer 10, a P-type heavily doped anode region 11, anode metal 12, an anode dielectric isolation layer 13 and an N-type heavily doped anode region 14, wherein the P-type heavily doped anode region 11 is wrapped by the N-type buffer layer 10, the thickness of the N-type buffer layer is 3 mu m, and the doping concentration is 1 × 1016cm-3. The thickness of the P-type heavily doped anode region 11 is 0.6 μm, and the doping concentration is 19 orders of magnitude.
The anode metal 12 is positioned on the surface and inside of the device, the anode metal 12 is in contact with the P-type heavily doped anode region 11 and above the anode dielectric isolation layer 13 on the surface of the device, and is in contact with the right side of the anode dielectric isolation layer 13 and above the N-type heavily doped anode region 14 inside the device. The anode dielectric isolation layer 13 is located on the right side of the N-type buffer layer 10, and isolates the N-type buffer layer 10 from the anode metal 13 inside the device. The anode dielectric spacer layer 13 has a lateral width of 0.5 μm and a longitudinal length of 10 μm inside the device.
The N-type heavily doped anode region 14 is in contact with the lowest part of the anode metal 12, the transverse width of the N-type heavily doped anode region is consistent with that of the anode metal 12 in the device, the transverse width of the N-type heavily doped anode region is 1 mu m, and the doping concentration is 19 orders of magnitude. The longitudinal length of the anode metal 12 inside the device is consistent with that of the anode dielectric isolation layer 13 and is also 10 μm.
The insulating medium layer 8 and the anode medium isolating layer 13 are made of silicon dioxide, the cathode metal 1 and the anode metal 12 are made of copper or aluminum, and the grid 4 is made of copper, aluminum or polysilicon.
The embodiment has the advantages that the ion implantation process for forming the P-type floating layer 15 is reduced, and the process difficulty of device manufacturing is reduced. The disadvantage is that the electron barrier formed by the P-type floating layer 15 during conduction is lacked, and the snapback phenomenon is suppressed only by adjusting the depth of the N-type heavily doped anode region 14, which reduces the snapback phenomenon suppression effect. In this case, the heavily doped N-type anode region 14 is required to reach a deeper depth to eliminate the snapback effect.
Example 3:
as shown in fig. 7, the SA-LIGBT device with longitudinally separated anode structure provided in this example introduces a P-type floating layer 15 directly under the anode dielectric isolation layer on the basis of embodiment 2. The specific embodiment is as follows:
the method is characterized by comprising the following steps: the cathode structure comprises cathode metal 1, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-type heavily doped cathode region 5, a P-body6, an N-type drift region 7, an insulating medium layer 8, a P-type substrate 9, an N-type buffer layer 10, a P-type heavily doped anode region 11, anode metal 12, an anode medium isolation layer 13, an N-type heavily doped anode region 14 and a P-type floating layer 15.
The P-type substrate 9, the insulating medium layer 8 and the N-type drift region 7 form an SOI structure. The P-type substrate is P-type doped silicon, and the thickness and the doping concentration of the P-type substrate have a very wide selection range; the insulating medium layer 8 is made of silicon dioxide with the thickness of 0.5-5 mu m.
The N-type drift region 7 covers the insulating medium layer 8, the N-type drift region 7 is made of silicon with the thickness of 25 microns, in order to meet the requirement of high withstand voltage, the doping concentration of the N-type drift region is selected to be 14 th power order, and the length of the N-type drift region is 17 microns.
The top semiconductor region is positioned above the SOI structure and comprises a cathode metal 1, a P-type heavily doped cathode region 5, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-body6 and an anode region from left to right; the thickness of the P-type heavily doped cathode region 5 and the thickness of the N-type heavily doped cathode region 2 are both 0.6 mu m, and the doping concentration is 19 orders of magnitude. The P-body6 is P-doped silicon with a thickness equal to 5 μm and a doping concentration of the order of magnitude of 16. The gate oxide layer is a layer of silicon dioxide below the gate, and the thickness of the gate oxide layer is 25 nm.
The anode region comprises an N-type buffer layer 10 and a P-type heavy dopingThe anode structure comprises a hetero-anode region 11, anode metal 12, an anode dielectric isolation layer 13, an N-type heavily doped anode region 14 and a P-type floating layer 15, wherein the P-type heavily doped anode region 11 is wrapped by an N-type buffer layer 10, the thickness of the N-type buffer layer is 3 mu m, and the doping concentration of the N-type buffer layer is 1 × 1016cm-3. The thickness of the P-type heavily doped anode region 11 is 0.6 μm, and the doping concentration is 19 orders of magnitude.
The anode metal 12 is positioned on the surface and inside of the device, the anode metal 12 is in contact with the P-type heavily doped anode region 11 and above the anode dielectric isolation layer 13 on the surface of the device, and is in contact with the right side of the anode dielectric isolation layer 13 and above the N-type heavily doped anode region 14 inside the device. The anode dielectric isolation layer 13 is located on the right side of the N-type buffer layer 10, and isolates the N-type buffer layer 10 from the anode metal 12 inside the device. The anode dielectric spacer layer 13 has a lateral width of 0.5 μm and a longitudinal length of 11 μm inside the device.
The N-type heavily doped anode region 14 is in contact with the lowest part of the anode metal 12, the transverse width of the N-type heavily doped anode region is consistent with that of the anode metal 12 in the device, the transverse width of the N-type heavily doped anode region is 1 mu m, and the doping concentration is 19 orders of magnitude. The longitudinal length of the anode metal 12 inside the device is slightly shorter than that of the anode dielectric isolation layer 13 and is 10 μm.
The P-type floating layer 15 is positioned below the anode dielectric isolation layer 13, the transverse width of the P-type floating layer is consistent with that of the anode dielectric isolation layer and is 0.5 mu m, and the longitudinal length of the P-type floating layer can be determined according to needs. The P-type floating layer 15 is in contact with the left side of the N-type heavily doped anode region 14, and the doping concentration is 17-18 orders of magnitude.
The insulating medium layer 8 and the anode medium isolating layer 13 are made of silicon dioxide, the cathode metal 1 and the anode metal 12 are made of copper or aluminum, and the grid 4 is made of copper, aluminum or polysilicon.
Compared with the embodiment 1, the P-type floating layer 15 is arranged on the left side of the N-type heavily doped anode region 14, so that the blocking capability to electrons is stronger in a unipolar conduction mode, and the effect of inhibiting the snapback effect is more obvious. But the turn-off capability will be somewhat weaker.
Example 4:
as shown in fig. 8, in the SA-LIGBT device with longitudinally separated anode structure provided in this example, on the basis of embodiment 1, the lateral width of the N-type heavily doped anode region 14 is extended to be consistent with the lateral width of the P-type floating layer 15, and both are 1.5 μm. The specific embodiment is as follows:
an SA-LIGBT device having a longitudinally split anode structure, comprising: the cathode structure comprises cathode metal 1, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-type heavily doped cathode region 5, a P-body6, an N-type drift region 7, an insulating medium layer 8, a P-type substrate 9, an N-type buffer layer 10, a P-type heavily doped anode region 11, anode metal 12, an anode medium isolation layer 13, an N-type heavily doped anode region 14 and a P-type floating layer 15.
The P-type substrate 9, the insulating medium layer 8 and the N-type drift region 7 form an SOI structure. The P-type substrate is P-type doped silicon, and the thickness and the doping concentration of the P-type substrate have a very wide selection range; the insulating medium layer 8 is made of silicon dioxide with the thickness of 0.5-5 mu m.
The N-type drift region 7 covers the insulating medium layer 8, the N-type drift region 7 is made of silicon with the thickness of 25 microns, in order to meet the requirement of high withstand voltage, the doping concentration of the N-type drift region is selected to be 14 th power order, and the length of the N-type drift region is 17 microns.
The top semiconductor region is positioned above the SOI structure and comprises a cathode metal 1, a P-type heavily doped cathode region 5, an N-type heavily doped cathode region 2, a gate oxide layer 3, a gate 4, a P-body6 and an anode region from left to right; the thickness of the P-type heavily doped cathode region 5 and the thickness of the N-type heavily doped cathode region 2 are both 0.6 mu m, and the doping concentration is 19 orders of magnitude. The P-body6 is P-doped silicon with a thickness equal to 5 μm and a doping concentration of the order of magnitude of 16. The gate oxide layer is a layer of silicon dioxide below the gate, and the thickness of the gate oxide layer is 25 nm.
The anode region comprises an N-type buffer layer 10, a P-type heavily doped anode region 11, anode metal 12, an anode dielectric isolation layer 13, an N-type heavily doped anode region 14 and a P-type floating layer 15, wherein the P-type heavily doped anode region 11 is wrapped by the N-type buffer layer 10, the thickness of the N-type buffer layer is 3 mu m, and the doping concentration is 1 × 1016cm-3. The P-type heavily doped anode region 11 is thickThe degree is 0.6 μm and the doping concentration is of the order of 19.
The anode metal 12 is positioned on the surface and inside of the device, the anode metal 12 is in contact with the P-type heavily doped anode region 11 and above the anode dielectric isolation layer 13 on the surface of the device, and is in contact with the right side of the anode dielectric isolation layer 13 and above the N-type heavily doped anode region 14 inside the device. The anode dielectric isolation layer 13 is located on the right side of the N-type buffer layer 10, and isolates the N-type buffer layer 10 from the anode metal 12 inside the device. The transverse width of the anode dielectric isolation layer 13 is 0.5 μm, and the longitudinal length in the device is 10 μm;
the N-type heavily doped anode region 14 is in contact with the lowest part of the anode metal 12, the sum of the transverse width of the N-type heavily doped anode region and the transverse width of the anode metal 12 and the transverse width of the anode dielectric isolation layer 13 is 1.5 mu m, and the doping concentration is 19 orders of magnitude. The longitudinal length of the anode metal 12 inside the device is consistent with that of the anode dielectric isolation layer 13 and is also 10 μm.
The P-type floating layer 15 is located below the N-type heavily doped anode region 14, is in contact with the bottom of the N-type heavily doped anode region 14, and has the longitudinal length of 1 mu m and the doping concentration of 17-18 power orders of magnitude.
The insulating medium layer 8 and the anode medium isolating layer 13 are made of silicon dioxide, the cathode metal 1 and the anode metal 12 are made of copper or aluminum, and the grid 4 is made of copper, aluminum or polysilicon.
Compared with embodiment 1, the effect of suppressing snapback phenomenon is slightly weaker, but the turn-off speed is faster.
The conventional LIGBT shown in fig. 1, the anode short type LIGBT shown in fig. 2, the isolated anode short type LIGBT shown in fig. 3, the dielectric isolated type LIGBT shown in fig. 4, the new structure LIGBT in embodiment 1 shown in fig. 5, and the new structure LIGBT in embodiment 2 were compared by simulation with the aid of TCAD MEDICI simulation software. The depth of a dielectric isolation layer of the dielectric isolation type LIGBT is 4 mu m, and the distance between an N + anode and a P + anode in the separated anode short-circuit type LIGBT is 6 mu m; in addition, other structural parameters of all devices are kept consistent, the service life of a carrier in the simulation process is 10 mu s, and the environmental temperature is 300K.
Fig. 9 shows the effect of the longitudinal length L of the anode dielectric isolation layer 13 on the forward conduction characteristic of the device in embodiment 2. As can be seen from the figure, the snapback phenomenon is most pronounced when L is equal to 10 μm. The snapback phenomenon tends to gradually decrease as the longitudinal length L of the anode dielectric separation layer 13 increases, and substantially disappears when L is 24 μm. This is because as L increases, the path along which the electron current flows becomes longer, resulting in an increase in the anode short-circuit resistance of the device, so that the device can enter the bipolar conduction mode at a lower anode voltage, thereby suppressing the snapback phenomenon.
Fig. 10 is a graph showing a comparison of forward conduction curves of the anode short type LIGBT (the structure of which is shown in fig. 2), the split anode short type LIGBT (the structure of which is shown in fig. 3), the new structure LIGBT in example 1, and the new structure LIGBT in example 2. It can be seen that the snapback phenomenon is most obvious due to the short-circuit effect of the N-type heavily doped anode region of the anode short-circuit type LIGBT. For the separated anode short circuit type LIGBT, although the distance between the N-type buffer layer and the N-type heavily doped anode region is prolonged, the flow path of electrons can be prolonged, and the snapback effect can be inhibited. However, a longer chip length is often required to completely eliminate the snapback effect, so that the chip utilization rate is not high. The new structure SA-LIGBT device in embodiment 1 has completely eliminated snapback phenomenon when the longitudinal lengths of the anode dielectric separation layers are equal, while the new structure SA-LIGBT in embodiment 2 still has slight snapback phenomenon. This is because a PN junction is formed between the P-type floating layer and the N-type drift region of the SA-LIGBT of the new structure in embodiment 1, and an electron barrier is formed by the built-in electric field inside the PN junction, which generates a repulsive effect on the electron current flowing to the N-type heavily doped anode region. Electrons are collected on the P-type floating layer, so that the anode distributed resistance of the region is further increased. Therefore, compared with the embodiment 1 and the embodiment 2, the new structure SA-LIGBT in the embodiment 1 has more obvious effect of inhibiting snapback effect. In addition, the novel structure LIGBT in example 1 is at current density JA＝100A/cm2The conduction voltage drop is lowest (0.91V), compared with the split anode short-circuit type LIGBT (0.97V), the novel structure LIGBT (0.98V) in the embodiment 1 and the conventional anodeThe reduction of the very short LIGBT (1.2V) is 6.2%, 7.1% and 24%, respectively.
Fig. 11 shows a schematic diagram of the forward conduction curves of the LIGBT with the new structure in embodiment 2 under different lengths of the P-type floating layer. As can be seen from the figure, the snapback effect is most obvious when the length of the P-type floating layer is 0 (i.e. the new structure LIGBT in embodiment 2); with the increase of the length of the P-type floating layer, the snapback phenomenon gradually weakens when L isPAt 2 μm, the snapback phenomenon substantially disappears. This shows that the longer the length of the P-type floating layer is, the stronger the blocking capability to the electron current in the unipolar conduction mode is, which is beneficial to suppressing the snapback effect.
Fig. 12(a) and (b) show current distribution diagrams of the new LIGBT in example 1 in the unipolar conduction mode and the bipolar conduction mode, respectively. It can be seen that at the initial stage of conduction, the PN junction of the anode is not turned on, and the device operates in a unipolar conduction mode, where only electrons participate in conduction. Electron current flows from the heavily doped N-type cathode region through the gate channel to the anode region, and electrons will tend to flow out of the device from the N + anode due to the low barrier of the N + anode relative to electrons. Part of the electron current flowing to the anode region is blocked by the high potential barrier of the P + anode and flows to the N + anode below along the dielectric isolation layer, so that the flow path of the electrons is increased. Meanwhile, the repulsion effect of the P-type floating layer below the N + anode on electrons enables the anode distribution resistance of the device to be further increased, and the snapback effect is favorably inhibited. With the increase of the anode voltage, when the PN junction of the anode is conducted, the drift region generates a conductance modulation effect, the device enters a bipolar conduction mode, two carriers of electrons and holes participate in conduction at the moment, and the current increases exponentially along with the voltage.
Fig. 13 shows a variation trend graph of the conduction voltage drop of the new structure LIGBT, the dielectric isolation LIGBT, the separated anode short-circuit LIGBT and the conventional anode short-circuit LIGBT in the embodiment 1 under different doping concentrations of the P + anode. It can be seen that the turn-on voltage drop of all LIGBT devices is gradually reduced with the increase of the doping concentration of the P + anode. This is because increasing the doping concentration of the P + anode can increase the hole injection efficiency of the P + anode in the bipolar conduction mode, which is beneficial to reducing the conduction voltage drop of the device. Meanwhile, the LIGBT of the new structure in embodiment 1 has the lowest turn-on voltage drop at the same P + anode concentration. Meaning that the forward conduction characteristic of the new structure LIGBT is optimal under the same doping concentration of the P + anode.
Fig. 14 shows reverse conduction characteristic diagrams of the new structure LIGBT in example 1, the new structure LIGBT in example 2, the conventional dielectric isolation type LIGBT, and the split anode short-circuited type LIGBT. It can be seen that at the anode the current density JA＝-100A/cm2In the process, the reverse conduction voltage drops of the dielectric isolation layer LIGBT and the separation anode short-circuit type LIGBT are respectively 0.84V and 0.87V. The conduction voltage drop of the LIGBT with the new structure in the embodiment 2 is 0.8V, the reverse conduction characteristic is optimal, and compared with the LIGBT with the medium isolation layer and the LIGBT with the separated anode and the short circuit type, the conduction voltage drop is reduced by 5% and 8% respectively. For the LIGBT with the new structure in the embodiment 1, due to the repulsion effect of the P-type floating layer to the electron current, the reverse conduction voltage drop is slightly higher than that of the LIGBT with the new structure in the embodiment 2, and is 0.82V, which is reduced by 2% and 6% compared with the LIGBT with the dielectric isolation layer and the LIGBT with the separated anode and the short circuit.
Fig. 15 shows a comparison of the turn-off times of the conventional LIGBT, the dielectric isolated LIGBT (the structure of which is shown in fig. 4), the LIGBT of the new structure in example 1 and the LIGBT in example 2. Wherein the off-time ToffRefers to the time it takes for the anode current to drop from 90% to 10%. It can be seen that the conventional LIGBT device has an obvious trailing current phenomenon in the turn-off process due to the lack of an electron extraction channel, and the turn-off time is the longest 2040 ns. The turn-off time of the dielectric isolation type LIGBT is 480ns, and due to the existence of an electron extraction channel N + anode with low potential barrier, the turn-off speed of the dielectric isolation type LIGBT is far faster than that of a traditional LIGBT device. However, the blocking effect of the dielectric isolation layer on the electrons prolongs the extraction path of the electrons, so the turn-off time is slightly longer than that of the LIGBT in the new structure in the embodiment 1 and the embodiment 2. The turn-off time of the LIGBT with the new structure in the embodiment 1 and the embodiment 2 is 370ns and 300ns, respectively. Taking the LIGBT with the new structure in embodiment 1 as an example, the turn-off time is reduced by 82% and 23% respectively compared with the conventional LIGBT and the medium isolated LIGBT. LIGBT in embodiment 1 and embodiment2, a P-type floating layer is added below the anode, which has a certain blocking effect on the extraction of electrons when the device is turned off, so that the turn-off time of the device in embodiment 1 is slightly slower than that in embodiment 2.
Fig. 16 shows a process flow diagram of the LIGBT with the new structure in embodiment 1. The process flow is mainly divided into the following eight parts: (1) forming an SOI structure by deposition and epitaxial processes; (2) forming a P-type floating layer at the rightmost end above the SOI structure through a boron ion implantation process; (3) growing an epitaxial layer with the same doping concentration as the SOI layer on the silicon wafer by using an epitaxial process, and forming an N + anode by using an ion implantation process; (4) an epitaxial layer is grown on the upper part by using an epitaxial process to form a top semiconductor region, and a gap is etched at the right end to form a silicon dioxide insulating layer and place longitudinal anode metal; (5) depositing a silicon dioxide insulating layer on the right side wall of the top semiconductor region; (6) respectively forming a P-body and an N-buffer by using boron ion implantation and phosphorus ion implantation processes; (7) forming a P + cathode and a P + anode by using a boron ion implantation process, and forming an N + electron emitter by using a phosphorus ion implantation process; (8) and forming a gate oxide layer by using a deposition process, and finally placing a metal electrode.
Finally, the above embodiments are only intended to illustrate the technical solutions of the present invention and not to limit the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions, and all of them should be covered by the claims of the present invention.
Claims (7)
1. An SA-LIGBT device having longitudinally separated anodes, characterized by: the SOI structure comprises a P-type substrate (9), an insulating medium layer (8) and an N-type drift region (7), wherein the SOI structure comprises the SOI structure and a top layer semiconductor region arranged on the SOI structure, the SOI structure comprises a cathode metal (1), a P-type heavily doped cathode region (5), an N-type heavily doped cathode region (2), a gate oxide layer (3), a gate (4), a P-body (6) and an anode region from bottom to top. The gate oxide layer (3) is positioned below the grid (4); the N-type heavily doped cathode region (2) is positioned on the right side of the P-type heavily doped cathode region (5), the cathode metal (1) is positioned on the upper sides of the P-type heavily doped cathode region (5) and the N-type heavily doped cathode region (2), the gate oxide layer (3) is positioned on the right side of the cathode metal (1), the gate (4) is arranged on the upper side of the gate oxide layer (3), and the P-type heavily doped cathode region (5) and the N-type heavily doped cathode region (2) are both surrounded by a P-body (6); the anode region and the P-body (6) are isolated by an N-type drift region (7).
2. The SA-LIGBT device with longitudinally split anodes according to claim 1, characterized in that: the anode region comprises an N-type buffer layer (10), a P-type heavily doped anode region (11), anode metal (12), an anode dielectric isolation layer (13) and an N-type heavily doped anode region (14).
3. The SA-LIGBT device with longitudinally split anodes according to claim 2, characterized in that: the P-type heavily doped anode region (11) is positioned on the right side of the N-type buffer layer (10) and is wrapped by the N-type buffer layer (10); the anode metal (12) is positioned on the surface and inside of the device, contacts with the P-type heavily doped anode region (11) and the upper part of the anode dielectric isolation layer (13) on the surface, and contacts with the right side of the anode dielectric isolation layer (13) and the upper part of the N-type heavily doped anode region (14) inside; the anode dielectric isolation layer (13) is positioned on the right side of the N-type buffer layer (10), and the N-type buffer layer (10) and the anode metal (13) are isolated in the device.
4. The SA-LIGBT device with longitudinally separated anodes according to claim 3, wherein: the N-type heavily doped anode region (14) is in contact with the lower part of the anode metal (12), and the transverse width of the N-type heavily doped anode region is consistent with that of the anode metal (12) in the device.
5. The SA-LIGBT device with longitudinally separated anodes according to claim 4, wherein: the N-type heavy-doping anode region is characterized by further comprising a P-type floating layer (15), wherein the P-type floating layer (15) is arranged at the lower end of the N-type heavy-doping anode region (14).
6. The SA-LIGBT device with longitudinally separated anodes according to claim 4, wherein: the anode structure further comprises a P-type floating layer (15), wherein the P-type floating layer (15) is arranged at the lower end of the anode medium isolation layer (13) and is in contact with the N-type heavily doped anode region (14).
7. A SA-LIGBT device with longitudinally separated anodes according to any one of claims 1 to 6, wherein: the insulating medium layer (8) and the anode medium isolating layer (13) are made of silicon dioxide, the cathode metal (1) and the anode metal (12) are made of copper or aluminum, and the grid (4) is made of copper, aluminum or polycrystalline silicon.
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