CN111324946A

CN111324946A - 4H-SiC MOSFET static temperature characteristic simulation analysis method

Info

Publication number: CN111324946A
Application number: CN202010073170.8A
Authority: CN
Inventors: 王翠霞; 曾亮; 吴江枫; 余有灵; 李诚瞻
Original assignee: Tongji University; Zhuzhou CRRC Times Semiconductor Co Ltd
Current assignee: Tongji University; Zhuzhou CRRC Times Semiconductor Co Ltd
Priority date: 2020-01-22
Filing date: 2020-01-22
Publication date: 2020-06-23

Abstract

The invention discloses a simulation analysis method for static temperature characteristics of a 4H-SiC MOSFET, which comprises the steps of determining structural parameters of the 4H-SiC MOSFET and generating a corresponding three-dimensional structure by utilizing a Silvaco platform; and (4) obtaining the influence rule of the temperature on the static characteristic and the characteristic parameter of the 4H-SiC MOSFET by simulating and analyzing the output characteristic and the temperature characteristic of the 4H-SiC MOSFET. The method is based on the Silvaco Tcad, establishes a three-dimensional device model of the SiC MOSFET, simulates breakdown voltage, transfer characteristics and output characteristics at different temperatures, analyzes the influence rule of the temperature on the static parameters of threshold voltage, saturation leakage current, on-resistance and the like, and has important guiding effect on the structural design and manufacture of the SiC device in a high-temperature and high-pressure environment.

Description

4H-SiC MOSFET static temperature characteristic simulation analysis method

Technical Field

The invention relates to a simulation and analysis method for static temperature characteristics of a 4H-SiC MOSFET, belonging to the technical field of semiconductors.

Background

Power semiconductor devices and technologies are the key to the continuous development of power electronics. Silicon-based semiconductor materials are abundant in resources, convenient to produce, and have special physical and chemical properties and good semiconductor properties, so that the silicon-based semiconductor materials have a dominant position in power electronic devices. However, as the application requirements of high-power electronic devices and high-temperature scenes such as aerospace, aviation, oil exploration, nuclear energy and the like are continuously increased, the defect that the silicon-based power electronic devices are difficult to bear high temperature and high pressure begins to appear.

Compared with Si, SiC has more excellent electrical properties and good high-temperature and high-pressure working capacity, but the high temperature still influences the performance of SiC electronic devices. At present, the temperature characteristics of the SiC MOSFET are not sufficiently researched, and in practical application, in order to ensure the performance and safety of a practical system and fully utilize the excellent characteristics of the SiC MOSFET, it is necessary to make clear the rule of the influence of temperature on the static performance and characteristic parameters of the SiC MOSFET.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provides a simulation and analysis method for the static temperature characteristic of a 4H-SiC MOSFET.

In order to solve the technical problems, the technical scheme adopted by the invention is as follows:

a simulation analysis method of static temperature characteristics of 4H-SiC MOSFET,

determining structural parameters of the 4H-SiC MOSFET, and generating a corresponding three-dimensional structure by using a Silvaco platform;

and (4) obtaining the influence rule of the temperature on the static characteristic and the characteristic parameter of the 4H-SiC MOSFET by simulating and analyzing the output characteristic and the temperature characteristic of the 4H-SiC MOSFET.

Further, the breakdown voltage of the 4H-SiC MOSFET is simulated in Atlas software of a Silvaco platform at the temperature of 300K-700K respectively;

and drawing the breakdown voltage at each temperature point into a breakdown voltage curve, and analyzing the relation between the breakdown voltage and the temperature influence from the trend change of the breakdown voltage curve.

Further, the breakdown voltage shows a tendency to decrease with an increase in temperature from the breakdown voltage curve analysis.

Further, the breakdown voltage drop amplitude is maximum in the temperature range of 400K-500K.

Further, the region where the breakdown voltage drop amplitude is largest is most affected by temperature change.

Further, temperature variations have a negative temperature effect on the static characteristics of the SiC MOSFET, including threshold voltage, saturation leakage current, and breakdown voltage, which decrease with increasing temperature.

Further, a change curve of saturation leakage current along with gate source voltage, namely a transfer characteristic curve is obtained by simulating the 4H-SiC MOSFET in Atlas software of a Silvaco platform at the temperature of 300K-700K respectively;

the transfer characteristic curve of the SiC MOSFET moves downward with an increase in temperature, and the threshold voltage tends to decrease with an increase in temperature.

Further, the on-resistance has a positive temperature effect when the gate voltage is higher than a set value, and increases with increasing temperature.

The invention achieves the following beneficial effects:

based on Silvaco Tcad, the invention establishes a three-dimensional device model of the SiC MOSFET with breakdown voltage reaching 4600V high voltage at normal temperature, simulates breakdown voltage, transfer characteristic and output characteristic at different temperatures, analyzes the influence rule of temperature on the static parameters of threshold voltage, saturated leakage current, on-resistance and the like, and has important significance for designing the SiC MOSFET system in high-temperature and high-pressure environment. Simulation shows that temperature change has certain influence on the static characteristics of the SiC MOSFET, the threshold voltage, the saturation leakage current and the breakdown voltage of the SiC MOSFET have negative temperature effect, but the breakdown voltage is less influenced by the temperature; the on-resistance has a positive temperature effect when the gate voltage is high. The simulation results have important guiding function on the structural design and manufacture of the SiC device under the high-temperature and high-pressure environment.

Drawings

FIG. 1 is a schematic cross-sectional view of a cell of a SiC MOSFET device;

FIG. 2 is a schematic diagram of a three-dimensional structure of a SiC MOSFET device;

FIG. 3 breakdown voltage curve;

FIG. 4 breakdown voltage curves;

FIG. 5 is a graph of local electric field intensity distribution;

FIG. 6 output characteristic curves;

FIG. 7I_DAnd R_onA temperature-dependent curve;

FIG. 8 transfer characteristic;

FIG. 9 is a graph of threshold voltage versus temperature.

Detailed Description

The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.

Structure design of 1SiC MOSFET device

The designed breakdown voltage is expected to be 3300V, leaving a 20% margin, i.e., 3300V/0.8 — 4125V. The drift region thickness and doping concentration play a decisive role in the breakdown voltage of the device. For an N-type 4H-SiC device, the concentration and the thickness of a drift region and the breakdown voltage are in relation to the formula shown in the formula (1) and the formula (2).

W_D＝2.62×10^-3·V_B ^1.12(μm) (1)

N_D＝1.10×10²⁰·V_B ^-1.27(cm^-3) (2)

In the formula: w_DRepresents the drift region thickness; n is a radical of_DRepresents the doping concentration of the drift region; v_BRepresenting the breakdown voltage.

From empirical formulas (1) and (2) and validation of the Silvaco simulation software, it was preliminarily determined that the thickness and concentration of the drift region of the SiC MOSFET devices designed herein were 20 μm and 9 × 10, respectively¹⁵cm^-3。

The existing UMOS structure is adopted in the scheme, but in the silicon carbide UMOS structure, when a device is in a blocking state, the electric field intensity in an oxide layer at the bottom of a groove bottom of a UMOS groove is about 2.5 times of the electric field intensity of a peak value of a pn junction of the UMOS groove, and the electric field intensity at a groove corner is higher due to a two-dimensional effect. Because the critical breakdown electric field intensity of the SiC material is high, the electric field in the silicon carbide UMOS groove oxide layer easily exceeds the strength which can be borne by the oxide layer before the pn junction avalanche breakdown which bears the reverse voltage, so that destructive failure caused by the breakdown of the gate oxide layer is easy to occur. Meanwhile, because the forbidden band width of SiC is wide, the gate voltage applied to the silicon carbide power MOS for generating an inversion channel by utilizing the surface energy band bending is higher than that of the silicon power MOS, and the electric field load of the silicon carbide UMOS gate oxide layer is increased. In order to protect the gate oxide layer, a high-concentration p-type protective layer can be added below the gate oxide layer.

FIG. 1 is a schematic cross-sectional view of a cell of a SiC MOSFET device built in Silvaco, wherein the N + source, P-base, P-protect and N + substrate doping concentrations are 1 × 10 respectively¹⁸cm^-3，2.5×10¹⁶cm^-3，1×10¹⁷cm^-3And 1 × 10¹⁹cm^-3The drift region has a thickness of 20 μm and a concentration of 9 × 10¹⁵cm^-3The length of the trench is 1.8 mu m, and the thickness of the gate oxide layer is

After determining the structural parameters of the SiC MOSFET, a corresponding three-dimensional structure is generated by using a Silvaco device, as shown in FIG. 2, simulation is performed at various temperatures on the basis, and the influence rule of the temperature on the characteristic parameters is explored.

2 temperature characteristic analysis of SiC MOSFET under high temperature condition

2.1SiC MOSFET blocking characteristic temperature characteristic analysis

Based on the device structure established in the above section, the breakdown voltages of the 4H-SiC MOSFETs at 300K, 400K, 500K, 600K and 700K were simulated in the silveraco Atlas, and the simulation results are shown in fig. 3.

FIG. 3 shows that the leakage current of SiC MOSFETs is V at the temperature range of 300K-700K_DS4400V and V_DSThe vicinity of 4200V sharply increases, and thus breakdown is considered to occur at this time. The breakdown voltage at 300K is about 4450V, and the breakdown voltage at 400K is reduced to 4400V, 500K, 600K and 70The breakdown voltage at 0K was 4200V, 4175V and 4150V, respectively. The breakdown voltage at each temperature point is plotted in fig. 4, and it can be seen that the breakdown voltage shows a tendency to decrease as the temperature increases. The breakdown voltage is greatly reduced at 400K-500K, and the difference value is about 200V; the difference between other adjacent temperature points is small, and the influence of temperature change is small.

At high temperature, the movement of carriers in SiC is mainly influenced by lattice scattering, the rise of the lattice temperature generates a large number of thermo-phonons, the thermo-phonons strengthen the scattering effect on the carriers, the carrier energy and the mean free path are reduced, and the collision ionization coefficient is also reduced. With increasing temperature, the avalanche ionization rate decreases while the field excitation effect increases and dominates. The combined effect of these factors results in a decrease in the breakdown voltage of the 4H-SiC MOSFET with increasing temperature.

The electric field distribution of the 4H-SiC MOSFET gate oxide layer in the direction perpendicular to the tangent is shown in FIG. 5 at 300K breakdown.

In fig. 5, a vertical line at x-3 μm is a boundary between the gate oxide layer and the drift region. It can be seen from fig. 5 that the maximum field intensity occurs at the bottom of the trench, which is about 9.2MV/cm, and at this field intensity, the normal operation time of the silicon oxide film is about 3 years, and it can be determined that the oxide layer is in a safe state at this time. The peak value of the electric field intensity of the drift region occurs between the protective layer and the gate oxide layer, the field intensity at the moment is about 3.1MV/cm, and the critical field intensity of 4H-SiC is 3MV/cm, so that the avalanche breakdown of the pn junction can be judged to occur at the upper part of the drift region.

2.2SiC MOSFET output characteristic temperature characteristic analysis

At V_GSThe results of the simulation of the output characteristic curves of the 4H-SiC MOSFET model are shown in fig. 6 for 20V, giving a total of 300K, 350K, 400K, 450K, 500K, 550K, 600K, 650K and 700K, output characteristic curves at 9 temperatures. As can be seen from fig. 6, the simulation results are in agreement with the theoretical basis.

As can be seen from FIG. 6, when V is_GSSaturation I at 300K for a 4H-SiC MOSFET at 20V_DIs 56A and saturates I at 700K_DAbout 6A, less than 1 ^ at 300K9; on-resistance R_onIncreasing from 0.54 omega at 300K to 6.32 omega at 700K. The detailed data are shown in table 1.

TABLE 1 simulation results at different temperatures

The trends of the saturation leakage current and the on-resistance with temperature are shown in fig. 7.

At V_GSWhen the saturation leakage current is large, the saturation leakage current decreases with an increase in temperature, and accordingly, the on-resistance gradually increases with an increase in temperature. This is mainly related to the interplay of MOS channel resistance and drift region resistance within SiC MOSFETs. The lattice scattering of the drift region is enhanced along with the rise of the temperature, and the mobility of the carrier of the drift region is reduced, so that the resistance of the drift region is increased, and the influence of the temperature on the resistance of the drift region is shown as a positive temperature effect. When V is_GSAt 20V, a strong inversion layer appears in the MOS channel, whose mobility and concentration are dominated by SiC/SiO₂The interface trap at the interface is limited, when the temperature rises, the interface state density is reduced, the mobility of the inversion layer is increased, the MOS channel resistance is reduced, and the negative temperature effect of the temperature on the MOS channel resistance is presented. When the temperature is low, the on-resistance R_onThe resistance-based MOS transistor mainly comprises an MOS channel resistance and a drift region resistance, the drift region resistance is dominant, but the positive temperature effect of the drift region resistance can be inhibited to a certain extent by the negative temperature effect of the MOS channel resistance. As the temperature rises, the MOS channel resistance is smaller and can be neglected gradually, and the on-resistance R is_onMainly composed of drift region resistance, so R_onThe rate of increase with temperature rise is faster and faster.

2.3 analysis of transfer characteristics and temperature characteristics of SiC MOSFET

In simulation, in order to obtain a change curve of leakage current along with gate-source voltage, namely a transfer characteristic curve, the drain-source voltage is generally fixed, or the gate and the drain are shorted and connected with high potential, and the source is grounded. The method adopted in the simulation process is to fix the drain-source voltage to be 0.1V and gradually apply voltage to the grid. The 4H-SiC MOSFET transfer curves obtained by simulating 9 temperature points of 300K, 350K, 400K, 450K, 500K, 550K, 600K, 650K and 700K are shown in FIG. 8.

As can be seen from FIG. 8, the transfer curve of the SiC MOSFET shifts downward with increasing temperature, with a threshold voltage V_THThe specific data and trends with temperature are shown in table 2 and fig. 9, with a slight decrease in temperature.

TABLE 2 simulation results at different temperatures

Temperature T/K	Threshold voltage v_TH/V
		300	7.06
350	7.04
		400	6.95
450	6.72
		500	6.64
550	6.58
		600	6.47
650	6.34
		700	6.26

It can be seen from fig. 9 that the threshold voltage has a significant negative temperature effect, mainly because as the temperature increases, the hot carriers passing through the SiC bandgap increase, resulting in a decrease in the intrinsic carrier concentration, so that V is_THAnd decreases. Analysis data shows that the threshold voltage is obviously reduced from 400K to 450K, the threshold voltage is reduced from 6.95V to 6.72V, the difference value is 0.23V, and the reduction amplitude is 3.3%; in the temperature range of 300-700K, the threshold voltage is reduced from 7.06V at 300K to 6.26V at 700K, the difference is 0.8V, and the overall reduction amplitude is 11.3%.

The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims

1. A simulation analysis method for static temperature characteristics of 4H-SiC MOSFET is characterized in that,

2. The 4H-SiC MOSFET static temperature characteristic simulation analysis method according to claim 1, wherein breakdown voltages of the 4H-SiC MOSFET at temperatures of 300K-700K are simulated in Atlas software of a Silvaco platform;

3. The simulation analysis method for static temperature characteristics of 4H-SiC MOSFET according to claim 1, wherein the breakdown voltage shows a decreasing trend with increasing temperature from the breakdown voltage curve analysis.

4. The 4H-SiC MOSFET static temperature characteristic simulation analysis method according to claim 2 or 3, wherein the breakdown voltage drop is largest in a temperature range of 400K-500K.

5. The simulation analysis method for static temperature characteristics of 4H-SiC MOSFET according to claim 4, wherein the region with the largest breakdown voltage drop is most affected by temperature variation.

6. The method of claim 1, wherein the temperature variation has a negative temperature effect on the static characteristics of the SiC MOSFET, including threshold voltage, saturation leakage current, and breakdown voltage, and decreases with increasing temperature.

7. The 4H-SiC MOSFET static temperature characteristic simulation analysis method according to claim 1 or 6, which is characterized in that a change curve of saturation leakage current along with gate source voltage, namely a transfer characteristic curve, is obtained by simulating the 4H-SiC MOSFET in Atlas software of a Silvaco platform at the temperature of 300K-700K respectively;

8. The 4H-SiC MOSFET static temperature characteristic simulation analysis method of claim 1, wherein the on-resistance has a positive temperature effect when the gate voltage is higher than a set value, and increases with increasing temperature.