CN111324560A - Information acquisition system and method and electrical equipment - Google Patents
Information acquisition system and method and electrical equipment Download PDFInfo
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- CN111324560A CN111324560A CN202010263146.0A CN202010263146A CN111324560A CN 111324560 A CN111324560 A CN 111324560A CN 202010263146 A CN202010263146 A CN 202010263146A CN 111324560 A CN111324560 A CN 111324560A
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
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Abstract
The disclosure provides an information acquisition system and method and an electrical device. The information acquisition system comprises a main controller, a plurality of information collectors, a main line and a plurality of sub-lines, wherein the information collectors correspond to the sub-line devices one to one, the first end of each sub-line is electrically connected with the corresponding information collector, the second end of each sub-line is electrically connected with the first end of the main line, the second end of the main line is electrically connected with the main controller, the main controller is configured to send address information of a designated information collector through the main line, and each information collector is configured to send acquisition information through the corresponding sub-line under the condition that the address information is received through the corresponding sub-line and matched with the address of the information collector, so that the main controller receives the acquisition information through the main line. This openly can effectively reduce the quantity of required cable to can promote the EMC anti-interference performance of product, reduce product cost by a wide margin, effectively promote the design development efficiency of product.
Description
Technical Field
The disclosure relates to the field of control, and in particular to an information acquisition system and method and an electrical device.
Background
Currently in air conditioning systems, it is necessary to give the control unit sensed system parameters, including temperature, pressure, flow rate, etc. In the related art, a plurality of sensors are generally provided in an air conditioning system, a cable is provided between each sensor and a control unit, and the sensors transmit acquired parameters to the control unit through respective corresponding cables.
Disclosure of Invention
The inventor notices that the number of the sensors arranged in the air conditioning system is large, so that the number of the cables required to be arranged in the air conditioner is also large, the cables are difficult to run, and the situation of wrong wiring is easy to occur. In addition, more cables bring EMC (Electromagnetic compatibility) interference problems, which negatively affects the design and development of products.
Therefore, the information acquisition scheme is provided, the number of required cables can be effectively reduced, the EMC anti-interference performance of products can be improved, the product cost is greatly reduced, and the design and development efficiency of the products is effectively improved.
According to a first aspect of the embodiments of the present disclosure, an information acquisition system is provided, which includes a master controller, a plurality of information collectors, a main line, and a plurality of sub-lines, where the information collectors correspond to the sub-lines one to one, and where: the first end of each sub-line is electrically connected with the corresponding information collector, the second end of each sub-line is electrically connected with the first end of the main line, and the second end of the main line is electrically connected with the main controller; the master controller is configured to transmit address information specifying an information collector through the main line; each information collector is configured to send collected information through the corresponding sub-line under the condition that the address information is received through the corresponding sub-line and matched with the address of the information collector, so that the main controller receives the collected information through the main line.
In some embodiments, the main lines include a main data line and a main address bus; each sub-circuit comprises a sub-data line and a sub-address bus; the sub data lines in each sub circuit are electrically connected with the main data lines in the main circuit, and the sub address buses in each sub circuit are electrically connected with the main address buses in the main circuit.
In some embodiments, the master is configured to send the address information over a primary address bus in the primary line and is further configured to receive the gather information over a primary data line in the primary line; each information collector is configured to receive the address information through a sub-address bus in the corresponding sub-line and is further configured to transmit the collected information through a sub-data line in the corresponding sub-line.
In some embodiments, the main address bus includes n main address lines, the sub-address bus includes n sub-address lines, the ith main address line and the ith sub-address line are electrically connected, 1 ≦ i ≦ n, and 2n>And M are the total number of the information collectors.
In some embodiments, the primary line further comprises a primary power line; each sub-circuit further comprises a sub-power line; and the sub power line in each sub circuit is electrically connected with the main power line in the main circuit so as to supply power to the corresponding information collector.
In some embodiments, each information collector is further configured to send an information end identifier through a sub data line in the corresponding sub line after sending the collected information through the sub data line in the corresponding sub line.
In some embodiments, the master is further configured to send address information of a next information collector over a main address bus in the main line after receiving the end of information identification over a main data line in the main line.
In some embodiments, the master controller is further configured to perform an alarm process if the acquisition information is not received through the main data line in the main line within a preset time range after the address information is sent through the main address bus in the main line.
According to a second aspect of the embodiments of the present disclosure, there is provided an electrical device including the information acquisition system according to any one of the embodiments.
In some embodiments, the electrical device comprises an air conditioner.
According to a third aspect of the embodiments of the present disclosure, there is provided an information acquisition method for use in the information acquisition system according to any one of the embodiments, wherein: the main controller sends the address information of the designated information collector through the main line; each information collector receives the address information through a corresponding sub-line and judges whether the address information is matched with the address of the information collector; and the designated information collector sends the collected information through the corresponding sub-line under the condition that the address information is matched with the address of the designated information collector, so that the main controller receives the collected information through the main line.
In some embodiments, other information collectors than the specified information collector discard the address information if the address information does not match its own address.
In some embodiments, the master sending address information specifying the information collector over the main line comprises: the main controller sends the address information of the designated information collector through a main address bus in the main line; each information collector receives the address information through the corresponding sub-line, and the address information comprises the following steps: and each information collector receives the address information through a sub-address bus in the corresponding sub-line.
In some embodiments, the specifying information collector sending the collection information through the corresponding sub-line includes: the designated information collector sends the collected information through the sub data line in the corresponding sub line; the master controller receiving the collection information through the main line includes: and the main controller receives the acquisition information through a main data line in the main circuit.
In some embodiments, after the designated information collector sends the collected information through the sub data line in the corresponding sub line, the designated information collector sends an information end identifier through the sub data line in the corresponding sub line.
In some embodiments, the master sends the address information of the next information collector through a main address bus in the main line after receiving the information end identifier through a main data line in the main line.
In some embodiments, the master controller further performs an alarm process if the acquisition information is not received through the main data line in the main line within a preset time range after sending the address information through the main address bus in the main line.
In some embodiments, power is supplied to the corresponding information collector through a main power line in the main line and a sub power line in the sub line.
Other features of the present disclosure and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of an information acquisition system according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a main circuit according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a sub-circuit configuration according to one embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a main circuit according to another embodiment of the present disclosure;
FIG. 5 is a schematic structural diagram of a sub-circuit according to another embodiment of the present disclosure;
FIG. 6 is a schematic structural diagram of an electrical device according to an embodiment of the present disclosure;
fig. 7 is a schematic flow chart of an information acquisition method according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings in the embodiments of the present disclosure, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.
The relative arrangement of the components and steps, the numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.
Meanwhile, it should be understood that the sizes of the respective portions shown in the drawings are not drawn in an actual proportional relationship for the convenience of description.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Fig. 1 is a schematic structural diagram of an information acquisition system according to an embodiment of the present disclosure. As shown in fig. 1, the information acquisition system includes a master controller 11, a plurality of information collectors 12, a main line 13, and a plurality of sub-lines 14, where the information collectors 12 and the sub-line devices 14 correspond one to one.
The first end of each sub-line 14 is electrically connected with the corresponding information collector 12, the second end of each sub-line 14 is electrically connected with the first end of the main line 13, and the second end of the main line 13 is electrically connected with the main controller 11.
The master 11 is configured to transmit address information specifying an information collector through the main line 13. Each information collector 12 is configured to transmit the collected information through the corresponding sub-line 14 in a case where the address information is received through the corresponding sub-line 14 and the address information matches its own address, so that the master 11 receives the collected information through the main line 13.
For example, as shown in FIG. 1, information collectors 12 include information collectors 121-12N and sub-line devices 14 include 141-14N. Master 11 sends address information for information collector 122 via main line 13. After receiving the address information through the corresponding sub-line 142, the information acquirer 122 determines that the address information matches its own address, and then transmits the acquisition information through the corresponding sub-line 142, so that the master 11 receives the acquisition information through the main line 13.
For other information collectors except the information collector 122, although the address information sent by the master 11 can also be received, the information collectors do not report the collected information because the address information does not match their own addresses.
It should be noted here that the master and the information collector may be logic processing units for performing the functions described in the present disclosure. In addition, the information collector has an information collection function, or the information collector is integrated with a sensor having the information collection function.
In the information acquisition system provided by the above embodiment of the present disclosure, the master controller is electrically connected to the main line, the plurality of information collectors are electrically connected to the corresponding sub-lines, and the main line is electrically connected to the plurality of sub-lines, so that the master controller can receive the acquisition information reported by each information collector without setting a line directly connected to the master controller and each information collector. Therefore, the number of required cables can be effectively reduced, the EMC anti-interference performance of the product can be improved, the product cost is greatly reduced, and the design and development efficiency of the product is effectively improved.
Fig. 2 is a schematic structural diagram of a main circuit according to an embodiment of the present disclosure. Fig. 3 is a schematic structural diagram of a sub-circuit according to an embodiment of the present disclosure.
As shown in fig. 2, the main line 13 includes a main data line 211 and a main address bus 212. As shown in fig. 3, sub-line 14 includes a sub-data line 221 and a sub-address bus 222.
The sub data line 221 in the sub line 14 is electrically connected to the main data line 211 in the main line 13, and the sub address bus line 222 in the sub line 14 is electrically connected to the main address bus line 212 in the main line 13.
In some embodiments, as shown in fig. 2, main line 13 also includes main power line 213. As shown in fig. 3, the sub-line 14 further includes a sub-power line 223. Sub power supply line 223 in sub line 14 is electrically connected to main power supply line 213 in main line 13 to supply power to the corresponding information collector 12.
The corresponding information collector is supplied with power through the main line and the sub-line, so that the design complexity is further reduced, and the information collector can be placed at a required position without considering power supply wiring.
Fig. 4 is a schematic structural diagram of a main circuit according to another embodiment of the present disclosure. Fig. 5 is a schematic structural diagram of a sub-circuit according to another embodiment of the present disclosure.
Fig. 4 differs from fig. 2 in that, in the embodiment shown in fig. 4, the main address bus 212 includes n main address lines. Fig. 5 differs from fig. 3 in that in the embodiment shown in fig. 5, the sub-address bus 222 comprises n sub-address lines. The ith main address line is electrically connected with the ith sub address line, i is more than or equal to 1 and less than or equal to n, and 2n>And M are the total number of the information collectors.
Here, if the total number M of information collectors is 4(4 ═ 2), it should be noted that2) Then onlyIt needs to set 2 main address lines in the main address bus 212 and 2 sub address lines in the sub address bus 222 to realize addressing 4 information collectors with address information of 00, 01, 10, 11. Correspondingly, if the total number M of information collectors is 8(8 ═ 2)3) Only 3 main address lines are needed to be arranged in the main address bus 212 and 3 sub address lines are needed to be arranged in the sub address bus 222, so that 8 information collectors can be addressed. That is to say, this disclosure need not to set up the address line for every information collector alone, can utilize less address line to realize addressing more information collectors, and along with the increase of information collector quantity, this kind of advantage is more obvious.
In some embodiments, as shown in fig. 4, primary power supply line 213 includes a first primary power supply line 2131 and a second primary power supply line 2132, wherein the voltage applied to the first primary power supply line is greater than the voltage applied to the second primary power supply line. For example, the first main power supply line 2131 supplies a positive voltage VCC, and the second main power supply line 2132 supplies a negative voltage VSS.
In some embodiments, as shown in fig. 5, the sub power supply line includes a first sub power-supply line 2231 and a second sub power-supply line 2232. The first sub-feeder line 2231 is electrically connected to the first main feeder line 2131, and the second sub-feeder line 2232 is electrically connected to the second main feeder line 2132.
Thus, the information collector 12 corresponding to each sub-line 14 is supplied with power by using the first main feeder line 2131, the second main feeder line 2132, the first sub-feeder line 2231, and the second sub-feeder line 2232.
In some embodiments, the information collector 12 further sends the information ending identifier through the sub-data line 221 in the corresponding sub-line 14 after sending the collected information through the sub-data 221 line in the corresponding sub-line 14.
The master 11, upon receiving the end-of-message flag via the main data line 211 in the main line 13, knows that the sending of the information to be collected by the current information collector is completed, in which case the address information of the next information collector is sent via the main address bus 212 in the main line 13.
Thus, master controller 11 can obtain the information collected by each information collector 12 in turn.
In some embodiments, the master 11 performs an alarm process if the collected information is not received through the main data line 211 in the main line 13 within a preset time range after sending the address information through the main address bus 212 in the main line 13.
For example, after the main controller 11 sends the address information of a certain information collector through the main address bus 212 in the main line 13, if the collected information sent by the information collector is not received through the main data line 211 in the main line 13 within a preset time range, it indicates that the information collector is faulty, and in this case, an alarm is performed, so that the faulty device can be replaced and maintained in time.
Fig. 6 is a schematic structural diagram of an electrical device according to an embodiment of the present disclosure.
As shown in fig. 6, the electric device 61 includes an information acquisition system 62. The information acquisition system 62 is the information acquisition system according to any one of the embodiments of fig. 1 to 5.
In some embodiments, the electrical equipment includes an air conditioner or other electrical product requiring acquisition of system parameters.
Fig. 7 is a schematic flow chart of an information acquisition method according to an embodiment of the present disclosure. The information acquisition method is suitable for the information acquisition system related to any one of the embodiments in fig. 1-5.
In step 701, the master sends address information specifying an information collector via the main line.
In some embodiments, the master sends address information specifying an information collector over a main address bus in the main line.
In step 702, each information collector receives address information through a corresponding sub-line and determines whether the address information matches its own address.
In some embodiments, each information collector receives address information over a sub-address bus in the corresponding sub-line.
In step 703, the designated information collector sends the collected information through the corresponding sub-line so that the master controller receives the collected information through the main line, in case the address information matches its own address.
In some embodiments, the designated information collector sends the collected information through the sub data line in the corresponding sub line, so that the main controller receives the collected information through the main data line in the main line.
In some embodiments, other information collectors than the specified information collector discard the address information in the event that the address information does not match its own address. Therefore, the master controller can be ensured to acquire the information acquired by the designated information acquisition device.
In some embodiments, power is supplied to the corresponding information collector through a main power line in the main line and a sub power line in the sub line.
The corresponding information collector is supplied with power through the main line and the sub-line, so that the design complexity is further reduced, and the information collector can be placed at a required position without considering power supply wiring.
In some embodiments, after the designated information collector sends the collected information through the sub data line in the corresponding sub line, the designated information collector sends the information end identifier through the sub data line in the corresponding sub line.
Correspondingly, after receiving the information end identifier through the main data line in the main line, the main controller knows that the transmission of the acquisition information of the current information acquirer is completed, and under the condition, the main controller transmits the address information of the next information acquirer through the main address bus in the main line. Therefore, the master controller can sequentially acquire the information acquired by each information acquirer.
In some embodiments, the master controller further performs an alarm process if the acquisition information is not received through the main data line in the main line within a preset time range after sending the address information through the main address bus in the main line.
For example, after the main controller sends the address information of a certain information collector through the main address bus in the main line, if the collected information sent by the information collector is not received through the main data line in the main line within a preset time range, it indicates that the information collector has a fault, and in this case, the main controller performs alarm processing so as to replace and maintain the faulty device in time.
Through implementing the above scheme of this disclosure, can effectively reduce the quantity of circuit to reply reduction in production cost, improve production efficiency. In addition, because the quantity of circuit is reduced, can also effectively promote EMC interference killing feature, promote product development efficiency.
In some embodiments, the master Controller and the information collector may be implemented as a general purpose Processor, a Programmable Logic Controller (PLC), a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable Logic device, a discrete gate or transistor Logic device, a discrete hardware component, or any suitable combination thereof for performing the functions described in the present disclosure.
The description of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the disclosure in the form disclosed. Many modifications and variations will be apparent to practitioners skilled in this art. The embodiment was chosen and described in order to best explain the principles of the disclosure and the practical application, and to enable others of ordinary skill in the art to understand the disclosure for various embodiments with various modifications as are suited to the particular use contemplated.
Claims (18)
1. An information acquisition system comprises a main controller, a plurality of information collectors, a main line and a plurality of sub-lines, wherein the information collectors correspond to the sub-lines one by one, and the information acquisition system comprises:
the first end of each sub-line is electrically connected with the corresponding information collector, the second end of each sub-line is electrically connected with the first end of the main line, and the second end of the main line is electrically connected with the main controller;
the master controller is configured to transmit address information specifying an information collector through the main line;
each information collector is configured to send collected information through the corresponding sub-line under the condition that the address information is received through the corresponding sub-line and matched with the address of the information collector, so that the main controller receives the collected information through the main line.
2. The information acquisition system according to claim 1,
the main line comprises a main data line and a main address bus;
each sub-circuit comprises a sub-data line and a sub-address bus;
the sub data lines in each sub circuit are electrically connected with the main data lines in the main circuit, and the sub address buses in each sub circuit are electrically connected with the main address buses in the main circuit.
3. The information acquisition system according to claim 2,
the master is configured to send the address information over a master address bus in the master line and is further configured to receive the acquisition information over a master data line in the master line;
each information collector is configured to receive the address information through a sub-address bus in the corresponding sub-line and is further configured to transmit the collected information through a sub-data line in the corresponding sub-line.
4. The information acquisition system according to claim 3,
the main address bus comprises n main address lines, the sub-address bus comprises n sub-address lines, the ith main address line is electrically connected with the ith sub-address line, i is more than or equal to 1 and less than or equal to n, and 2n>And M are the total number of the information collectors.
5. The information acquisition system according to claim 3,
the main line further comprises a main power line;
each sub-circuit further comprises a sub-power line;
and the sub power line in each sub circuit is electrically connected with the main power line in the main circuit so as to supply power to the corresponding information collector.
6. The information acquisition system according to claim 3,
each information collector is also configured to send an information ending identifier through a sub-data line in the corresponding sub-line after sending the collected information through the sub-data line in the corresponding sub-line.
7. The information acquisition system according to claim 6,
the master controller is further configured to send address information of a next information collector through a main address bus in the main line after receiving the information end identifier through a main data line in the main line.
8. The information acquisition system according to claim 3,
the master controller is further configured to perform alarm processing if the acquisition information is not received through the main data line in the main line within a preset time range after the address information is sent through the main address bus in the main line.
9. An electrical device comprising an information acquisition system according to any one of claims 1-8.
10. The electrical device of claim 9, wherein the electrical device comprises an air conditioner.
11. An information acquisition method for an information acquisition system according to any one of claims 1 to 8, wherein:
the main controller sends the address information of the designated information collector through the main line;
each information collector receives the address information through a corresponding sub-line and judges whether the address information is matched with the address of the information collector;
and the designated information collector sends the collected information through the corresponding sub-line under the condition that the address information is matched with the address of the designated information collector, so that the main controller receives the collected information through the main line.
12. The method of claim 11, further comprising:
and other information collectors except the specified information collector discard the address information under the condition that the address information is not matched with the self address.
13. The method of claim 11, wherein,
the master controller sends the address information of the designated information collector through the main line, and the method comprises the following steps:
the main controller sends the address information of the designated information collector through a main address bus in the main line;
each information collector receives the address information through the corresponding sub-line, and the address information comprises the following steps:
and each information collector receives the address information through a sub-address bus in the corresponding sub-line.
14. The method of claim 13, wherein,
the step of sending the acquisition information by the designated information acquisition device through the corresponding sub-line comprises the following steps:
the designated information collector sends the collected information through the sub data line in the corresponding sub line;
the master controller receiving the collection information through the main line includes:
and the main controller receives the acquisition information through a main data line in the main circuit.
15. The method of claim 14, further comprising:
and after the designated information collector sends the collected information through the sub data line in the corresponding sub line, sending an information ending identifier through the sub data line in the corresponding sub line.
16. The method of claim 15, further comprising:
and after receiving the information end identification through a main data line in the main line, the main controller sends the address information of the next information collector through a main address bus in the main line.
17. The method of claim 14, further comprising:
and the main controller is also used for alarming if the acquisition information is not received through the main data line in the main line within a preset time range after the address information is sent through the main address bus in the main line.
18. The method of claim 11, further comprising:
and supplying power to the corresponding information collector through the main power line in the main line and the sub power line in the sub line.
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101082896A (en) * | 2007-08-03 | 2007-12-05 | 杭州华三通信技术有限公司 | Control method and device between master-salve module |
CN102739486A (en) * | 2011-03-31 | 2012-10-17 | 上海微电子装备有限公司 | Synchronous data transmission bus system and method |
CN104714577A (en) * | 2015-03-17 | 2015-06-17 | 北京航宇军科机电设备有限公司 | Temperature and humidity measuring and control device, system and method |
CN106569428A (en) * | 2016-11-14 | 2017-04-19 | 深圳云联讯数据科技有限公司 | Intelligent electricity meter active discovering and monitoring method based on cloud platform |
CN108216006A (en) * | 2018-01-24 | 2018-06-29 | 天津科技大学 | Car lamp control system and control method |
CN109239791A (en) * | 2018-08-03 | 2019-01-18 | 上海奕瑞光电子科技股份有限公司 | A kind of linear array detection device and detection method |
CN211349338U (en) * | 2020-04-07 | 2020-08-25 | 珠海格力电器股份有限公司 | Information acquisition system and electrical equipment |
-
2020
- 2020-04-07 CN CN202010263146.0A patent/CN111324560A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101082896A (en) * | 2007-08-03 | 2007-12-05 | 杭州华三通信技术有限公司 | Control method and device between master-salve module |
CN102739486A (en) * | 2011-03-31 | 2012-10-17 | 上海微电子装备有限公司 | Synchronous data transmission bus system and method |
CN104714577A (en) * | 2015-03-17 | 2015-06-17 | 北京航宇军科机电设备有限公司 | Temperature and humidity measuring and control device, system and method |
CN106569428A (en) * | 2016-11-14 | 2017-04-19 | 深圳云联讯数据科技有限公司 | Intelligent electricity meter active discovering and monitoring method based on cloud platform |
CN108216006A (en) * | 2018-01-24 | 2018-06-29 | 天津科技大学 | Car lamp control system and control method |
CN109239791A (en) * | 2018-08-03 | 2019-01-18 | 上海奕瑞光电子科技股份有限公司 | A kind of linear array detection device and detection method |
CN211349338U (en) * | 2020-04-07 | 2020-08-25 | 珠海格力电器股份有限公司 | Information acquisition system and electrical equipment |
Non-Patent Citations (1)
Title |
---|
崔宝深: "《全国计算机等级考试应试训练 一级、二级基础知识和FoxBASE程序设计》", vol. 1997, 30 September 1997, 南开大学出版社, pages: 12 * |
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