CN111313735B - Modulation strategy for loss balance of three-level ANPC converter - Google Patents

Modulation strategy for loss balance of three-level ANPC converter Download PDF

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CN111313735B
CN111313735B CN202010197714.1A CN202010197714A CN111313735B CN 111313735 B CN111313735 B CN 111313735B CN 202010197714 A CN202010197714 A CN 202010197714A CN 111313735 B CN111313735 B CN 111313735B
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CN111313735A (en
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李宁
田博文
陈创
曹裕捷
李洁
聂程
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Xian University of Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • H02M7/53876—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a modulation strategy for loss balance of a three-level ANPC converter, which is implemented by the following steps: step 1, obtaining a three-phase modulation wave according to a carrier pulse width modulation method, and then solving and outputting a, b and c three-phase switch states and respective action time thereof through a space vector pulse width modulation strategy; step 2, adopting seven-segment wave generation and calculating the conduction time of each region, and carrying out current conversion control on the three-level ANPC rectifier; and 3, analyzing the switching loss generated by the current conversion mode, and providing a converter loss balance strategy. The invention aims to provide a modulation strategy for loss balance of a three-level ANPC converter, and solves the problems of short service life of each switching device and unbalanced loss of each power device in the prior art.

Description

Modulation strategy for loss balance of three-level ANPC converter
Technical Field
The invention belongs to the technical field of power electronics, and relates to a modulation strategy for loss balance of a three-level ANPC converter.
Background
Multi-level topologies are a more practical solution for high voltage, high power applications. But the difficulty of control gradually increases as the number of levels thereof increases. Three-level topologies are currently one of the most widely used multi-level topologies, but the conventional three-level midpoint ClamPed (NPC) topology has the problem of unbalanced loss distribution. Accordingly, Active Neutral Point ClamPed (ANPC) topologies have emerged, which can effectively control the device loss balance by selecting redundant switch states and different current paths, but which add two power devices per topology compared to the conventional three-level NPC topology, and thus are more complex to modulate and control.
Similar to the modulation strategy of the traditional three-level NPC converter, the modulation strategy of the three-level ANPC converter mainly comprises an SPWM method and an SVPWM method. The difference is that, under the normal work of the three-level NPC converter, the phase voltage zero level of the three-level NPC converter has only one state. And the three-level ANPC converter comprises four states of phase voltage zero level under the condition of switch safety combination due to a topological structure, so that the possibility of loss balance is provided.
Compared with the SPWM method, the modulation strategy of the three-level ANPC converter has the advantages of high SVPWM voltage utilization rate, harmonic wave reduction, flexible vector selection, easy realization of digitization and wide acceptance. However, the three-level ANPC converter increases three zero-level states for each phase of switching state compared with the traditional three-level NPC converter, so how to reasonably select the switching state, overcome the defect of uneven loss distribution of the three-level NPC converter, equally divide the loss of the three-level ANPC converter, and further improve the working performance of the converter is a research focus and difficulty of the three-level ANPC converter.
Disclosure of Invention
The invention aims to provide a modulation strategy for loss balance of a three-level ANPC converter, and solves the problems of short service life of each switching device and unbalanced loss of each power device in the prior art.
The technical scheme adopted by the invention is that a modulation strategy for loss balance of a three-level ANPC converter is implemented according to the following steps:
step 1, obtaining a three-phase modulation wave according to a carrier pulse width modulation method, and then solving and outputting a, b and c three-phase switch states and respective action time thereof through a space vector pulse width modulation strategy;
step 2, adopting seven-segment wave generation and calculating the conduction time of each region, and carrying out current conversion control on the three-level ANPC converter;
and 3, analyzing the switching loss generated by the current conversion mode, and providing a converter loss balance strategy.
The present invention is also characterized in that,
the step 1 specifically comprises the following steps: step 1.1, obtaining a three-phase modulation wave expression according to a carrier pulse width modulation method:
Figure GDA0002992298510000021
wherein, UmIs the amplitude of the three-phase voltage, Ua、UbAnd UcPhase voltages corresponding to three phases a, b and c are respectively provided, and omega is the angular frequency of the phase voltages of the three phases a, b and c;
step 1.2, synthesizing a reference voltage vector formula by the three-phase modulation wave obtained in step 1.1:
Figure GDA0002992298510000022
wherein,
Figure GDA0002992298510000023
step 1.3, respectively combining 27 different switch combinations in the inverter topology into three different switch states, and classifying the 27 switch combinations and the basic voltage vector;
and step 1.4, substituting the reference voltage vectors into the action time of each selected voltage vector respectively according to volt-second balance.
The step 1.3 is specifically as follows: step 1.3.1, according to the topological structure of the three-level ANPC converter, defining the switching function as follows:
Figure GDA0002992298510000024
wherein, TxRepresents the x-th phase output, x is a or b or c, 1 represents P, 0 represents O, and-1 represents N, so that the three-phase switch combination has 3 in total3When the combination is 27, the space vector S of the three-level ANPC converter is obtainedkComprises the following steps:
Figure GDA0002992298510000031
wherein, UDCRepresents the input voltage on the dc side;
step 1.3.2, equivalently transforming the three-phase sinusoidal voltage into an alpha-beta static coordinate system by adopting coordinate transformation, and carrying out reference voltage vector V in step 1.2refDecomposing in alpha-beta static coordinate system according to reference voltage vector VrefAnd the alpha axisThe included angle of the voltage vector is used for judging 6 large sectors A-F and 6 cells 1-6 corresponding to each large sector, and the classification of 27 switch combinations and basic voltage vectors is specifically as follows:
the combination of the corresponding switch states according to the voltage vector type is as follows: the long vector corresponds to PNN, PPN, NPN, NPP, NNP and PNP; the medium vector corresponds to PON, OPN, NPO, NOP, ONP and PNO; short vectors correspond to PPO, ONN, OPO, NON, OPP, NOO, OOP, NNO, POP, ONO, POO, ONN; the zero vector corresponds to PPP, OOO, NNN.
The step 1.4 is specifically as follows: setting a resultant reference voltage vector VrefThree space vectors U1、U2、U3Respectively corresponding to T1、T2、T3，TsFor a fixed switching period, the principle of volt-second equilibrium can be used:
T1×U1+T2×U2+T3×U3＝Ts×Vref (5)
T1+T2+T3＝Ts (6)
respectively solving the action time T of each selected voltage vector1、T2、T3；
The step 1.4 is specifically as follows:
sector a, cell 1, three space vectors U1、U2、U3Respectively as follows:
Figure GDA0002992298510000032
the following is obtained according to equation (5):
Figure GDA0002992298510000033
and (3) expanding the formula (8) and the formula (6) according to an Euler formula, and obtaining a solution by dividing the solution into a real part and an imaginary part:
Figure GDA0002992298510000034
wherein,
Figure GDA0002992298510000041
theta is a reference voltage vector VrefThe included angle with the alpha axis;
combining the A sector basic vector selection, wherein the A sector basic vector selection is as follows: the cell of the A sector 1 is represented by A1, and so on, the combination sequence of the corresponding switches in the area is as follows: a1 corresponds to ONN, OON, OOO, POO, OOO, OON, ONN; a2 corresponds to OON, OOO, POO, PPO, POO, OOO, OON; a3 corresponds to ONN, OON, PON, POO, PON, OON, ONN; a4 corresponds to OON, PON, POO, PPO, POO, PON, ONO; a5 corresponds to ONN, PNN, PON, POO, PON, PNN, ONN; a6 corresponds to OON, PON, PPN, PPO, PPN, PON, OON;
substituting the formula (4) into the corresponding switch combination sequence of the area to obtain three space vectors corresponding to each cell, and solving the corresponding basic vector action time of each cell of the sector A by combining the formula (8) specifically as follows:
A1：
Figure GDA0002992298510000042
T2＝2mTssinθ；
Figure GDA0002992298510000043
A2：T1＝2mTssinθ；
Figure GDA0002992298510000044
A3：T1＝Ts[1-2msinθ]；
Figure GDA0002992298510000045
A4：
Figure GDA0002992298510000046
T3＝Ts[1-2msinθ]；
A5：
Figure GDA0002992298510000047
T3＝2mTssinθ；
A6：
Figure GDA0002992298510000048
T3＝Ts[2msinθ-1]；
the vector action time of each cell in the C and E sectors is the same as that of the A sector, and the vector action time of each cell in the B, D and F sectors is the same as that of the T of each cell in the A sector2And T3The action time of the vectors after mutual replacement corresponds to one.
The step 2 specifically comprises the following steps: distributing the action time of the selected basic voltage vector to a corresponding vector by adopting seven-segment wave-sending, loading the action time of the basic voltage vector into a waveform sent by seven segments, and selecting the basic voltage vector information and the action time information according to the position information of the given basic voltage vector and each position so as to select a specific switch combination; will fix the switching period TsThe sorting of the seven sections is that: the method comprises the following steps: t is1/4；②：T2/2；③：T3/2；④：T1/2；⑤：T3/2；⑥：T2/2；⑦：T1/4；
Then at a fixed switching period TsIn each sector, the on-time of each cell P, O, N is:
sector A: a1: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; a2: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a A3 and a2 are identical; a4: p state corresponding to sequence of segments (c), (d), and conduction time Ts-T1The state of/2 and O corresponds to (c) and the conduction time is T 12; a5, a6 and a4 are identical;
sector B: b1: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; b3 and B1 are identical; b2: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; b4 and B2 are identical; b5: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a B6: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3；
C sector: c1: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3(ii) a C4 and C1 are the same; c2: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; c3: the N state corresponds to the sequence of the third step, the fourth step, the conduction time is Ts-T1O state is corresponding to12; c5, C6 and C3 are identical;
sector D: d1: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; d2: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3(ii) a D3 and D2 are identical; d4: the N state corresponds to the sequence of the third step, the fourth step, the conduction time is Ts-T1O state is corresponding to12; d5, D6 and D4 are identical;
e sector: e1: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; e3 and E1 are identical; e2: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; e4 and E2 are identical; e5: corresponding N state to T state1/2+T2The O state corresponds to the- (fifthly),on-time of T1/2+T3(ii) a E6: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2；
Sector F: f1: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a F4 and F1 are the same; f2: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; f3: p state corresponding to sequence of segments (c), (d), and conduction time Ts-T1The state of/2 and O corresponds to (c) and the conduction time is T 12; f5, F6 and F3 are identical.
The step 3 specifically comprises the following steps: step 3.1, determining switching loss generated by a current conversion mode
(1) IGBT loss: when the IGBT is in a conducting state, the internal impedance consumes electric energy, and conducting loss is generated; when the IGBT is in the switching process, the IGBT is switched on and off to consume electric energy, namely Eon and Eoff, so that switching loss is generated; then the total loss of the IGBT is turn-on loss, turn-on loss and turn-off loss;
(2) loss of the freewheeling diode: when the diode is in forward conduction, namely freewheeling, conduction loss is generated; when the diode is in the reverse recovery process, reverse recovery loss, namely Erec, is generated, and then the loss of the freewheeling diode is conduction loss plus reverse recovery loss;
step 3.2, analyzing the current conversion loss on the premise of the SVPWM control strategy according to the step 3.1;
and (b) analyzing phase conversion loss: from the P state to the OU1, OU2, OL1 and OL2 states, OU1, OU2, OL1 and OL2 are O states with four redundancy states and losses: voltage state: p, when the voltage and the current are in the same direction: sx1 conduction loss, Sx2 conduction loss, and when the voltage and the current are reversed: d1 conduction loss, D2 conduction loss; voltage state: p to OU1, voltage, current co-current: sx1 turn-off loss, when voltage and current are reversed: d1 reverse recovery loss, Sx5 turn-on loss; voltage state: OU1 to P, voltage, current co-current: d5 reverse recovery loss, Sx1 turn-on loss, when voltage and current are reversed: sx5 turn-off loss; voltage state: OU1, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss; voltage state: p to OU2, voltage, current co-current: sx1 turn-off loss, when voltage and current are reversed: d1 reverse recovery loss, Sx5 turn-on loss; voltage state: OU2 to P, voltage, current co-current: d5 reverse recovery loss, Sx1 turn-on loss, when voltage and current are reversed: sx5 turn-off loss; voltage state: OU2, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss; voltage state: p to OL2, voltage, current co-current: sx2 turn-off loss, when voltage and current are reversed: d2 reverse recovery loss, Sx3 turn-on loss; voltage state: OL2 to P, voltage, current co-current: d3 reverse recovery loss, Sx2 turn-on loss, when voltage and current are reversed: sx3 turn-off loss; voltage state: OL2, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss;
from the N state to the OU1, OU2, OL1 and OL2 states, the loss is: voltage state: n, when the voltage and the current are in the same direction: conduction losses of D4 and D3, when the voltage and current are reversed: sx3 and Sx4 conduction loss; voltage state: n to OU1, voltage, current co-current: d3 reverse recovery loss, Sx2 turn-on loss, when voltage and current are reversed: sx3 turn-off loss; voltage state: OU1 to N, voltage, current co-current: sx2 turn-off loss, when voltage and current are reversed: d2 reverse recovery loss, Sx3 turn-on loss; voltage state: OU1, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss; voltage state: n to OL1, voltage, current co-current: d4 reverse recovery loss, Sx6 turn-on loss, when voltage and current are reversed: sx4 turn-off loss; voltage state: OL1 to N, voltage, current co-current: sx6 turn-off loss, when voltage and current are reversed: d6 reverse recovery loss, Sx4 turn-on loss; voltage state: OL1, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss; voltage state: n to OL2, voltage, current co-current: d4 reverse recovery loss, Sx6 turn-on loss, when voltage and current are reversed: sx4 turn-off loss; voltage state: OL2 to N, voltage, current co-current: sx6 turn-off loss, when voltage and current are reversed: d6 reverse recovery loss, Sx4 turn-on loss; voltage state: OL2, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss;
depending on the output voltage level state, the load current direction and the order of state transitions are as follows, where P + represents: the output level is P, and the current direction is "+"; n-represents: the output level is N, the current direction is "-", and the mixed state situation is as follows: p + to OU 1-there is Sx1 turn-off loss, Sx5 turn-on loss; OU 1-to P + has Sx1 turn-on loss, Sx5 turn-off loss; p-to OU1+ with D1 reverse recovery loss; OU1+ to P-with D5 reverse recovery loss; p + to OL 2-there is Sx2 turn-off loss, Sx3 turn-on loss; OL 2-to P + has Sx2 turn-on loss, Sx3 turn-off loss; P-to-OL 2+ with D2 reverse recovery loss; the presence of D3 reverse recovery loss from OL2+ to P-; n + to OU 1-there is D3 reverse recovery loss; OU 1-to N + with D2 reverse recovery loss; N-to-OU 1+ has Sx2 turn-on loss and Sx3 turn-off loss; OU1+ to N-has Sx2 turn-off loss and Sx3 turn-on loss; n + to OL 1-there is a D4 reverse recovery loss; OL 1-to N + with D6 reverse recovery loss; N-to-OL 1+ has Sx4 turn-off loss and Sx6 turn-on loss; OL1+ to N-there is Sx4 turn-on loss, Sx6 turn-off loss;
step 3.3, a loss balance strategy is provided according to the analysis result of the step 3.2, and the method specifically comprises the following steps:
step 3.3.1, set the modulation degree to
Figure GDA0002992298510000071
The six sectors A-F can be divided into several levels according to the modulation degree, which is as follows: a first layer: m is 0.5, including 1, 2 cells in the a sector; a second layer: 1> m>0.5, including 3, 4, 5, 6 cells in sector a; a third layer; m is 1, including 5, 6 cells in the a sector; other B-F cells are divided into the same sectors as the sectors A;
step 3.3.2, a loss balance strategy is proposed according to the division level: layering is carried out according to the above, wherein the first layer is used as a class, and the second layer is used as a class; the first layer m is 0.5, and the right side of the beta axis is in a P, O state; the left side is in an N, O state; if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance; the second layer, 1> m >0.5, with the right side of the beta axis in the P, O state; the left side is in an N, O state; if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance; if the E sector or the left sector is taken as a starting point, at least the E sector or the left sector is taken as an integral multiple of a modulation period;
from the analysis of P to O, N to O states selection: the first option uses the beta axis as a boundary; the second option uses alpha, beta double axes as boundary lines; in the third selection, six sectors are taken as a whole, a vector distribution diagram is observed, any voltage vector is symmetrical through 180 degrees, and the fact that the PPN rotates through 180 degrees is shown to obtain NNP;
thus, the following results were obtained: the sectors A and D sweep the same area; the sectors B and E sweep the same area; the sectors C and F sweep the same area, and the same current conversion mode is adopted for the sectors with the same sweeping area; the cells 3, 4, 5 and 6 in each sector have a symmetrical relation with respect to the abscissa, i.e. the regular triangle and the inverted triangle are symmetrical;
step 3.3.3, flexibly selecting the working mode according to the modulation degree m, wherein m is 0.5, 1> m >0.5, and m is 1, and the three modes are respectively corresponding to:
the first mode is as follows: the beta axis is a boundary line, and the left and right zero states are respectively selected from OU1 and OL2, specifically: sector A: and respectively selecting left and right zero states: OU1 and any choice among OU1, OL 2; sector B: and respectively selecting left and right zero states: OU1 and OL 2; c sector: and respectively selecting left and right zero states: OL2 and any choice among OU1 and OL 2; sector D: and respectively selecting left and right zero states: OL2 and any choice among OU1 and OL 2; e sector: and respectively selecting left and right zero states: OL2 and OU 1; sector F: and respectively selecting left and right zero states: OU1 and any choice among OU1, OL 2;
and a second mode: on the basis of the mode one, the B, E sector zero state is respectively replaced by OL2 and OU1, and the rest is unchanged, specifically: sector B: and respectively selecting left and right zero states: OL2 and OL 2; e sector: and respectively selecting left and right zero states: OU1 and OU 1;
and a third mode: on the basis of the mode one, A, C, D, F sectors have zero states replaced by OL2, OU1, OU1 and OL2, and the rest is unchanged, specifically: sector A: and respectively selecting left and right zero states: OL2 and any one selected from OL2, OU1, OU1 and OL 2; c sector: and respectively selecting left and right zero states: OU1 and any choice among OL2, OU1, OU1 and OL 2; sector D: and respectively selecting left and right zero states: OU1 and any choice among OL2, OU1, OU1 and OL 2; sector F: and respectively selecting left and right zero states: OL2 and any of OL2, OU1, OU1 and OL 2.
The invention has the beneficial effects that: according to the loss balance modulation strategy of the three-level ANPC converter, different transition states are selected in different value ranges of modulation degrees according to the proposed loss balance strategy, the switching loss of each switching tube in the current conversion process can be effectively reduced, and the problems of short service life of each switching device and unbalanced loss of each power device in the prior art are solved.
Drawings
FIG. 1 is a topology diagram of a main circuit of a three-level active clamp type converter in a modulation strategy of loss balance of a three-level ANPC converter according to the invention;
FIG. 2 is a spatial vector distribution diagram in a modulation strategy for loss balancing of a three-level ANPC converter according to the present invention;
FIG. 3 is a diagram of a small vector division of the sector A in a modulation strategy for loss balancing of a three-level ANPC converter according to the present invention;
FIG. 4 is a schematic diagram of a seven-segment type wave-generating scheme in a modulation strategy for loss balancing of a three-level ANPC converter according to the present invention;
fig. 5 is a diagram of the current conversion mode of the ANPC converter in the modulation strategy of loss balance of the three-level ANPC converter of the present invention;
fig. 6 is an a- β coordinate division diagram of an modulation strategy for loss balancing of a three-level ANPC converter according to the present invention;
fig. 7 is a graph of losses of switching devices S1 to S4 in an embodiment of the present invention where m is 0.65 without a loss balancing strategy;
fig. 8 is a graph of losses of switching devices S1 to S4 with a loss balancing strategy of m 0.65 in an embodiment of the present invention;
fig. 9 is a graph of losses of switching devices S1 to S4 in an embodiment of the present invention, where m is 0.80 without a loss balancing strategy;
fig. 10 is a graph of losses of switching devices S1 to S4 with m 0.80 added to a loss balancing strategy in an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
The invention relates to a modulation strategy for loss balance of a three-level ANPC converter, which is implemented by the following steps:
step 1, obtaining a three-phase modulation wave according to a carrier pulse width modulation method, and then solving and outputting a, b and c three-phase switch states and respective action time thereof through a space vector pulse width modulation strategy; the method specifically comprises the following steps:
step 1.1, obtaining a three-phase modulation wave expression according to a carrier pulse width modulation method:
Figure GDA0002992298510000091
wherein, UmIs the amplitude of the three-phase voltage, Ua、UbAnd UcPhase voltages corresponding to three phases a, b and c are respectively provided, and omega is the angular frequency of the phase voltages of the three phases a, b and c;
step 1.2, synthesizing a reference voltage vector formula by the three-phase modulation wave obtained in step 1.1:
Figure GDA0002992298510000092
wherein,
Figure GDA0002992298510000093
step 1.3, respectively combining 27 different switch combinations in the inverter topology into three different switch states, and classifying the 27 switch combinations and the basic voltage vector; the method specifically comprises the following steps:
step 1.3.1, according to the topological structure of the three-level ANPC converter, defining the switching function as follows:
Figure GDA0002992298510000101
wherein, TxRepresents the x-th phase output, x is a or b or c, 1 represents P, 0 represents O, and-1 represents N, so that the three-phase switch combination has 3 in total3When the combination is 27, the space vector S of the three-level ANPC converter is obtainedkComprises the following steps:
Figure GDA0002992298510000102
wherein, UDCRepresents the input voltage on the dc side;
step 1.3.2, equivalently transforming the three-phase sinusoidal voltage into an alpha-beta static coordinate system by adopting coordinate transformation, and carrying out reference voltage vector V in step 1.2refDecomposing in alpha-beta static coordinate system according to reference voltage vector VrefThe included angle with the alpha axis is used for judging 6 large sectors from A to F and 6 cells from 1 to 6 corresponding to each large sector, and the classification of 27 switch combinations and basic voltage vectors is specifically as follows:
the combination of the corresponding switch states according to the voltage vector type is as follows: the long vector corresponds to PNN, PPN, NPN, NPP, NNP and PNP; the medium vector corresponds to PON, OPN, NPO, NOP, ONP and PNO; short vectors correspond to PPO, ONN, OPO, NON, OPP, NOO, OOP, NNO, POP, ONO, POO, ONN; the zero vector corresponds to PPP, OOO and NNN;
step 1.4, substituting the reference voltage vector into the action time of each selected voltage vector according to volt-second balance; the method specifically comprises the following steps:
setting a resultant reference voltage vector VrefThree space vectors U1、U2、U3Respectively corresponding to T1、T2、T3，TsPrinciple of balance by volt-second for fixed switching periodThe following can be obtained:
T1×U1+T2×U2+T3×U3＝Ts×Vref (5)
T1+T2+T3＝Ts (6)
respectively solving the action time T of each selected voltage vector1、T2、T3；
Sector a, cell 1, three space vectors U1、U2、U3Respectively as follows:
Figure GDA0002992298510000111
the following is obtained according to equation (5):
Figure GDA0002992298510000112
and (3) expanding the formula (8) and the formula (6) according to an Euler formula, and obtaining a solution by dividing the solution into a real part and an imaginary part:
Figure GDA0002992298510000113
wherein,
Figure GDA0002992298510000114
theta is a reference voltage vector VrefThe included angle with the alpha axis;
combining the A sector basic vector selection, wherein the A sector basic vector selection is as follows: the cell of the A sector 1 is represented by A1, and so on, the combination sequence of the corresponding switches in the area is as follows:
a1 corresponds to ONN, OON, OOO, POO, OOO, OON, ONN; a2 corresponds to OON, OOO, POO, PPO, POO, OOO, OON; a3 corresponds to ONN, OON, PON, POO, PON, OON, ONN; a4 corresponds to OON, PON, POO, PPO, POO, PON, ONO; a5 corresponds to ONN, PNN, PON, POO, PON, PNN, ONN; a6 corresponds to OON, PON, PPN, PPO, PPN, PON, OON;
substituting the formula (4) into the corresponding switch combination sequence of the area to obtain three space vectors corresponding to each cell, and solving the corresponding basic vector action time of each cell of the sector A by combining the formula (8) specifically as follows:
A1：
Figure GDA0002992298510000115
T2＝2mTssinθ；
Figure GDA0002992298510000116
A2：T1＝2mTssinθ；
Figure GDA0002992298510000117
A3：T1＝Ts[1-2msinθ]；
Figure GDA0002992298510000121
A4：
Figure GDA0002992298510000122
T3＝Ts[1-2msinθ]；
A5：
Figure GDA0002992298510000123
T3＝2mTssinθ；
A6：
Figure GDA0002992298510000124
T3＝Ts[2msinθ-1]；
the vector action time of each cell in the C and E sectors is the same as that of the A sector, and the vector action time of each cell in the B, D and F sectors is the same as that of the T of each cell in the A sector2And T3The action time of the vectors after mutual replacement corresponds to one;
step 2, adopting seven-segment wave generation and calculating the conduction time of each region, and carrying out current conversion control on the three-level ANPC converter; the method specifically comprises the following steps:
distributing the action time of the selected basic voltage vector to a corresponding vector by adopting seven-segment wave-sending, loading the action time of the basic voltage vector into a waveform sent by seven segments, and selecting the basic voltage vector information and the action time information according to the position information of the given basic voltage vector and each position so as to select a specific switch combination;
will fix the switching period TsThe sorting of the seven sections is that: the method comprises the following steps: t is1/4；②：T2/2；③：T3/2；④：T1/2；⑤：T3/2；⑥：T2/2；⑦：T1/4；
Then at a fixed switching period TsIn each sector, the on-time of each cell P, O, N is:
sector A: a1: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; a2: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a A3 and a2 are identical; a4: p state corresponding to sequence of segments (c), (d), and conduction time Ts-T1The state of/2 and O corresponds to (c) and the conduction time is T 12; a5, a6 and a4 are identical;
sector B: b1: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; b3 and B1 are identical; b2: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; b4 and B2 are identical; b5: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a B6: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3；
C sector:c1: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3(ii) a C4 and C1 are the same; c2: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; c3: the N state corresponds to the sequence of the third step, the fourth step, the conduction time is Ts-T1O state is corresponding to12; c5, C6 and C3 are identical;
sector D: d1: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; d2: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3(ii) a D3 and D2 are identical; d4: the N state corresponds to the sequence of the third step, the fourth step, the conduction time is Ts-T1O state is corresponding to12; d5, D6 and D4 are identical;
e sector: e1: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T 12; e3 and E1 are identical; e2: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; e4 and E2 are identical; e5: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3(ii) a E6: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2；
Sector F: f1: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a F4 and F1 are the same; f2: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T 12; f3: p state corresponding to sequence of segments (c), (d), and conduction time Ts-T1The state of/2 and O corresponds to (c) and the conduction time is T 12; f5, F6 and F3 are identical;
step 3, analyzing switching loss generated by a current conversion mode, and proposing a converter loss balance strategy; the method specifically comprises the following steps:
step 3.1, determining switching loss generated by a current conversion mode
(1) IGBT loss:
when the IGBT is in a conducting state, the internal impedance consumes electric energy, and conducting loss is generated; when the IGBT is in the switching process, the IGBT is switched on and off to consume electric energy, namely Eon and Eoff, so that switching loss is generated; then the total loss of the IGBT is turn-on loss, turn-on loss and turn-off loss;
(2) freewheeling diode loss
When the diode is in forward conduction, namely freewheeling, conduction loss is generated; when the diode is in the reverse recovery process, reverse recovery loss, namely Erec, is generated, and then the loss of the freewheeling diode is conduction loss plus reverse recovery loss; eon，Eoff，ErecThe method can be searched or calculated according to a data manual of the power switching tube;
step 3.2, analyzing the current conversion loss on the premise of the SVPWM control strategy according to the step 3.1;
and (b) analyzing phase conversion loss:
single-phase structure of three-level ANPC converter comprises direct-current power supply UDCAnd two capacitors C1And a capacitor C2Capacitor C1And a capacitor C2After being connected in series with a direct current power supply UDCThe bridge arm of the parallel three-level ANPC converter is formed by connecting fully-controlled IGBT switching tubes Sx1, Sx2, Sx3 and Sx4 in series, and the bridge arm of the parallel three-level ANPC converter is formed by connecting Sx1, Sx2, Sx3 and Sx4 in series and then connecting the bridge arm with a capacitor C after the bridge arm is connected with the capacitor C in series1And a capacitor C2The clamp switch bridge arms are connected in parallel, each clamp switch bridge arm is formed by connecting full-control IGBT switch tubes Sx5 and Sx6 in series, the full-control IGBT switch tubes Sx5 and Sx6 are connected in series and then connected with the full-control IGBT switch tubes Sx2 and Sx3 in parallel, and anti-parallel diodes on each full-control IGBT switch tube are respectively marked as D1, D2, D3, D4, D5 and D6;
from the P state to the OU1, OU2, OL1 and OL2 states, OU1, OU2, OL1 and OL2 are O states with four redundancy states, namely zero states, and the loss is: voltage state: p, when the voltage and the current are in the same direction: sx1 conduction loss, Sx2 conduction loss, and when the voltage and the current are reversed: d1 conduction loss, D2 conduction loss; voltage state: p to OU1, voltage, current co-current: sx1 turn-off loss, when voltage and current are reversed: d1 reverse recovery loss, Sx5 turn-on loss; voltage state: OU1 to P, voltage, current co-current: d5 reverse recovery loss, Sx1 turn-on loss, when voltage and current are reversed: sx5 turn-off loss; voltage state: OU1, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss; voltage state: p to OU2, voltage, current co-current: sx1 turn-off loss, when voltage and current are reversed: d1 reverse recovery loss, Sx5 turn-on loss; voltage state: OU2 to P, voltage, current co-current: d5 reverse recovery loss, Sx1 turn-on loss, when voltage and current are reversed: sx5 turn-off loss; voltage state: OU2, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss; voltage state: p to OL2, voltage, current co-current: sx2 turn-off loss, when voltage and current are reversed: d2 reverse recovery loss, Sx3 turn-on loss; voltage state: OL2 to P, voltage, current co-current: d3 reverse recovery loss, Sx2 turn-on loss, when voltage and current are reversed: sx3 turn-off loss; voltage state: OL2, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss;
from the N state to the OU1, OU2, OL1 and OL2 states, the loss is:
voltage state: n, when the voltage and the current are in the same direction: conduction losses of D4 and D3, when the voltage and current are reversed: sx3 and Sx4 conduction loss; voltage state: n to OU1, voltage, current co-current: d3 reverse recovery loss, Sx2 turn-on loss, when voltage and current are reversed: sx3 turn-off loss; voltage state: OU1 to N, voltage, current co-current: sx2 turn-off loss, when voltage and current are reversed: d2 reverse recovery loss, Sx3 turn-on loss; voltage state: OU1, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss; voltage state: n to OL1, voltage, current co-current: d4 reverse recovery loss, Sx6 turn-on loss, when voltage and current are reversed: sx4 turn-off loss; voltage state: OL1 to N, voltage, current co-current: sx6 turn-off loss, when voltage and current are reversed: d6 reverse recovery loss, Sx4 turn-on loss; voltage state: OL1, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss; voltage state: n to OL2, voltage, current co-current: d4 reverse recovery loss, Sx6 turn-on loss, when voltage and current are reversed: sx4 turn-off loss; voltage state: OL2 to N, voltage, current co-current: sx6 turn-off loss, when voltage and current are reversed: d6 reverse recovery loss, Sx4 turn-on loss; voltage state: OL2, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss;
depending on the output voltage level state, the load current direction and the order of state transitions are as follows, where P + represents: the output level is P, and the current direction is "+"; n-represents: the output level is N, the current direction is "-", and the mixed state situation is as follows:
p + to OU 1-there is Sx1 turn-off loss, Sx5 turn-on loss; OU 1-to P + has Sx1 turn-on loss, Sx5 turn-off loss; p-to OU1+ with D1 reverse recovery loss; OU1+ to P-with D5 reverse recovery loss; p + to OL 2-there is Sx2 turn-off loss, Sx3 turn-on loss; OL 2-to P + has Sx2 turn-on loss, Sx3 turn-off loss; P-to-OL 2+ with D2 reverse recovery loss; the presence of D3 reverse recovery loss from OL2+ to P-; n + to OU 1-there is D3 reverse recovery loss; OU 1-to N + with D2 reverse recovery loss; N-to-OU 1+ has Sx2 turn-on loss and Sx3 turn-off loss; OU1+ to N-has Sx2 turn-off loss and Sx3 turn-on loss; n + to OL 1-there is a D4 reverse recovery loss; OL 1-to N + with D6 reverse recovery loss; N-to-OL 1+ has Sx4 turn-off loss and Sx6 turn-on loss; OL1+ to N-there is Sx4 turn-on loss, Sx6 turn-off loss;
step 3.3, a loss balance strategy is provided according to the analysis result of the step 3.2, and the method is as follows:
step (ii) of3.3.1, setting the modulation degree as
Figure GDA0002992298510000151
The six sectors A-F can be divided into several levels according to the modulation degree, which is as follows:
a first layer: m is 0.5, including 1, 2 cells in the a sector; a second layer: 1> m >0.5, including 3, 4, 5, 6 cells in the a sector; a third layer; m is 1, including 5, 6 cells in the a sector; other B-F cells are divided into the same sectors as the sectors A;
step 3.3.2, proposing a loss balance strategy according to the division level
Layering is carried out according to the above, wherein the first layer is used as a class, and the second layer is used as a class;
the first layer m is 0.5, and the right side of the beta axis is in a P, O state; the left side is in an N, O state; if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance;
the second layer, 1> m >0.5, with the right side of the beta axis in the P, O state; the left side is in an N, O state;
if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance;
if the E sector or the left sector is taken as a starting point, at least the E sector or the left sector is taken as an integral multiple of a modulation period;
from the analysis of P to O, N to O states selection:
the first option uses the beta axis as a boundary; the second option uses alpha, beta double axes as boundary lines; in the third selection, six sectors are taken as a whole, a vector distribution diagram is observed, any voltage vector is symmetrical through 180 degrees, and the fact that the PPN rotates through 180 degrees is shown to obtain NNP;
thus, the following results were obtained:
the sectors A and D sweep the same area; the sectors B and E sweep the same area; the sectors C and F sweep the same area, and the same current conversion mode is adopted for the sectors with the same sweeping area;
the cells 3, 4, 5 and 6 in each sector have a symmetrical relation with respect to the abscissa, i.e. the regular triangle and the inverted triangle are symmetrical;
step 3.3.3, flexibly selecting the working mode according to the modulation degree m, wherein m is 0.5, 1> m >0.5, and m is 1, and the three modes are respectively corresponding to:
the first mode is as follows: the beta axis is a boundary line, and the left and right zero states are respectively selected from OU1 and OL2, specifically:
sector A: and respectively selecting left and right zero states: OU1 and not select; sector B: and respectively selecting left and right zero states: OU1 and OL 2; c sector: and respectively selecting left and right zero states: OL2 and no selection; sector D: and respectively selecting left and right zero states: OL2 and no selection; e sector: and respectively selecting left and right zero states: OL2 and OU 1; sector F: and respectively selecting left and right zero states: OU1 and not select;
and a second mode: on the basis of the mode one, the B, E sector zero state is respectively replaced by OL2 and OU1, and the rest is unchanged, specifically:
sector B: and respectively selecting left and right zero states: OL2 and OL 2; e sector: and respectively selecting left and right zero states: OU1 and OU 1;
and a third mode: on the basis of the mode one, A, C, D, F sectors have zero states replaced by OL2, OU1, OU1 and OL2, and the rest is unchanged, specifically:
sector A: and respectively selecting left and right zero states: OL2 and no selection; c sector: and respectively selecting left and right zero states: OU1 and not select; sector D: and respectively selecting left and right zero states: OU1 and not select; sector F: and respectively selecting left and right zero states: OL2 and no selection.
Example (b):
as shown in fig. 1, a schematic diagram of an active clamp type three-level converter according to the present invention is shown, which includes a three-phase ac portion (if a three-level inverter structure is adopted, the three-phase ac portion is a load), a three-level dc side external portion (if a three-level inverter structure is adopted, the dc side external portion is a dc voltage source, which may be an actual power source or a dc source obtained by rectifying an ac power source), a three-level ANPC converter main circuit portion, a voltage sensor, a current sensor, an a/D conversion chip, and a digital processor, the voltage sensor detects the voltage of a three-phase alternating current part and the voltage of each capacitor at a direct current side, the current sensor detects the current of each phase at the alternating current side, the voltage sensor and the current sensor are connected with the digital processor through the A/D conversion chip, and the digital processor controls the on-off of each power device in the three-level converter through the corresponding driving circuit.
The invention discloses a loss balance control strategy of a novel three-level ANPC converter, which is implemented according to the following steps:
step 1, obtaining a three-phase modulation wave according to a carrier pulse width modulation method, and then solving and outputting a, b and c three-phase switch states and respective action time thereof through a space vector pulse width modulation strategy; the method specifically comprises the following steps:
step 1.1, obtaining a three-phase modulation wave expression according to a carrier pulse width modulation method:
Figure GDA0002992298510000171
wherein, UmIs the amplitude of the three-phase voltage, Ua、UbAnd UcPhase voltages corresponding to three phases a, b and c are respectively provided, and omega is the angular frequency of the phase voltages of the three phases a, b and c;
step 1.2, synthesizing a reference voltage vector formula by the three-phase modulation wave obtained in step 1.1:
Figure GDA0002992298510000172
wherein,
Figure GDA0002992298510000173
step 1.3, respectively combining 27 different switch combinations in the inverter topology into three different switch states, and classifying the 27 switch combinations and the basic voltage vector; the method specifically comprises the following steps:
step 1.3.1, according to the topological structure of the three-level ANPC converter, defining the switching function as follows:
Figure GDA0002992298510000174
wherein, TxRepresents the x-th phase output, x is a or b or c, 1 represents P, 0 represents O, and-1 represents N, so that the three-phase switch combination has 3 in total3When the combination is 27, the space vector S of the three-level ANPC converter is obtainedkComprises the following steps:
Figure GDA0002992298510000175
wherein, UDCRepresents the input voltage on the dc side;
step 1.3.2, equivalently transforming the three-phase sinusoidal voltage into an alpha-beta static coordinate system by adopting coordinate transformation, and carrying out reference voltage vector V in step 1.2refDecomposing in alpha-beta static coordinate system according to reference voltage vector VrefJudging 6 large sectors of A-F and 6 cells of 1-6 corresponding to each large sector from an included angle of an alpha axis, dividing a voltage vector space distribution diagram into 6 sectors at 60 degrees, simultaneously dividing each sector into 6 cells, judging the sector according to the obtained angle, and judging the area swept by a given voltage vector by using a function in alpha and beta coordinates of each cell boundary;
1) determination of large sectors
Taking the center of the regular hexagon as a midpoint, in the counterclockwise direction, every 60 ° is divided into sectors, and the 360 ° divided into six sectors are sequentially divided into sectors A, B, C, D, E, F. During simulation, the horizontal coordinate and the vertical coordinate in the alpha-beta static coordinate system are converted into angles for judgment.
2) Judgment of small sector
As shown in fig. 3, taking sector a as an example for explanation, a sector is divided into six cells, VrefRespectively projected on the horizontal and vertical coordinates to obtain UαAnd UβSetting:
Uα＝cosθ，Uβ＝sinθ； (10)
when in use
Figure GDA0002992298510000181
When, VrefIn cell 1, 3, 5;
Figure GDA0002992298510000182
then VrefIn cell 1;
Figure GDA0002992298510000183
then it is in cell 5; otherwise, the cell is in a cell 3;
when in use
Figure GDA0002992298510000184
Time VrefIn cell 2, 4, 6;
Figure GDA0002992298510000185
then VrefIs in a cell 2;
Figure GDA0002992298510000186
then it is in cell 6; otherwise, the cell 4 is located;
the 27 switch combinations and the basic voltage vector were classified as shown in table 1:
TABLE 1
Figure GDA0002992298510000187
Step 1.4, substituting the reference voltage vector into the action time of each selected voltage vector according to volt-second balance; the method specifically comprises the following steps:
setting a resultant reference voltage vector VrefThree space vectors U1、U2、U3Respectively corresponding to T1、T2、T3，TsTo be fixedSwitching period, derived from volt-second equilibrium principle:
T1×U1+T2×U2+T3×U3＝Ts×Vref (5)
T1+T2+T3＝Ts (6)
respectively solving the action time T of each selected voltage vector1、T2、T3；
Sector a, cell 1, three space vectors U1、U2、U3Respectively as follows:
Figure GDA0002992298510000191
the following is obtained according to equation (5):
Figure GDA0002992298510000192
and (3) expanding the formula (8) and the formula (6) according to an Euler formula, and obtaining a solution by dividing the solution into a real part and an imaginary part:
Figure GDA0002992298510000193
wherein,
Figure GDA0002992298510000194
combining the selection of the basic vector of the sector A, as shown in Table 2, the acting time of the corresponding basic vector of each cell is solved:
TABLE 2
In the region of Switch combination sequence
A1 ONN，OON，OOO，POO，OOO，OON，ONN
A2 OON，OOO，POO，PPO，POO，OOO，OON
A3 ONN，OON，PON，POO，PON，OON，ONN
A4 OON，PON，POO，PPO，POO，PON，ONO
A5 ONN，PNN，PON，POO，PON，PNN，ONN
A6 OON，PON，PPN，PPO，PPN，PON，OON
TABLE 3A sector base vector action time
Figure GDA0002992298510000195
Figure GDA0002992298510000201
Step 2, adopting seven-segment wave generation and calculating the conduction time of each region, and carrying out current conversion control on the three-level ANPC converter;
p, O and N are respectively represented as 2, 1 and 0 represents the corresponding states, given voltage vector position information is obtained according to the previous steps, basic vector information and action time information are selected at each position so as to select a specific switch combination, taking sector a as an example, as shown in table 4:
TABLE 4A sector switch combination status
In the region of Switch combination sequence
A1 100，110，111，211，111，110，100
A2 110，111，211，221，211，111，110
A3 100，110，210，211，210，110，100
A4 110，210，211，221，211，210，110
A5 100，200，210，211，210，200，100
A6 110，210，220，221，220，210，110
Step 2.1, the seven-segment wave-sending is adopted to distribute the action time of the selected basic vector to the corresponding vector, the action time of the basic voltage vector is loaded into a waveform sent by the seven-segment wave-sending, and the basic vector information is selected according to the position information of the given voltage vector and each position and the action timeThe interval information selects a specific switch combination, and the period Ts is divided into seven sections to be sorted (i) to (c) respectively: the method comprises the following steps: t is1/4；②：T2/2；③：T3/2；④：T1/2；⑤：T3/2；⑥：T2/2；⑦：T1(ii)/4; as shown in fig. 4:
taking phase a as an example for explanation, calculate T per periodsThe occupied (on) time of the inner P, O and N is shown in the following table 5;
TABLE 5 on-time of each zone
Sector A:
Figure GDA0002992298510000202
sector B:
Figure GDA0002992298510000203
Figure GDA0002992298510000211
c sector:
Figure GDA0002992298510000212
sector D:
Figure GDA0002992298510000213
e sector:
Figure GDA0002992298510000214
sector F:
Figure GDA0002992298510000215
and 3, analyzing and calculating the conduction loss of each state, and providing a loss balance strategy of the converter.
Step 3.1, wherein the IGBT has loss in some aspects, is represented by:
(1) when the IGBT is in a conducting state, the internal impedance consumes electric energy, and conducting loss is generated;
(2) when the IGBT is in the switching process, the power consumption is E when the IGBT is switched on and switched offon，EoffSwitching losses are generated;
then the total loss of the IGBT is turn-on loss, turn-on loss and turn-off loss;
the freewheeling diode also has loss, and is represented by:
(1) when the diode is in forward conduction, namely (freewheeling), conduction loss is generated; (2) when the diode is in the reverse recovery process, the reverse recovery loss, namely E, is generatedrecIf the current-follow diode loss is conduction loss + reverse recovery loss;
Eon，Eoff，Erecthe method can be searched or calculated according to a data manual of the power switch tube.
Step 3.2, the commutation loss analysis is carried out on the premise of SVPWM control strategy, taking phase a as an example,
the loss distribution from P state to OU1, OU2, OL1 and OL2 states is shown in Table 6
TABLE 6 switching losses between different states
Figure GDA0002992298510000221
The loss distribution from the N state to the OU1, OU2 and OL1, OL2 states is shown in table 7:
TABLE 7 switching losses between different states
Figure GDA0002992298510000222
Figure GDA0002992298510000231
According to the output voltage level state, the following conditions exist in the load current direction and the sequence before and after state conversion:
p + represents: the output level is P, the current direction is "+", namely output; n-represents: the output level is N and the current direction is "-". The mixed state is as the following table, and the mixed state comprises 16 types (different level states and different current directions before and after conversion)
TABLE 8 switching losses between different states
P+→OU1- Sx1 turn-off loss Sx5 turn-on loss
OU1-→P+ Sx1 turn-on loss Sx5 turn-off loss
P-→OU1+ D1 reverse recovery loss
OU1+→P- D5 reverse recovery loss
P+→OL2- Sx2 turn-off loss Sx3 turn-on loss
OL2-→P+ Sx2 turn-on loss Sx3 turn-off loss
P-→OL2+ D2 reverse recovery loss
OL2+→P- D3 reverse recovery loss
TABLE 9 switching losses between different states
N+→OU1- D3 reverse recovery loss
OU1-→N+ D2 reverse recovery loss
N-→OU1+ Sx2 turn-on loss Sx3 offLoss of power
OU1+→N- Sx2 turn-off loss Sx3 turn-on loss
N+→OL1- D4 reverse recovery loss
OL1-→N+ D6 reverse recovery loss
N-→OL1+ Sx4 turn-off loss Sx6 turn-on loss
OL1+→N- Sx4 turn-on loss Sx6 turn-off loss
Step 3.3, a loss balance strategy is provided, and the loss generated in the current conversion process is balanced according to the loss balance strategy
Step 3.3.1 partitioning sector hierarchy according to modulation
(1) In order to avoid the disorder of the output voltage vectors, reduce the distortion probability of the output voltage waveform and reduce the switching loss, the voltage vectors generally act on the main circuit along a certain arrangement sequence.
(2) When the P-to-O-to-N state transition occurs, since there are four redundant states of the O state, i.e., multiple selection ways, in order to reduce switching loss, the same O state should be selected for the intermediate O state of the P-to-O, O-to-N state transition. If P is to OU1 and OU2 is to N, then there is a transition between OU1 to OU2 in the intermediate process, increasing the switching losses, which should be avoided. Therefore, there are the following divisions:
setting the modulation degree as
Figure GDA0002992298510000241
The six sectors can be divided into several layers according to the modulation degree; first layer, m is 0.5, taking a sector as an example, as shown in fig. 3: 1, 2 cells in sector A; second layer, 1> m ≧ 0.5, taken as sector A for example, containing 3, 4, 5, 6 cells, FIG. 3: 3, 4, 5, 6 cells in a sector; the third layer, where m is 1, takes an a sector as an example, and only includes 5, 6 cells, as shown in fig. 3: 5, 6 cells in a sector;
step 3.3.2 proposing a loss balancing strategy according to the division level
The first layer m is 0.5; from FIG. 6, it can be seen that: the right side of the beta axis is in a P, O state; the left side is in an N, O state; if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance;
the second layer, i.e. 1 m, is more than or equal to 0.5; from an observation of fig. 6: the right side of the beta axis is in a P, O state; the left side is in an N, O state; 1) if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance; 2) if the E sector or the left sector is taken as a starting point, at least the E sector or the left sector is taken as an integral multiple of a modulation period;
selecting according to the analysis of P to O, N to O states: the first option is shown in fig. 6(a) with the β axis as a boundary, the second option is shown in fig. 6(b) with the α, β axes as a boundary, and the third option is shown in six sectors as a whole, and a vector distribution diagram is observed, and an arbitrary voltage vector is symmetrical through 180 °. Description of the drawings: the NNP of the PPN rotated 180 is shown in FIG. 6 (c).
The following rule is thus obtained:
(1) sectors 1 and 4 sweep the same area; sectors 2 and 5 sweep the same area; the swept areas of the sectors 3 and 6 are the same, and the same commutation mode is adopted for the sectors with the same swept areas; (2) it should be noted that the number of cells swept affects the loss balance control; (3) the cells 3, 4, 5, 6 in each sector have a symmetrical relationship with respect to the abscissa, i.e. a regular triangle and an inverted triangle are symmetrical (O state), as detailed in the following table:
watch 10 regular triangle and reverse triangle symmetrical (O state)
Figure GDA0002992298510000251
And 3.3.3, flexibly selecting the working mode according to the modulation degree m.
The first mode is as follows: the beta axis is a boundary line, and the zero states on the left side and the right side are respectively selected from OU1 and OL2 as follows:
TABLE 11 modes one
Figure GDA0002992298510000252
Note: the zero states of the left and right sides of the beta axis of the B sector and the E sector are OL2 and OU1 respectively.
And a second mode: the B, E sector zero state is replaced with OL2, OU1 on a pattern one basis, respectively.
The following were used:
TABLE 12 mode two
Sector area A B C D E F
OU1 OL2 OL2 OL2 OU1 OU1
And a third mode: the A, C, D, F sector zero state on mode one basis is replaced with OL2, OU1, OU1, OL2, respectively. As follows
TABLE 13 MODE III
Figure GDA0002992298510000253
Figure GDA0002992298510000261
Fig. 7 and 8 are graphs of losses of the switching device without and with the loss balancing strategy, respectively, when the modulation degree m is 0.65, and fig. 9 and 10 are graphs of losses of the switching device without and with the loss balancing strategy, respectively, when the modulation degree m is 0.80. It can be seen from the simulation results that there is a certain error, wherein the influence of other factors is neglected in the simulation conditions, and compared with the loss before balance, the distribution is more uniform in one modulation period. The three-level ANPC inverter provides larger possibility for power device loss balance on the topological structure.

Claims (3)

1. A modulation strategy for loss balance of a three-level ANPC converter is characterized by being implemented according to the following steps:
step 1, obtaining a three-phase modulation wave according to a carrier pulse width modulation method, and then solving and outputting a, b and c three-phase switch states and respective action time thereof through a space vector pulse width modulation strategy;
step 2, adopting seven-segment wave generation and calculating the conduction time of each region, and carrying out current conversion control on the three-level ANPC converter;
step 3, analyzing switching loss generated by a current conversion mode, and proposing a converter loss balance strategy;
the step 1 specifically comprises the following steps:
step 1.1, obtaining a three-phase modulation wave expression according to a carrier pulse width modulation method:
Figure FDA0002992298500000011
wherein, UmIs the amplitude of the three-phase voltage, Ua、UbAnd UcPhase voltages corresponding to three phases a, b and c are respectively provided, and omega is the angular frequency of the phase voltages of the three phases a, b and c;
step 1.2, synthesizing a reference voltage vector formula by the three-phase modulation wave obtained in step 1.1:
Figure FDA0002992298500000012
wherein,
Figure FDA0002992298500000013
step 1.3, respectively combining 27 different switch combinations in the inverter topology into three different switch states, and classifying the 27 switch combinations and the basic voltage vector;
step 1.4, substituting the reference voltage vector into the action time of each selected voltage vector according to volt-second balance;
the step 1.3 is specifically as follows:
step 1.3.1, according to the topological structure of the three-level ANPC converter, defining the switching function as follows:
Figure FDA0002992298500000021
wherein, TxRepresents the x-th phase output, x is a or b or c, 1 represents P, 0 represents O, and-1 represents N, so that the three-phase switch combination has 3 in total3When the combination is 27, the space vector S of the three-level ANPC converter is obtainedkComprises the following steps:
Figure FDA0002992298500000022
wherein, UDCRepresents the input voltage on the dc side;
step 1.3.2, equivalently transforming the three-phase sinusoidal voltage into an alpha-beta static coordinate system by adopting coordinate transformation, and carrying out reference voltage vector V in step 1.2refDecomposing in alpha-beta static coordinate system according to reference voltage vector VrefThe included angle with the alpha axis is used for judging 6 large sectors from A to F and 6 cells from 1 to 6 corresponding to each large sector, and the classification of 27 switch combinations and basic voltage vectors is specifically as follows:
the combination of the corresponding switch states according to the voltage vector type is as follows:
the long vector corresponds to PNN, PPN, NPN, NPP, NNP and PNP;
the medium vector corresponds to PON, OPN, NPO, NOP, ONP and PNO;
short vectors correspond to PPO, ONN, OPO, NON, OPP, NOO, OOP, NNO, POP, ONO, POO, ONN;
the zero vector corresponds to PPP, OOO and NNN;
the step 1.4 is specifically as follows:
setting a resultant reference voltage vector VrefThree space vectors U1、U2、U3Respectively corresponding to T1、T2、T3，TsFor a fixed switching period, the principle of volt-second equilibrium can be used:
T1×U1+T2×U2+T3×U3＝Ts×Vref (5)
T1+T2+T3＝Ts (6)
respectively solving the action time T of each selected voltage vector1、T2、T3；
The step 1.4 is specifically as follows:
sector a, cell 1, three space vectors U1、U2、U3Respectively as follows:
Figure FDA0002992298500000031
the following is obtained according to equation (5):
Figure FDA0002992298500000032
and (3) expanding the formula (8) and the formula (6) according to an Euler formula, and obtaining a solution by dividing the solution into a real part and an imaginary part:
Figure FDA0002992298500000033
wherein,
Figure FDA0002992298500000034
theta is a reference voltage vector VrefThe included angle with the alpha axis;
combining the A sector basic vector selection, wherein the A sector basic vector selection is as follows: the cell of the A sector 1 is represented by A1, and so on, the combination sequence of the corresponding switches in the area is as follows:
a1 corresponds to ONN, OON, OOO, POO, OOO, OON, ONN;
a2 corresponds to OON, OOO, POO, PPO, POO, OOO, OON
A3 corresponds to ONN, OON, PON, POO, PON, OON, ONN;
a4 corresponds to OON, PON, POO, PPO, POO, PON, ONO;
a5 corresponds to ONN, PNN, PON, POO, PON, PNN, ONN;
a6 corresponds to OON, PON, PPN, PPO, PPN, PON, OON;
substituting the formula (4) into the corresponding switch combination sequence of the area to obtain three space vectors corresponding to each cell, and solving the corresponding basic vector action time of each cell of the sector A by combining the formula (8) specifically as follows:
A1：
Figure FDA0002992298500000041
T2＝2mTssinθ；
Figure FDA0002992298500000042
A2：T1＝2mTssinθ；
Figure FDA0002992298500000043
A3：T1＝Ts[1-2msinθ]；
Figure FDA0002992298500000044
A4：
Figure FDA0002992298500000045
T3＝Ts[1-2msinθ]；
A5：
Figure FDA0002992298500000046
T3＝2mTssinθ；
A6：
Figure FDA0002992298500000047
T3＝Ts[2msinθ-1]；
the vector action time of each cell in the C and E sectors is the same as that of the A sector, and the vector action time of each cell in the B, D and F sectors is the same as that of the T of each cell in the A sector2And T3The action time of the vectors after mutual replacement corresponds to one;
the step 2 specifically comprises the following steps:
distributing the action time of the selected basic voltage vector to a corresponding vector by adopting seven-segment wave-sending, loading the action time of the basic voltage vector into a waveform sent by seven segments, and selecting the basic voltage vector information and the action time information according to the position information of the given basic voltage vector and each position so as to select a specific switch combination;
will fix the switching period TsThe sorting of the seven sections is that: the method comprises the following steps: t is1/4；②：T2/2；③：T3/2；④：T1/2；⑤：T3/2；⑥：T2/2；⑦：T1/4；
Then at a fixed switching period TsIn each sector, the on-time of each cell P, O, N is:
sector A:
a1: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T1/2；
A2: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a A3 and a2 are identical;
a4: p state corresponding to sequence of segments (c), (d), and conduction time Ts-T1The state of/2 and O corresponds to (c) and the conduction time is T12; a5, a6 and a4 are identical;
sector B:
b1: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T12; b3 and B1 are identical;
b2: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T12; b4 and B2 are identical;
b5: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2；
B6: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3；
C sector:
c1: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3(ii) a C4 and C1 are the same;
c2: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T1/2；
C3: the N state corresponds to the sequence of the third step, the fourth step, the conduction time is Ts-T1O state is corresponding to12; c5, C6 and C3 are identical;
sector D:
d1: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T1/2；
D2: corresponding N state to T state1/2+T2O state corresponds to (r) and conduction time is T1/2+T3(ii) a D3 and D2 are identical;
d4: the N state corresponds to the sequence of the third step, the fourth step, the conduction time is Ts-T1O state is corresponding to12; d5, D6 and D4 are identical;
e sector:
e1: n state corresponds to segment sequence (c), conduction time is T1Per 2, O state corresponds to the fourths-T12; e3 and E1 are identical;
e2: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T12; e4 and E2 are identical;
e5: corresponding N state to sequence (III)The on time is T1/2+T2O state corresponds to (r) and conduction time is T1/2+T3；
E6: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2；
Sector F:
f1: p state corresponds to segment sequence (c), conduction time is T1/2+T3The O state corresponds to the seventh step, the conduction time is T1/2+T2(ii) a F4 and F1 are the same;
f2: p state corresponds to segment sequence, conduction time is T1The state of 2 and O corresponds to that of thirteen, and the conduction time is Ts-T1/2；
F3: p state corresponding to sequence of segments (c), (d), and conduction time Ts-T1The state of/2 and O corresponds to (c) and the conduction time is T12; f5, F6 and F3 are identical.
2. The modulation strategy for loss balancing of a three-level ANPC converter according to claim 1, wherein the step 3 is specifically:
step 3.1, determining switching loss generated by a current conversion mode
(1) IGBT loss:
when the IGBT is in a conducting state, the internal impedance consumes electric energy, and conducting loss is generated; when the IGBT is in the switching process, the IGBT is switched on and off to consume electric energy, namely Eon and Eoff, so that switching loss is generated; then the total loss of the IGBT is turn-on loss, turn-on loss and turn-off loss;
(2) freewheeling diode loss
When the diode is in forward conduction, namely freewheeling, conduction loss is generated; when the diode is in the reverse recovery process, reverse recovery loss, namely Erec, is generated, and then the loss of the freewheeling diode is conduction loss plus reverse recovery loss;
step 3.2, analyzing the current conversion loss on the premise of the SVPWM control strategy according to the step 3.1;
single-phase structure of three-level ANPC converter comprises direct-current power supplyUDCAnd two capacitors C1And a capacitor C2Capacitor C1And a capacitor C2After being connected in series with a direct current power supply UDCThe bridge arm of the parallel three-level ANPC converter is formed by connecting fully-controlled IGBT switching tubes Sx1, Sx2, Sx3 and Sx4 in series, and the bridge arm of the parallel three-level ANPC converter is formed by connecting Sx1, Sx2, Sx3 and Sx4 in series and then connecting the bridge arm with a capacitor C after the bridge arm is connected with the capacitor C in series1And a capacitor C2The clamp switch bridge arms are connected in parallel, each clamp switch bridge arm is formed by connecting full-control IGBT switch tubes Sx5 and Sx6 in series, the full-control IGBT switch tubes Sx5 and Sx6 are connected in series and then connected with the full-control IGBT switch tubes Sx2 and Sx3 in parallel, and anti-parallel diodes on each full-control IGBT switch tube are respectively marked as D1, D2, D3, D4, D5 and D6;
and (b) analyzing phase conversion loss:
from the P state to the OU1, OU2, OL1 and OL2 states, OU1, OU2, OL1 and OL2 are O states with four redundancy states, namely zero states, and the loss is:
voltage state: p, when the voltage and the current are in the same direction: sx1 conduction loss, Sx2 conduction loss, and when the voltage and the current are reversed: d1 conduction loss, D2 conduction loss;
voltage state: p to OU1, voltage, current co-current: sx1 turn-off loss, when voltage and current are reversed: d1 reverse recovery loss, Sx5 turn-on loss;
voltage state: OU1 to P, voltage, current co-current: d5 reverse recovery loss, Sx1 turn-on loss, when voltage and current are reversed: sx5 turn-off loss;
voltage state: OU1, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss;
voltage state: p to OU2, voltage, current co-current: sx1 turn-off loss, when voltage and current are reversed: d1 reverse recovery loss, Sx5 turn-on loss;
voltage state: OU2 to P, voltage, current co-current: d5 reverse recovery loss, Sx1 turn-on loss, when voltage and current are reversed: sx5 turn-off loss;
voltage state: OU2, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss;
voltage state: p to OL2, voltage, current co-current: sx2 turn-off loss, when voltage and current are reversed: d2 reverse recovery loss, Sx3 turn-on loss;
voltage state: OL2 to P, voltage, current co-current: d3 reverse recovery loss, Sx2 turn-on loss, when voltage and current are reversed: sx3 turn-off loss;
voltage state: OL2, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss;
from the N state to the OU1, OU2, OL1 and OL2 states, the loss is:
voltage state: n, when the voltage and the current are in the same direction: conduction losses of D4 and D3, when the voltage and current are reversed: sx3 and Sx4 conduction loss;
voltage state: n to OU1, voltage, current co-current: d3 reverse recovery loss, Sx2 turn-on loss, when voltage and current are reversed: sx3 turn-off loss;
voltage state: OU1 to N, voltage, current co-current: sx2 turn-off loss, when voltage and current are reversed: d2 reverse recovery loss, Sx3 turn-on loss;
voltage state: OU1, voltage, current co-current: d5, Sx2 conduction loss, when voltage and current are reversed: d2, Sx5 conduction loss;
voltage state: n to OL1, voltage, current co-current: d4 reverse recovery loss, Sx6 turn-on loss, when voltage and current are reversed: sx4 turn-off loss;
voltage state: OL1 to N, voltage, current co-current: sx6 turn-off loss, when voltage and current are reversed: d6 reverse recovery loss, Sx4 turn-on loss;
voltage state: OL1, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss;
voltage state: n to OL2, voltage, current co-current: d4 reverse recovery loss, Sx6 turn-on loss, when voltage and current are reversed: sx4 turn-off loss;
voltage state: OL2 to N, voltage, current co-current: sx6 turn-off loss, when voltage and current are reversed: d6 reverse recovery loss, Sx4 turn-on loss;
voltage state: OL2, voltage, current co-directional: d3, Sx6 conduction loss, when voltage and current are reversed: d6, Sx3 conduction loss;
depending on the output voltage level state, the load current direction and the order of state transitions are as follows, where P + represents: the output level is P, and the current direction is "+"; n-represents: the output level is N, the current direction is "-", and the mixed state situation is as follows:
p + to OU 1-there is Sx1 turn-off loss, Sx5 turn-on loss;
OU 1-to P + has Sx1 turn-on loss, Sx5 turn-off loss;
p-to OU1+ with D1 reverse recovery loss;
OU1+ to P-with D5 reverse recovery loss;
p + to OL 2-there is Sx2 turn-off loss, Sx3 turn-on loss;
OL 2-to P + has Sx2 turn-on loss, Sx3 turn-off loss;
P-to-OL 2+ with D2 reverse recovery loss;
the presence of D3 reverse recovery loss from OL2+ to P-;
n + to OU 1-there is D3 reverse recovery loss;
OU 1-to N + with D2 reverse recovery loss;
N-to-OU 1+ has Sx2 turn-on loss and Sx3 turn-off loss;
OU1+ to N-has Sx2 turn-off loss and Sx3 turn-on loss;
n + to OL 1-there is a D4 reverse recovery loss;
OL 1-to N + with D6 reverse recovery loss;
N-to-OL 1+ has Sx4 turn-off loss and Sx6 turn-on loss;
OL1+ to N-there is Sx4 turn-on loss, Sx6 turn-off loss;
and 3.3, providing a loss balance strategy according to the analysis result of the step 3.2.
3. The modulation strategy for loss balancing of a three-level ANPC converter according to claim 2, wherein the step 3.3 is specifically:
step 3.3.1, set the modulation degree to
Figure FDA0002992298500000101
The six sectors A-F can be divided into several levels according to the modulation degree, which is as follows:
a first layer: m is 0.5, including 1, 2 cells in the a sector;
a second layer: 1> m >0.5, including 3, 4, 5, 6 cells in the a sector;
a third layer; m is 1, including 5, 6 cells in the a sector;
other B-F cells are divided into the same sectors as the sectors A;
step 3.3.2, proposing a loss balance strategy according to the division level
Layering is carried out according to the above, wherein the first layer is used as a class, and the second layer is used as a class;
the first layer m is 0.5, and the right side of the beta axis is in a P, O state; the left side is in an N, O state; if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance;
the second layer, 1> m >0.5, with the right side of the beta axis in the P, O state; the left side is in an N, O state;
if the sector on the right side of the longitudinal axis is taken as a starting point, the sector is symmetrical left and right, and the sector is swept to the symmetrical area on the left side to realize balance;
if the E sector or the left sector is taken as a starting point, at least the E sector or the left sector is taken as an integral multiple of a modulation period;
from the analysis of P to O, N to O states selection:
the first option uses the beta axis as a boundary; the second option uses alpha, beta double axes as boundary lines; in the third selection, six sectors are taken as a whole, a vector distribution diagram is observed, any voltage vector is symmetrical through 180 degrees, and the fact that the PPN rotates through 180 degrees is shown to obtain NNP;
thus, the following results were obtained:
the sectors A and D sweep the same area; the sectors B and E sweep the same area; the sectors C and F sweep the same area, and the same current conversion mode is adopted for the sectors with the same sweeping area;
the cells 3, 4, 5 and 6 in each sector have a symmetrical relation with respect to the abscissa, i.e. the regular triangle and the inverted triangle are symmetrical;
step 3.3.3, flexibly selecting the working mode according to the modulation degree m, wherein m is 0.5, 1> m >0.5, and m is 1, and the three modes are respectively corresponding to:
the first mode is as follows: the beta axis is a boundary line, and the left and right zero states are respectively selected from OU1 and OL2, specifically:
sector A: and respectively selecting left and right zero states: OU1 and optionally select zero state in OU1 and OL 2;
sector B: and respectively selecting left and right zero states: OU1 and OL 2;
c sector: and respectively selecting left and right zero states: OL2 and optionally selecting zero state in OU1 and OL 2;
sector D: and respectively selecting left and right zero states: OL2 and optionally selecting zero state in OU1 and OL 2;
e sector: and respectively selecting left and right zero states: OL2 and OU 1;
sector F: and respectively selecting left and right zero states: OU1 and optionally select zero state in OU1 and OL 2;
and a second mode: on the basis of the mode one, the B, E sector zero state is respectively replaced by OL2 and OU1, and the rest is unchanged, specifically:
sector B: and respectively selecting left and right zero states: OL2 and OL 2;
e sector: and respectively selecting left and right zero states: OU1 and OU 1;
and a third mode: on the basis of the mode one, A, C, D, F sectors have zero states replaced by OL2, OU1, OU1 and OL2, and the rest is unchanged, specifically:
sector A: and respectively selecting left and right zero states: OL2 and optionally selecting zero state in OL2, OU1, OU1, OL 2;
c sector: and respectively selecting left and right zero states: OU1 and optionally selecting zero state in OL2, OU1, OU1, OL 2;
sector D: and respectively selecting left and right zero states: OU1 and optionally selecting zero state in OL2, OU1, OU1, OL 2;
sector F: and respectively selecting left and right zero states: OL2 and optionally zero states selected in OL2, OU1, OU1, OL 2.
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