CN116436324B - Full fault-tolerant ANPC three-level inverter and fault-tolerant control method thereof - Google Patents
Full fault-tolerant ANPC three-level inverter and fault-tolerant control method thereof Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/06—Circuits specially adapted for rendering non-conductive gas discharge tubes or equivalent semiconductor devices, e.g. thyratrons, thyristors
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/325—Means for protecting converters other than automatic disconnection with means for allowing continuous operation despite a fault, i.e. fault tolerant converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/505—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
- H02M7/515—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
- H02M7/521—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
- H02M7/53876—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times
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Abstract
The application discloses a full-capacity fault-tolerant ANPC three-level inverter and a fault-tolerant control method thereof, wherein corresponding topological structures and control algorithms are adjusted according to the types of fault switching tubes, and when a single outer tube is in open circuit fault, the on-off state of a thyristor is changed into a fault-phase two-level fault-tolerant topology; when the single internal switching tube fails in an open circuit, changing the position of two moving heads of the relay into a three-level topology of the open circuit fault of the fault phase clamping tube; determining a region and a basic vector influenced by a fault switch tube after topology switching; selecting action vectors from the basic voltage vectors according to the fault types respectively, and determining corresponding action time; and determining the action time of the switch state according to the action sequence and the action time of the basic vector, thereby generating PWM signals and controlling the on-off of the switch tube to complete fault-tolerant control. The application improves the reliability and stability of the three-level inverter system.
Description
Technical Field
The application belongs to the technical field of power generation, and particularly relates to a full-capacity fault-tolerant ANPC three-level inverter and a fault-tolerant control method thereof.
Background
With the development of power semiconductor devices such as IGBTs and MOSFETs and the progress of power electronics, the application field of inverters is changed from the driving of a low-voltage motor to a high-power converter in fans, compressors and the like, and multi-level inverters have become the research object of many scholars. The ANPC inverter thoroughly solves the problem of unbalanced loss faced by the traditional NPC inverter, so that the ANPC three-level inverter is widely applied to the field of medium-high voltage wind power generation. Compared with other traditional three-level inverters, the inverter system has higher possibility of failure in actual operation due to the fact that the topological structure of the ANPC type inverter is improved in complexity, the switching tubes are used in a large quantity and the like. Therefore, the open-circuit fault tolerance control method of the switching tube of the ANPC inverter is studied in depth, and has great significance for improving the fault tolerance of the system and further improving the stability of the wind power system, and meanwhile, the open-circuit fault tolerance control method of the switching tube of the ANPC inverter has high social and economic values.
At present, fault tolerance methods for open-circuit faults of an ANPC type three-level inverter are mainly divided into two types, namely hardware fault tolerance control and software fault tolerance control. The bridge arm level fault-tolerant control is a hardware fault-tolerant control method which is widely used at present. The bridge arm level fault-tolerant control method is to connect a redundant bridge arm in parallel beside a bridge arm which normally operates, and the fault-tolerant control is completed by replacing a fault bridge arm with a control strategy. Paper ANPC inverter fault diagnosis strategy and fault-tolerant control based on midpoint current provides a bridge arm level fault-tolerant mode of additionally connecting one-phase three-switch bridge arms in parallel, but the method cannot cope with the condition that a plurality of bridge arm switch tubes simultaneously fail, and increases the cost and control difficulty of an inverter system. The software fault-tolerant control utilizes redundant power switch elements in the inverter, and changes a control method according to the fault type of the inverter so as to realize fault-tolerant control of each fault type. The paper Multi Open-/Short-Circuit Fault-Tolerance Using Modified SVM Technique for Three-Level HANPC Converters proposes a Fault-tolerant control method for switching modulation signals, but the method can reduce the output power of the system instantaneously, and cause serious damage to a high-voltage and high-power inverter system.
Disclosure of Invention
The application aims to provide a full-capacity fault-tolerant ANPC three-level inverter and a fault-tolerant control method thereof.
The technical solution for realizing the purpose of the application is as follows: a full fault-tolerant type ANPC three-level inverter is provided, wherein two switching devices for topology reconstruction are additionally arranged in each phase of the three-level ANPC inverter, and the full fault-tolerant type ANPC three-level inverter specifically comprises:
relay S n : the relay is provided with four contacts and two movable heads, wherein the contacts are respectively a contact 1, a contact 1', a contact 2', the contacts 1 and 1' and an inner tube S k2 、S k3 The middle point is connected with the contacts 2 and 2' and the clamping tube S k5 、S k6 The middle point is connected with the two moving heads which are respectively connected with the two capacitors C at the direct current side 1 、C 2 The midpoint O is connected with the output ends of all phases of the inverter, and when the inverter has an open-circuit fault of an inner pipe, the clamping pipe and the inner pipe are changed by adjusting the positions of the two movable headsTube position, where n=1, 2, 3, k=a, b, c;
four bidirectional thyristors T p1 ~T p4 : bidirectional thyristor T p1 And T p4 Respectively with the outer tube S k1 、S k4 Parallel T p2 And T p3 Respectively with clamping tube S k5 、S k6 In series, when the inverter has an open-circuit fault of the outer tube, the bidirectional thyristor T is acted p1 、T p4 Outer tube S k1 、S k4 The open circuit fault is converted into a short circuit fault, and the bidirectional thyristor T is acted p2 、T p3 The fault phase is changed to an approximately two-level operating state, where p=a, b, c, k=a, b, c.
A fault-tolerant control method of a full-fault-tolerant ANPC inverter is based on the full-fault-tolerant ANPC three-level inverter for fault-tolerant control, and comprises the following steps:
step 1, carrying out thirty-six sector division on an ANPC type three-level inverter space voltage vector, and determining a basic vector action sequence and action time of each sector synthetic reference vector in normal operation;
step 2, switching into a fault-tolerant topological structure corresponding to the fault according to the type of the fault switching tube;
step 3, determining a basic vector sum area affected by a fault switch tube after topology switching;
step 4, reselecting an action vector from the basic voltage vectors according to the type of the fault switching tube, and determining corresponding vector action time and action sequence;
and step 5, determining the action time of the switch state according to the action sequence of the basic vectors and the action time of the basic vectors, so as to generate PWM signals and control the on-off of the switch tube to complete fault-tolerant control.
A fault-tolerant control system of a full-capacity fault-tolerant ANPC inverter realizes fault-tolerant control of the full-capacity fault-tolerant ANPC inverter based on the fault-tolerant control method of the full-capacity fault-tolerant ANPC inverter.
A computer device comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein when the processor executes the computer program, the processor realizes the fault-tolerant control of a full-fault-tolerant ANPC inverter based on the fault-tolerant control method of the full-fault-tolerant ANPC inverter.
A computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements fault-tolerant control of a full-fault-tolerant ANPC inverter based on the fault-tolerant control method of the full-fault-tolerant ANPC inverter.
Compared with the prior art, the application has the remarkable advantages that: 1) The proposed fault-tolerant topological structure is only added with the thyristors and the relays, so that the cost is low and the control difficulty is low; 2) The fault tolerance method can cope with open-circuit faults of the switching tube in the full power range, and the system does not need to be operated in a derating mode; 3) The application can complete the fault-tolerant control of all single outer pipe and single inner pipe open faults; 4) The fault-tolerant topology and fault-tolerant control method provided by the application do not cause serious damage to the capacitor, the midpoint voltage is stable, and the system can continuously and stably run.
Drawings
Fig. 1 is a topology diagram of an ANPC three-level inverter with fault tolerant capability.
Fig. 2 is a block diagram of fault-tolerant control of a full-fault-tolerant ANPC three-level inverter.
Fig. 3 is a space vector diagram of an ANPC three-level inverter.
FIG. 4 is a phase A outer tube S a1 Open circuit fault tolerance topology reconstruction.
FIG. 5 is a phase A inner tube S a2 Open circuit fault tolerance topology reconstruction.
Fig. 6 (a) shows that when the modulation index k=0.7, S a1 Three-phase current waveform diagram of open circuit fault, when fig. 6 (b) is modulation index k=0.7, S a1 A midpoint voltage waveform of an open circuit fault.
Fig. 7 (a) shows that when the modulation index k=0.7, S a1 Three-phase current waveform after fault tolerance of open circuit fault, when fig. 7 (b) is modulation index k=0.7, S a1 And a midpoint voltage waveform diagram after fault tolerance of the open circuit fault.
Fig. 8 (a) shows S when the modulation index k=0.7 a2 Open circuitThree-phase current waveform diagram of fault, when fig. 8 (b) is modulation index k=0.7, S a2 A midpoint voltage waveform of an open circuit fault.
Fig. 9 (a) shows that when the modulation index k=0.7, S a2 Three-phase current waveform after fault tolerance of open circuit fault, when fig. 9 (b) is modulation index k=0.7, S a2 The midpoint voltage waveform after fault tolerance of the open circuit fault.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
Fig. 1 is a full fault tolerant ANPC three level inverter topology. Equivalent of input side as voltage source U dc ；D a1 、D a2 、D a3 、D a4 、D a5 、D a6 、D b1 、D b2 、D b3 、D b4 、D b5 、D b6 、D c1 、D c2 、D c3 、D c4 、D c5 、D c6 Is a diode; c (C) 1 And C 2 Is a direct current side capacitor; s is S a1 、S a2 、S a3 、S a4 、S a5 、S a6 、S b1 、S b2 、S b3 、S b4 、S b5 、S b6 、S c1 、S c2 、S c3 、S c4 、S c5 、S c6 The power switch tube IGBT is adopted; t (T) a1 、T a2 、T a3 、T a4 、T b1 、T b2 、T b3 、T b4 、T c1 、T c2 、T c3 、T c4 Is a bidirectional thyristor; s is S 1 、S 2 、S 3 Is a relay.
Relay S n The four-contact type electric motor has four contacts and two movable heads, wherein the contacts are respectively a contact 1, a contact 1', a contact 2', the contacts 1 and 1' and an inner tube S k2 、S k3 Midpoint is connected with contacts 2, 2'And clamp tube S k5 、S k6 The middle point is connected with the two moving heads which are respectively connected with the two capacitors C at the direct current side 1 、C 2 The midpoint O is connected with the output ends of all phases of the inverter, when the inverter has an open circuit fault of an inner tube, the positions of the clamping tube and the inner tube are changed by adjusting the positions of the two moving heads, wherein n=1, 2 and 3, and k=a, b and c;
bidirectional thyristor T p1 And T p4 Respectively with the outer tube S k1 、S k4 Parallel T p2 And T p3 Respectively with clamping tube S k5 、S k6 In series, when the inverter has an open-circuit fault of the outer tube, the bidirectional thyristor T is acted p1 、T p4 Outer tube S k1 、S k4 The open circuit fault is converted into a short circuit fault, and the bidirectional thyristor T is acted p2 、T p3 The fault phase is changed to an approximately two-level operating state, where p=a, b, c, k=a, b, c.
Fig. 2 is a block diagram of a full fault tolerant three level ANPC inverter control. Three-phase current generated by the inverter is subjected to park conversion to obtain d-axis and q-axis current i d 、i q Respectively with artificially given d-axis reference current and q-axis reference current i d * 、i q * The difference is input into a PI controller to obtain a d-axis and q-axis voltage reference value U d 、U q The voltage reference value of the alpha and beta axes is obtained through dq/alpha beta transformationThe method comprises the steps of carrying out a first treatment on the surface of the Will->The input normal SVPWM module generates a signal for controlling the on-off of the IGBT gate. When in fault-tolerant operation, different fault-tolerant topologies and different SVPWM fault-tolerant modules are switched according to different fault types, so that +.>And inputting different fault-tolerant SVPWM modules to generate signals for controlling the on-off of the IGBT gate electrode, so as to complete fault-tolerant control. The application only considers the condition of open-circuit faults of the inner switching tube and the outer switching tube of one phase, and the fault-tolerant algorithm and the inner switching tube do not need to change the topological structure because the open-circuit faults of the clamping switching tubeThe open failure of the switching tubes is consistent and therefore is not considered by the present application. And when a default fault occurs, the diodes which are antiparallel with the switching tubes work normally.
Aiming at the line topology and the fault-tolerant control block diagram, the fault-tolerant control method of the full-capacity fault-tolerant ANPC inverter comprises the following steps:
step 1, carrying out thirty-six sector division on an ANPC type three-level inverter space voltage vector, and determining a basic vector action sequence and action time of each sector synthetic reference vector in normal operation:
(1) Performing thirty-six sector division on an ANPC type three-level inverter space voltage vector;
fig. 3 is a space vector diagram of an ANPC three-level inverter. As can be seen in fig. 3, the ANPC three-phase three-level inverter output 3 3 27 voltage state combinations, namely 27 switch states, respectively correspond to 27 space voltage vectors, including three zero vectors: v (V) 0P (PPP), V 0O (OOO), V 0N (NNN); 12 small vectors: v (V) 1P (POO), V 1N (ONN)；V 2P (PPO), V 2N (OON)；V 3P (OPO), V 3N (NON)；V 4P (OPP), V 4N (NOO)；V 5P (OOP), V 5N (NNO)；V 6P (POP), V 6N (ONO); 6 middle vectors: v (V) 7 (PON), V 8 (OPN), V 9 (NPO), V 10 (NOP), V 11 (ONP), V 12 (PNO); 6 large vectors:
V 13 (PNN), V 14 (PPN), V 15 (NPN), V 16 (NPP), V 17 (NNP), V 18 (PNP); the three letters P, O, N in the brackets respectively indicate the switching states of the three phases, the first letter indicates the switching state of the A phase, and the switching state "P" indicates the A phase S a1 、S a2 、S a6 Three switching tubes are conducted, and the switching state 'O' represents S when the A-phase current is in the forward direction a1 、S a3 、S a6 Or S in negative current a2 、S a4 、S a5 Three switching tubes are conducted, and the switching state 'N' represents A phase S a3 、S a4 、S a5 The three switching tubes are conducted, the second letter represents the switching state of B phase, and the switching state 'P' represents B phase S b1 、S b2 、S b6 Three switching tubes are conducted, and the switching state 'O' represents S when B-phase current is forward b1 、S b3 、S b6 Or S in negative current b2 、S b4 、S b5 Three switching tubes are conducted, and the switching state 'N' represents B phase S b3 、S b4 、S b5 The third letter represents the switching state of the C phase, and the switching state "P" represents the C phase Sc 1 、S c2 、S c6 Three switching tubes are conducted, and the switching state 'O' represents S when the C-phase current is forward c1 、S c3 、S c6 Or S in negative current c2 、S c4 、S c5 Three switching tubes are conducted, and the switching state 'N' represents A phase S c3 、S c4 、S c5 The three switching tubes are conducted; the small vectors are of two types, namely an N-type small vector and a P-type small vector, and V xN Is marked as N-type small vector, V xP Is marked as a P-type small vector, V xN And V is equal to xP Are redundant with each other, x=1, 2, 3, 4, 5, 6;
according to the three-phase space voltage vector state, the 27 space voltage vectors are corresponding to 19 basic vectors, namely zero vectors: v (V) 0 Small vector: v (V) 1 ,V 2 ,V 3 ,V 4 ,V 5 ,V 6 Medium vector: v (V) 7 ,V 8 , V 9 , V 10 , V 11 , V 12 Large vector: v (V) 13 , V 14 , V 15 , V 16 , V 17 , V 18 The method comprises the steps of carrying out a first treatment on the surface of the Basic vector V 0 Corresponding space voltage vector V 0P (PPP)、V 0O (OOO)、V 0N (NNN); basic vector V 1 Corresponding space voltage vector V 1P (POO), V 1N (ONN); basic vector V 2 Corresponding space voltage vector V 2P (PPO), V 2N (OON); basic vector V 3 Corresponding space voltage vector V 3P (OPO), V 3N (NON). Basic vector V 4 Corresponding space voltage vector V 4P (OPP), V 4N (NOO); basic vector V 5 Corresponding space voltage vector V 5P (OOP), V 5N (NNO); basic vector V 6 Corresponding space voltage vector V 6P (POP), V 6N (ONO); basic vector V 7 Corresponding space voltage vector V 7 (PON); basic vector V 8 Corresponding space voltage vector V 8 (OPN); basic vector V 9 Corresponding space voltage vector V 9 (NPO); basic vector V 10 Corresponding space voltage vector V 10 (NOP); basic vector V 11 Corresponding space voltage vector V 11 (ONP); basic vector V 12 Corresponding space voltage vector V 12 (PNO); basic vector V 13 Corresponding space voltage vector V 13 (PNN); basic vector V 14 Corresponding space voltage vector V 14 (PPN); basic vector V 15 Corresponding space voltage vector V 15 (NPN); basic vector V 16 Corresponding space voltage vector V 16 (NPP); basic vector V 17 Corresponding space voltage vector V 17 (NNP); basic vector V 18 Corresponding space voltage vector V 18 (PNP)。
The alpha axis is taken as a reference, the space vector hexagon is sequentially rotated by 60 degrees anticlockwise, the space vector hexagon is divided into 6 large sectors I, II, III, IV, V, VI, and each large sector is divided into 6 small areas (1, 2, 3, 4, 5 and 6) through three straight lines connecting the midpoints of the sides of the large sector triangle and a 30-degree angle branching line passing through an origin O, and the space vector hexagon is divided into 36 small areas in total.
The reference vector in each triangle cell is synthesized from three base vectors starting with the vertex of the triangle cell as the end point and the O-point.
(2) Determining the vector action sequence of the synthesized reference vector of each sector under normal conditions to obtain the basic vector sequence of each sector;
according to the seven-segment vector synthesis principle, the basic vector acting sequence of each sector is shown in table 1;
TABLE 1 order of basic vector action for sectors
(3) Determining the basic vector acting time of the synthesized reference vector of each sector in normal operation;
first, a modulation degree is calculated:，V ref for three-phase voltage reference voltage vector, V dc The reference voltage vector amplitude and the direct current side voltage relationship in the three-level inverter system are represented by the direct current side output voltage and k is a modulation degree;
then, determining the acting time of the basic vector of each sector according to the table 2;
TABLE 2 base vector on time in large sector I, II
Wherein T is s In order to sample the period of time,for reference voltage vector V ref Is a argument of (2);
according to the volt-second balance principle, the basic vector action time of the synthesized reference vector is as follows:wherein V is n1 Representing the first base vector in a sequence of base vectors, T 1 Representing the basis vector V n1 V is as follows n2 Representing the second base vector in the sequence of base vectors, T 2 Representing the basis vector V n2 V is as follows n3 Representing the third base vector in the sequence of base vectors, T 3 Representing the basis vector V n3 Is used for the action time of the (a);
the basic vector acting time of each area in the sectors I, III and V is equal, and the basic vector acting time of each area in the sectors II, IV and VI is equal.
Step 2, switching into a fault-tolerant topological structure for coping with the faults according to the types of the fault switching tubes;
when the system is operating normally, the relay S n The two moving heads of (a) are contacted with contacts 1', 2, and a thyristor T p1 、T p4 Turn-off, thyristor T p2 、T p3 Closing. At this time, switch tube S k2 、S k3 The middle point is connected with the output end and is an inner tube of the inverter; switch tube S k5 、S k6 The midpoint is connected with the midpoint O of the direct-current side capacitor and is an inverter clamping tube. The topology is identical to a three-level ANPC inverter topology. When an open-circuit fault occurs in a phase switching tube, the switching states of switching devices of two-phase bridge arms without the open-circuit fault are the same as those of the system in normal operation, and the actions of the switching devices of fault phases corresponding to the open-circuit faults of different switching tubes are shown in table 3:
TABLE 3 operation of switching devices of the faulty phase corresponding to open faults of different switching tubes
When an open circuit fault occurs in the outer tube of the one-phase bridge arm, the relay S n The two moving heads are contacted with the contacts 1', 2, and the thyristor T p1 Or T p4 Closing, thyristor T p2 、T p3 、T p4 Or T p1 、T p2 、T p3 And (5) switching off. At this time, the fault phase changes to S k2 、S k3 、S k4 Or S k1 、S k2 、S k3 Is a two-level full fault tolerant topology;
when an open circuit fault occurs in the inner tube of the one-phase bridge arm, the relay S n The two moving heads are switched to be contacted with the contacts 1 and 2', and the switching states of the other thyristors are the same as those of the normal operation of the system. At this time, the clamping tube in the fault phase is converted into a bridge arm inner tube, the original bridge arm inner tube is converted into the clamping tube, the switching between the fault phase inner tube and the clamping tube is completed, and the full fault-tolerant topology of the inner tube fault is changed.
In step 3, determining a basic vector and a region influenced by a fault switching tube after topology switching;
(1) Determining a base vector affected by a faulty switching tube after switching topology
A. When an external switching tube has an open-circuit fault in one phase, after the fault-tolerant topological structure for coping with the fault is switched, the fault phase is converted into an approximate two-level bridge arm with two levels of output P, N, the fault phase lacks an O switching state, and 27 space vectors lack a middle vector with two O switching states of the fault phase and 6 small vectors with O switching states of the fault phase; the affected basis vectors after the outer pipe failover topology are determined according to table 4:
TABLE 4 affected basis vectors after an outer pipe failover topology
When S is a1 Or S a4 When the pipe is in open circuit fault, the affected basic vector has a fault middle vector V 8 (OPN), vector in failure V 11 (ONP), fault small vector V 3P (OPO), fault small vector V 4P (OPP), fault small vector V 5P (OOP), fault small vector V 6N (ONO), fault small vector V 1N (ONN), fault small vector V 2N (OON)；
When S is b1 Or S b4 When the pipe is in open circuit fault, the affected basic vector has a fault middle vector V 7 (PON), vector V in failure 10 (NOP), fault small vector V 2N (OON), fault small vector V 3N (NON), fault small vector V 4N (NOO), fault small vector V 5P (OOP), fault small vector V 6P (POP), fault small vector V 1P (POO)；
When S is c1 Or S c4 When the pipe is in open circuit fault, the affected basic vector has a fault middle vector V 9 (NPO) Vector V in failure 12 (PNO) Fault small vector V 4N (NOO) Fault small vector V 5N (NNO) Fault small vector V 6N (ONO) Therefore (b) it isObstacle small vector V 1P (POO) Fault small vector V 2P (PPO) Fault small vector V 3P (OPO)；
B. When an internal switching tube open-circuit fault occurs in one phase, after the switching is switched to a fault-tolerant topological structure for coping with the fault, three switching states P, O, N are still generated, and no fault basic vector exists;
(2) Determining an area affected by a faulty switching tube after switching topology
A. Dividing the area affected by the fault outer tube into an area affected by the fault small vector only, an area affected by the fault small vector and the fault middle vector and having no large vector in the original basic vector sequence, and an area affected by the fault small vector and the fault middle vector and having a large vector in the original basic vector sequence; the affected area after the outer pipe failover topology is determined according to table 5:
TABLE 5 affected area after an outer pipe failover topology
When S is a1 Or S a4 When the pipe is in open circuit fault, the area affected by the small vector is the 3-6 area of I, III, IV, VI sector, the area affected by the small vector and the middle vector of the fault and without large vector in the original basic vector sequence is the 3-4 area of II and V sector, the area affected by the small vector and the middle vector of the fault and with large vector in the original basic vector sequence is the 5-6 area of II and V sector;
when S is b1 Or S b4 When the pipe is in open circuit fault, the area affected by the small vector is the 3-6 area of the II, III, V, VI sector, the area affected by the small vector and the middle vector of the fault and without the large vector in the original basic vector sequence is the 3-4 area of the I, IV sector, and the area affected by the small vector and the middle vector of the fault and with the large vector in the original basic vector sequence is the 5-6 area of the I, IV sector;
when S is c1 Or S c4 When the pipe has open circuit fault, the area affected by the small vector is the 3-6 area of I, II, IV, V sector, and the area affected by the small vector and the middle vector of the faultThe areas without large vectors in the original basic vector sequence are 3 and 4 areas of the III and VI sectors, the areas affected by the small vectors and the middle vectors of the faults and the areas with large vectors in the original basic vector sequence are 5 and 6 areas of the III and VI sectors;
B. when an open circuit fault of an internal switching tube occurs in one phase, after the fault-tolerant topological structure is switched to the fault-tolerant topological structure for coping with the fault, no fault basic vector exists and no area is affected by the fault vector.
In step 4, reselecting the action vector from the basic voltage vector according to the fault type, and determining the action time and the action sequence of the vector;
A. when one-phase outer tube has open circuit fault
For the region affected by the fault small vector only, discarding the fault small vector, replacing the region by a redundant vector of the fault small vector, and reordering the region based on a symmetry principle to realize fault-tolerant control of the region;
for the region affected by the fault small vector and the middle vector and without the large vector in the basic vector sequence, discarding the fault small vector, and replacing the fault small vector with the redundant vector of the fault small vector; simultaneously, two adjacent large vectors of the fault middle vector are used for compensating the middle vector, and the fault tolerance control of the area is realized based on the reordering of symmetry principles;
for the region affected by the fault small vector and the middle vector and having a large vector in the basic vector sequence, discarding the fault small vector, and replacing the fault small vector with a redundant vector of the fault small vector; and meanwhile, the large vector in the basic vector sequence is used for carrying out equal beta-axis compensation on the centering vector, and the reordering is carried out based on the symmetry principle, so that the fault tolerance control of the region is realized.
B. When an open circuit fault occurs in one-phase inner tube
After switching the fault-tolerant topology which deals with such faults, the inner pipe S is connected k2 Or S k3 Conversion of open circuit fault into clamp tube S k5 Or S k6 Open circuit failure, when the three-level inverter will miss the O-switch state O used for commutation U2 I.e. switching tube S k2 、S k4 、S k5 On or switch state O L2 I.e. switching tube S k1 、S k3 、S k6 Conducting. To cope with such switching tube faults, an inner tube S may be utilized k3 Or S k2 Providing a path for zero level using switch state O L1 : switch tube S k3 、S k6 On or switch state O U1 : switch tube S k2 、S k5 And the conduction is conducted to replace the missing O state, so that the fault tolerance process is completed.
In step 5, according to the basic vector acting sequence and the basic vector acting time, the acting time of the switch state is determined, so that PWM signals are generated, and the on-off of the switch tube is controlled to complete fault-tolerant control;
according to the basic vector acting sequence and the basic vector acting time, the acting time of a switching state is determined, the DPWM technology is adopted to modulate the acting time of the switching state and a triangular carrier wave with the frequency being the switching frequency of the switching tube, so that PWM signals are generated, and the switching tube is controlled to be switched on or off to complete fault-tolerant control.
A fault-tolerant control system of a full-capacity fault-tolerant ANPC inverter realizes fault-tolerant control of the full-capacity fault-tolerant ANPC inverter based on the fault-tolerant control method of the full-capacity fault-tolerant ANPC inverter.
A computer device comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein when the processor executes the computer program, the processor realizes the fault-tolerant control of a full-fault-tolerant ANPC inverter based on the fault-tolerant control method of the full-fault-tolerant ANPC inverter.
A computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements fault-tolerant control of a full-fault-tolerant ANPC inverter based on the fault-tolerant control method of the full-fault-tolerant ANPC inverter.
According to the fault type of the switching tube, the application reconstructs the topology of the ANPC type three-level inverter and the SVPWM control algorithm, and the switching device with increased topology has low cost, small control difficulty and simplicity and easiness in realization. The fault-tolerant control method of the full-capacity fault-tolerant ANPC inverter can realize fault-tolerant control of the open-circuit fault of the single switching tube of the ANPC three-level inverter, recover the distortion current, avoid serious damage of capacitance, ensure that the system does not need to be operated in a derating mode, and improve the reliability and the stability of the three-level inverter system.
Example 1
In this embodiment, S is the modulation degree k=0.7 a1 For example, when the tube fails open, the tube S is switched a1 When the tube fails in an open circuit, as shown in FIG. 6 (a), the positive half period of the A phase current is severely distorted, the B phase current and the C phase current are slightly distorted, S a1 The tube cannot complete the turn-on operation and the inverter system cannot output the high level P. Due to the loss of the P-type small vector, the P, N-type small vector is out of balance and the midpoint voltage is out of balance as shown in fig. 6 (b). At this time, the upper and lower capacitor voltages will increase and decrease with time, which will cause serious damage to the capacitor. In addition, as the midpoint voltage is out of balance, the three-phase current waveform no longer maintains three-phase symmetry over time, and damage to loads such as a power grid or a motor is caused. After the fault type is determined, the fault type is switched to a fault-tolerant topological structure and a fault-tolerant algorithm, and the results are shown in fig. 7 (a) and 7 (b).
As can be seen from fig. 7 (a), after the fault-tolerant topology and fault-tolerant algorithm are switched, the a-phase current is recovered, the three-phase current is recovered to be approximately sinusoidal, and The Harmonic Distortion (THD) of the three-phase current after fault tolerance is respectively: 6.38%, 3.11% and 4.68%. As can be seen from fig. 7 (b), the upper and lower capacitor voltages are not increased any more, the midpoint voltage is stabilized to be approximately half of the dc voltage to fluctuate, the upper and lower capacitor voltages have about 1.5%, the dc side capacitor is not severely damaged, the three-phase currents maintain three-phase symmetry, and the system can continue to operate stably.
Example 2
In this embodiment, S is the modulation degree k=0.7 a2 For example, when the tube fails open, the tube S is switched a2 When the open circuit fault occurs in the tube for 0.3S, as shown in the graph of FIG. 8 (a), the positive half period of the A phase current is severely distorted, S a2 The tube cannot complete the turn-on operation and the inverter system cannot output the high level P. Due to the loss of the P-type small vector, the P, N-type small vector is out of balance and the midpoint voltage is out of balance as shown in fig. 8 (b). At this time, the upper and lower capacitor voltages will be infinitely variable over timeThe degree is increased and reduced, and the capacitor is seriously damaged. In addition, as the midpoint voltage is out of balance, the three-phase current waveform no longer maintains three-phase symmetry over time, and damage to loads such as a power grid or a motor is caused. After the fault type is determined, the fault type is switched to a fault-tolerant topological structure and a fault-tolerant algorithm, and the results are shown in fig. 9 (a) and 9 (b).
As can be seen from fig. 9 (a), after the fault-tolerant topology and fault-tolerant algorithm are switched for 0.6s, the a-phase current is recovered, the three-phase current is recovered to be completely sinusoidal, as can be seen from fig. 9 (b), the midpoint voltage is inhibited, the upper and lower capacitor voltages are stabilized to be approximately half of the direct-current voltage to fluctuate, the direct-current side capacitor is not increased to any extent, the direct-current side capacitor is not severely damaged, the three-phase current is maintained to be three-phase symmetrical, and the system can continuously and stably run.
The two embodiments show that the method provided by the application can complete the fault-tolerant control of the open-circuit faults of the switching tubes in one phase and the switching tubes out of the system.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.
Claims (7)
1. The fault-tolerant control method of the full-capacity fault-tolerant ANPC inverter is characterized in that two switching devices for topology reconstruction are additionally added to each phase of the full-capacity fault-tolerant ANPC three-level inverter, and the method specifically comprises the following steps:
relay S n : the relay is provided with four contacts and two movable heads, wherein the contacts are respectively a contact 1, a contact 1', a contact 2', the contacts 1 and 1' and an inner tube S k2 、S k3 The middle point is connected with the contacts 2 and 2' and the clamping tube S k5 、S k6 The middle point is connected with the two moving heads which are respectively connected with the two capacitors C at the direct current side 1 、C 2 The midpoint O is connected with the output ends of all phases of the inverter, when the inverter has an open circuit fault of an inner tube, the positions of the clamping tube and the inner tube are changed by adjusting the positions of the two moving heads, wherein n=1, 2 and 3, and k=a, b and c;
four bidirectional thyristors T p1 ~T p4 : bidirectional thyristor T p1 And T p4 Respectively with the outer tube S k1 、S k4 Parallel T p2 And T p3 Respectively with clamping tube S k5 、S k6 In series, when the inverter has an open-circuit fault of the outer tube, the bidirectional thyristor T is acted p1 、T p4 Outer tube S k1 、S k4 The open circuit fault is converted into a short circuit fault, and the bidirectional thyristor T is acted p2 、T p3 Phase transition of the fault to a two-level operating state, wherein p=a, b, c, k=a, b, c;
outer tube S k1 And an inner tube S k2 In series, an inner tube S k3 And an outer tube S k4 In series, an inner tube S k3 Upper end and inner tube S k2 The lower end is connected with a clamping tube S k5 And a clamping tube S k6 Series connection of clamping tubes S k5 Upper end and outer tube S k1 The lower end is connected with a clamping tube S k6 Lower end and outer tube S k4 The upper ends are connected;
based on the full fault-tolerant ANPC three-level inverter, fault-tolerant control is carried out, and the method comprises the following steps:
step 1, carrying out thirty-six sector division on an ANPC type three-level inverter space voltage vector, and determining a basic vector action sequence and action time of each sector synthetic reference vector in normal operation;
step 2, switching into a fault-tolerant topological structure corresponding to the fault according to the type of the fault switching tube;
step 3, determining a basic vector sum area affected by a fault switch tube after topology switching;
step 4, reselecting an action vector from the basic voltage vectors according to the type of the fault switching tube, and determining corresponding vector action time and action sequence;
step 5, determining the action time of the switch state according to the action sequence of the basic vectors and the action time of the basic vectors, so as to generate PWM signals and control the on-off of the switch tube to complete fault-tolerant control;
wherein,,
thirty-six sector division is carried out on the space voltage vector of the ANPC type three-level inverter, and the specific method is as follows:
ANPC three-phase three-level inverter output 3 3 27 voltage state combinations, namely 27 switch states, respectively correspond to 27 space voltage vectors, including three zero vectors: v (V) 0P (PPP), V 0O (OOO), V 0N (NNN); 12 small vectors: v (V) 1P (POO), V 1N (ONN)；V 2P (PPO), V 2N (OON)；V 3P (OPO), V 3N (NON)；V 4P (OPP), V 4N (NOO)；V 5P (OOP), V 5N (NNO)；V 6P (POP), V 6N (ONO); 6 middle vectors: v (V) 7 (PON), V 8 (OPN), V 9 (NPO), V 10 (NOP), V 11 (ONP), V 12 (PNO); 6 large vectors:
V 13 (PNN), V 14 (PPN), V 15 (NPN), V 16 (NPP), V 17 (NNP), V 18 (PNP); the three letters P, O, N in the brackets respectively indicate the switching states of the three phases, the first letter indicates the switching state of the A phase, and the switching state "P" indicates the A phase S a1 、S a2 、S a6 Three switching tubes are conducted, and the switching state 'O' represents S when the A-phase current is in the forward direction a1 、S a3 、S a6 Or S in negative current a2 、S a4 、S a5 Three switching tubes are conducted, and the switching state 'N' represents A phase S a3 、S a4 、S a5 The three switching tubes are conducted, the second letter represents the switching state of B phase, and the switching state 'P' represents B phase S b1 、S b2 、S b6 Three ofThe switch tube is conducted, and the switch state 'O' represents S when the B-phase current is forward b1 、S b3 、S b6 Or S in negative current b2 、S b4 、S b5 Three switching tubes are conducted, and the switching state 'N' represents B phase S b3 、S b4 、S b5 Three switching tubes are conducted, the third letter represents the switching state of the C phase, and the switching state 'P' represents the S of the C phase c1 、S c2 、S c6 Three switching tubes are conducted, and the switching state 'O' represents S when the C-phase current is forward c1 、S c3 、S c6 Or S in negative current c2 、S c4 、S c5 Three switching tubes are conducted, and the switching state 'N' represents C phase S c3 、S c4 、S c5 The three switching tubes are conducted; the small vectors are of two types, namely an N-type small vector and a P-type small vector, and V xN Is marked as N-type small vector, V xP Is marked as a P-type small vector, V xN And V is equal to xP Are redundant with each other, x=1, 2, 3, 4, 5, 6;
according to the three-phase space voltage vector state, the 27 space voltage vectors are corresponding to 19 basic vectors, namely zero vectors: v (V) 0 Small vector: v (V) 1 ,V 2 ,V 3 ,V 4 ,V 5 ,V 6 Medium vector: v (V) 7 ,V 8 , V 9 , V 10 , V 11 , V 12 Large vector: v (V) 13 , V 14 , V 15 , V 16 , V 17 , V 18 The method comprises the steps of carrying out a first treatment on the surface of the Basic vector V 0 Corresponding space voltage vector V 0P (PPP)、V 0O (OOO)、V 0N (NNN); basic vector V 1 Corresponding space voltage vector V 1P (POO), V 1N (ONN); basic vector V 2 Corresponding space voltage vector V 2P (PPO), V 2N (OON); basic vector V 3 Corresponding space voltage vector V 3P (OPO), V 3N (NON); basic vector V 4 Corresponding space voltage vector V 4P (OPP), V 4N (NOO); basic vector V 5 Corresponding space voltage vector V 5P (OOP), V 5N (NNO); basic vector V 6 Corresponding space voltage vector V 6P (POP), V 6N (ONO); basic vector V 7 Corresponding space voltage vector V 7 (PON); basic vector V 8 Corresponding space voltage vector V 8 (OPN); basic vector V 9 Corresponding space voltage vector V 9 (NPO); basic vector V 10 Corresponding space voltage vector V 10 (NOP); basic vector V 11 Corresponding space voltage vector V 11 (ONP); basic vector V 12 Corresponding space voltage vector V 12 (PNO); basic vector V 13 Corresponding space voltage vector V 13 (PNN); basic vector V 14 Corresponding space voltage vector V 14 (PPN); basic vector V 15 Corresponding space voltage vector V 15 (NPN); basic vector V 16 Corresponding space voltage vector V 16 (NPP); basic vector V 17 Corresponding space voltage vector V 17 (NNP); basic vector V 18 Corresponding space voltage vector V 18 (PNP)；
The alpha axis is taken as a reference, the alpha axis is sequentially rotated anticlockwise for 60 degrees, 6 large sectors I, II, III, IV, V, VI are obtained, the large sectors are divided into 6 small areas 1, 2, 3, 4, 5 and 6, and 36 small areas are obtained in total;
the method for determining the basic vector and the area influenced by the fault switching tube after topology switching comprises the following steps:
(1) Determining a base vector affected by a faulty switching tube after switching topology
A. When an external switching tube has an open-circuit fault in one phase, after the fault-tolerant topological structure for coping with the fault is switched, the fault phase is converted into a two-level bridge arm outputting P, N two levels, the fault phase lacks an O switching state, and 27 space vectors lack a middle vector with O switching states of the two fault phases and 6 small vectors with O switching states of the fault phase; the affected basis vectors after the outer pipe failover topology are determined according to table 4:
TABLE 4 affected basis vectors after an outer pipe failover topology
；
When S is a1 Or S a4 When the pipe is in open circuit fault, the affected basic vector has a fault middle vector V 8 (OPN), vector in failure V 11 (ONP), fault small vector V 3P (OPO), fault small vector V 4P (OPP), fault small vector V 5P (OOP), fault small vector V 6N (ONO), fault small vector V 1N (ONN), fault small vector V 2N (OON)；
When S is b1 Or S b4 When the pipe is in open circuit fault, the affected basic vector has a fault middle vector V 7 (PON), vector V in failure 10 (NOP), fault small vector V 2N (OON), fault small vector V 3N (NON), fault small vector V 4N (NOO), fault small vector V 5P (OOP), fault small vector V 6P (POP), fault small vector V 1P (POO)；
When S is c1 Or S c4 When the pipe is in open circuit fault, the affected basic vector has a fault middle vector V 9 (NPO) Vector V in failure 12 (PNO) Fault small vector V 4N (NOO) Fault small vector V 5N (NNO) Fault small vector V 6N (ONO) Fault small vector V 1P (POO) Fault small vector V 2P (PPO) Fault small vector V 3P (OPO)；
B. When an internal switching tube open-circuit fault occurs in one phase, after the switching is switched to a fault-tolerant topological structure for coping with the fault, three switching states P, O, N are still generated, and no fault basic vector exists;
(2) Determining an area affected by a faulty switching tube after switching topology
A. Dividing the area affected by the fault outer tube into an area affected by the fault small vector only, an area affected by the fault small vector and the fault middle vector and having no large vector in the original basic vector sequence, and an area affected by the fault small vector and the fault middle vector and having a large vector in the original basic vector sequence; the affected area after the outer pipe failover topology is determined according to table 5:
TABLE 5 affected area after an outer pipe failover topology
；
When S is a1 Or S a4 When the pipe is in open circuit fault, the area affected by the small vector is the 3-6 area of I, III, IV, VI sector, the area affected by the small vector and the middle vector of the fault and without large vector in the original basic vector sequence is the 3-4 area of II and V sector, the area affected by the small vector and the middle vector of the fault and with large vector in the original basic vector sequence is the 5-6 area of II and V sector;
when S is b1 Or S b4 When the pipe is in open circuit fault, the area affected by the small vector is the 3-6 area of the II, III, V, VI sector, the area affected by the small vector and the middle vector of the fault and without the large vector in the original basic vector sequence is the 3-4 area of the I, IV sector, and the area affected by the small vector and the middle vector of the fault and with the large vector in the original basic vector sequence is the 5-6 area of the I, IV sector;
when S is c1 Or S c4 When the pipe is in open circuit fault, the area affected by the small vector is the 3-6 area of I, II, IV, V sector, the area affected by the small vector and the middle vector of the fault and without large vector in the original basic vector sequence is the 3-4 area of III and VI sector, the area affected by the small vector and the middle vector of the fault and with large vector in the original basic vector sequence is the 5-6 area of III and VI sector;
B. when an open circuit fault of an internal switching tube occurs in one phase, after the fault-tolerant topological structure is switched to the fault-tolerant topological structure for coping with the fault, no fault basic vector exists and no area is affected by the fault vector.
2. The fault-tolerant control method of a full-fault-tolerant type ANPC inverter according to claim 1, wherein step 1, performing thirty-six sector division on an ANPC three-level inverter space voltage vector, determining a basic vector acting sequence and acting time of each sector synthetic reference vector during normal operation, wherein determining the vector acting sequence of each sector synthetic reference vector under normal conditions, and obtaining a basic vector sequence of each sector comprises the following specific steps:
according to the seven-segment vector synthesis principle, the basic vector acting sequence of each sector is shown in table 1;
TABLE 1 order of basic vector action for sectors
。
3. The fault-tolerant control method of a full-fault-tolerant type ANPC inverter according to claim 1, wherein step 1, performing thirty-six sector division on an ANPC three-level inverter space voltage vector, determining a basic vector acting order and acting time of each sector synthetic reference vector in normal operation, wherein determining the basic vector acting time of each sector synthetic reference vector in normal operation comprises the following specific steps:
first, a modulation degree is calculated:，V ref for the amplitude of the three-phase voltage reference voltage vector, V dc The reference voltage vector amplitude and the direct current side output voltage in the three-level inverter system are represented by the relation of the direct current side output voltage, wherein k is a modulation degree;
then, determining the acting time of the basic vector of each sector according to the table 2;
TABLE 2 base vector on time in large sector I, II
；
Wherein T is s In order to sample the period of time,for reference voltage vector V ref Is a argument of (2);
synthesizing reference vectors according to the volt-second balance principleThe basic vector action time of (2) is as follows:wherein V is n1 Representing the first base vector in a sequence of base vectors, T 1 Representing the basis vector V n1 V is as follows n2 Representing the second base vector in the sequence of base vectors, T 2 Representing the basis vector V n2 V is as follows n3 Representing the third base vector in the sequence of base vectors, T 3 Representing the basis vector V n3 Is used for the action time of the (a);
the basic vector acting time of each area in the sectors I, III and V is equal, and the basic vector acting time of each area in the sectors II, IV and VI is equal.
4. The fault-tolerant control method of a full-scale fault-tolerant ANPC inverter according to claim 1, wherein in step 2, according to the type of the fault switching tube, the fault-tolerant topology is switched to correspond to the fault, and the specific method is as follows:
during normal operation, relay S n The two moving heads of (a) are contacted with contacts 1', 2, and a thyristor T p1 、T p4 Turn-off, thyristor T p2 、T p3 Closing, at this time, the switch tube S k2 、S k3 The middle point is connected with the output end and is an inverter inner tube and a switch tube S k5 、S k6 The midpoint is connected with the midpoint O of the direct-current side capacitor and is an inverter clamping tube, namely a three-level ANPC inverter topology; when the open-circuit fault occurs in the fault phase switching tube, the switching states of the switching devices of the two-phase bridge arm which do not have the open-circuit fault are the same as those of the system in normal operation, and the actions of the switching devices of the fault phase corresponding to the open-circuit fault of different switching tubes are shown in table 3:
TABLE 3 operation of switching devices of the faulty phase corresponding to open faults of different switching tubes
；
When an open circuit fault occurs in the outer tube of the one-phase bridge arm, the relay S n The two moving heads are contacted with the contacts 1', 2, and the thyristor T p1 Or T p4 Closing, thyristor T p2 、T p3 、T p4 Or T p1 、T p2 、T p3 Turn off, at this time, the fault phase changes to S k2 、S k3 、S k4 Or S k1 、S k2 、S k3 Is a two-level full fault tolerant topology;
when an open circuit fault occurs in the inner tube of the one-phase bridge arm, the relay S n The two moving heads are in contact with the contacts 1 and 2', the switching states of the other thyristors are the same as those of the normal operation of the system, at the moment, the clamping tube in the fault phase is converted into a bridge arm inner tube, the original bridge arm inner tube is converted into the clamping tube, the switching between the fault phase inner tube and the clamping tube is completed, and the full fault-tolerant topology of the inner tube fault is changed.
5. The fault-tolerant control method of a full-fault-tolerant ANPC inverter according to claim 1, wherein in step 4, the method for determining the vector acting time and acting sequence by reselecting the acting vector from the basic voltage vectors according to the type of the fault switching tube is as follows:
A. when one-phase outer tube has open circuit fault
For the region affected by the fault small vector only, discarding the fault small vector, replacing the region by a redundant vector of the fault small vector, and reordering the region based on a symmetry principle to realize fault-tolerant control of the region;
for the region affected by the fault small vector and the middle vector and without the large vector in the basic vector sequence, discarding the fault small vector, and replacing the fault small vector with the redundant vector of the fault small vector; simultaneously, two adjacent large vectors of the fault middle vector are used for compensating the middle vector, and the fault tolerance control of the area is realized based on the reordering of symmetry principles;
for the region affected by the fault small vector and the middle vector and having a large vector in the basic vector sequence, discarding the fault small vector, and replacing the fault small vector with a redundant vector of the fault small vector; meanwhile, the large vector in the basic vector sequence is used for carrying out equal beta-axis compensation on the centering vector, and the reordering is carried out based on the symmetry principle, so that the fault tolerance control of the region is realized;
B. when an open circuit fault occurs in one-phase inner tube
Make the switch tube S k3 、S k6 Conduction or switching tube S k2 、S k5 And conducting, and replacing the missing O state to complete the fault tolerance process.
6. The fault-tolerant control method of a full-scale fault-tolerant ANPC inverter according to claim 1, wherein in step 5, the action time of the switching state is determined according to the basic vector action sequence and the basic vector action time, so as to generate a PWM signal, and the switching tube is controlled to be turned on or turned off to complete fault-tolerant control, and the specific method comprises:
according to the basic vector acting sequence and the basic vector acting time, the acting time of the switch state is determined, the DPWM technology is adopted to modulate the acting time of the switch state and the triangular carrier wave, so that PWM signals are generated, and the on-off of the switch tube is controlled to complete fault-tolerant control.
7. A fault-tolerant control system of a full-fault-tolerant ANPC inverter, characterized in that fault-tolerant control of the full-fault-tolerant ANPC inverter is implemented based on the fault-tolerant control method of the full-fault-tolerant ANPC inverter according to any one of claims 1-6.
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| CN109120167A (en) * | 2018-08-15 | 2019-01-01 | 南京理工大学 | The two level PWM rectifier fault tolerant control methods based on sector buffering |
| CN112104214A (en) * | 2020-08-19 | 2020-12-18 | 同济大学 | Self-adaptive fault-tolerant control method for compound open-circuit fault of three-level inverter switching tube |
| CN115528902A (en) * | 2022-11-29 | 2022-12-27 | 南京理工大学 | Outer tube open-circuit fault tolerance control method for NPC (neutral point clamped) type three-level rectifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109120167A (en) * | 2018-08-15 | 2019-01-01 | 南京理工大学 | The two level PWM rectifier fault tolerant control methods based on sector buffering |
| CN112104214A (en) * | 2020-08-19 | 2020-12-18 | 同济大学 | Self-adaptive fault-tolerant control method for compound open-circuit fault of three-level inverter switching tube |
| CN115528902A (en) * | 2022-11-29 | 2022-12-27 | 南京理工大学 | Outer tube open-circuit fault tolerance control method for NPC (neutral point clamped) type three-level rectifier |
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