CN111313697B - Average current detection circuit applied to DC-DC converter - Google Patents
Average current detection circuit applied to DC-DC converter Download PDFInfo
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- CN111313697B CN111313697B CN201811516649.3A CN201811516649A CN111313697B CN 111313697 B CN111313697 B CN 111313697B CN 201811516649 A CN201811516649 A CN 201811516649A CN 111313697 B CN111313697 B CN 111313697B
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- nmos tube
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0009—Devices or circuits for detecting current in a converter
Abstract
The invention provides an average current detection circuit applied to a DC-DC converter, which relates to the field of integrated circuits, and comprises an average current sampling module, a current conversion module and an integral comparison module which are sequentially connected, wherein the average current sampling module comprises a high-side current detection circuit, a resistor R31 and an NMOS (N-channel metal oxide semiconductor) tube MN 31; the current conversion module comprises an operational amplifier U1, an NMOS transistor MN32 and a resistor R32; the integral comparison module comprises a PMOS tube MP32, a switch S31, a capacitor C31, an NMOS tube MN41, a comparator U2, an NMOS tube MN42, a capacitor C41 and a switch S32; the average current detection circuit of the invention does not influence the conversion efficiency, can switch the PWM mode and the PFM mode of the DC-DC at a constant load current, and has high conversion efficiency, stronger universality and accuracy.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to an average current detection circuit applied to a DC-DC converter.
Background
In the DC-DC buck converter, the pulse width modulation mode (PWM mode) has high conversion efficiency at the time of heavy load and low conversion efficiency at the time of light load, and the pulse frequency modulation mode (PFM mode) has high conversion efficiency at the time of light load. In order to improve the conversion efficiency of a light load, a heavy load generally operates in a PWM mode, and a light load generally operates in a PFM mode, so that a load current detection circuit is generally required to switch the PWM mode and the PFM mode at a suitable fixed load current, so that the chip has a high conversion efficiency in the whole load range.
The traditional load current detection methods are mainly divided into two types:
(1) as shown in fig. 1, a sampling resistor Rsense is connected in series to the output terminal, and the current Isense can be estimated by detecting the voltage drop Vsense across the sampling resistor Rsense.
(2) 1/K MOS using one power tubeThe tube is used for sampling the current (T) of the power tubeONIn the time period, the transient current in the power tube Is equal to the inductor current), an operational amplifier clamps the drain voltages of the power tube and the sampling tube to be equal to each other, as shown in fig. 2, VA Is VB, Ron _ Mpower IL Is Ron _ Msense, so Is (Ron _ Mpower/Ron _ Msene) IL Is IL/K, and the sampled current Is 1/K of the current flowing through the power tube M1.
The method (1) has the disadvantages that the conversion efficiency of the serial sampling resistor Rsense is greatly reduced on a power transmission path, the on-state resistance Rdson of a general power tube is about 10-300 ohms, if a 100-ohm sampling resistor Rsense is connected in series, the performance of the power tube is greatly influenced, the 100-ohm sampling resistor Rsense is difficult to have high enough precision, and in addition, an additional chip pin is required to be added, so that the method (1) is rarely used in practical application; the drawback of the method (2) is that only the peak current can be obtained, as shown in fig. 5, since the peak current is composed of the DC current and the ripple current, which varies with the input voltage, the output voltage and the inductance value, the peak current does not truly reflect the average current. In DCM (discontinuous current mode), the current is zero for a period of time in each cycle, and the peak current is much less representative of the average current.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention is directed to an average current detection circuit applied to a DC-DC converter, which does not affect the conversion efficiency, and can switch the PWM mode and the PFM mode at a constant load current for the DC-DC converter, and which can be applied to both CCM (continuous current mode) and DCM (discontinuous current mode), and has high conversion efficiency, strong versatility and accuracy.
To achieve the above and other related objects, the present invention provides an average current detecting circuit applied to a DC-DC converter, the average current detection circuit comprises an average current sampling module, a current conversion module and an integral comparison module which are connected in sequence, the average current sampling module comprises a high-side current detection circuit connection resistor R31 and an NMOS tube MN31, 1/2 × Ton generation circuit connected to NMOS transistor MN31, and sampling capacitor Cs, the current conversion module includes operational amplifier U1 connected to NMOS transistor MN31, an NMOS tube MN32 connected with the operational amplifier U1, a resistor R32, a PMOS tube MP31 connected with the NMOS tube MN32, the integral comparison module comprises a PMOS tube MP32 connected with a PMOS tube MP31, a switch S31 connected with the PMOS tube MP32, a capacitor C31 connected with the switch S31, an NMOS tube MN41, a comparator U2, an NMOS tube MN42 connected with the comparator U2, a capacitor C41 and a switch S32.
Furthermore, the 1/2 × Ton generating circuit includes an NMOS transistor M51, a capacitor C51, an NMOS transistor M52, a comparator U3, a current bias Ib, and a current bias 2 × Ib, wherein drains of the NMOS transistor M51 and the NMOS transistor M52 are connected to a negative input terminal of the comparator U3, meanwhile, a drain of the NMOS transistor M51 is connected to the current bias Ib, a source of the NMOS transistor M51 is grounded via the capacitor C51, a source of the NMOS transistor M52 is connected to the current bias 2 × Ib, and pulse signals are respectively input to gates of the NMOS transistor M51 and the NMOS transistor M52.
Further, the resistor R31 of the average current sampling module is connected to the drain of the NMOS transistor MN31, the source of the NMOS transistor MN31 is connected to the positive input terminal of the comparator U1 and the sampling capacitor Cs, and the gate of the NMOS transistor MN31 is connected to the output terminal of the comparator U3 of the 1/2 × Ton generating circuit.
Further, the positive input end of the operational amplifier U1 of the current conversion module is connected with the source of the NMOS transistor MN31, the negative input end of the operational amplifier U1 is connected with the source of the resistor R32 and the NMOS transistor MN32, the output end of the operational amplifier U1 is connected with the gate of the NMOS transistor MN32, and the drain of the NMOS transistor MN32 is connected with the drain and the gate of the PMOS transistor MP 31.
Furthermore, the gate of a PMOS transistor MP32 of the integral comparison module is connected to the gate and the drain of a PMOS transistor MP31, the drain of a PMOS transistor MP32 is connected to a switch S31, the switch S31 is further connected to a capacitor C31, the drain of an NMOS transistor MM41, and the positive input terminal of a comparator U2, the negative input terminal of the comparator U2 is connected to the drain of an NMOS transistor MN42, the capacitor C41, and the switch S32, and pulse signals are respectively input to the gates of the NMOS transistor MN41 and the MOS transistor MN 42.
As described above, the average current detection circuit applied to the DC-DC converter according to the present invention has the following advantages: the invention does not influence the conversion efficiency, can lead the DC-DC to switch the PWM mode and the PFM mode at a constant load current, and in addition, the circuit can be simultaneously suitable for CCM and DCM, and has high conversion efficiency, stronger universality and accuracy.
Drawings
FIG. 1 is a circuit diagram of a conventional series resistor current detection circuit disclosed in the prior art of the present invention;
FIG. 2 is a diagram of a conventional MOS sampling current detection circuit disclosed in the prior art of the present invention;
FIG. 3 is a circuit diagram of the average current detection disclosed in the embodiment of the present invention;
fig. 4 shows a circuit diagram of 1/2 × Ton generation disclosed in the embodiment of the present invention;
fig. 5 shows a current integration diagram of the average current detection disclosed in the embodiment of the present invention;
fig. 6 is a schematic voltage comparison diagram of the average current detection disclosed in the embodiment of the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
As shown in fig. 3, an average current detection circuit applied to a DC-DC converter includes an average current sampling module, a current conversion module and an integral comparison module, which are connected in sequence, where the average current sampling module includes a high-side current detection circuit connection resistor R31, an NMOS tube MN31, an 1/2 at generating circuit connected to the NMOS tube MN31, and a sampling capacitor Cs, the current conversion module includes an operational amplifier U1 connected to the NMOS tube MN31, an NMOS tube MN32 connected to the operational amplifier U1, a resistor R32, a PMOS tube MP31 connected to the NMOS tube MN32, and the integral comparison module includes a PMOS tube MP32 connected to the PMOS tube MP31, a switch S31 connected to the PMOS tube MP32, a capacitor C31 connected to the switch S31, an NMOS tube MN41, a comparator U2, an NMOS tube MN42 connected to the comparator U2, a capacitor C41 and a switch S32.
As shown in fig. 4, the 1/2 × Ton generating circuit includes an NMOS transistor M51, a capacitor C51, an NMOS transistor M52, a comparator U3, a current bias Ib, and a current bias 2 × Ib, wherein drains of the NMOS transistor M51 and the NMOS transistor M52 are connected to a negative input terminal of the comparator U3, a drain of the NMOS transistor M51 is connected to the current bias Ib, a source of the NMOS transistor M51 is grounded via the capacitor C51, a source of the NMOS transistor M52 is connected to the current bias 2 × Ib, and gates of the NMOS transistor M51 and the NMOS transistor M52 respectively input pulse signals.
Further, the resistor R31 of the average current sampling module is connected to the drain of the NMOS transistor MN31, the source of the NMOS transistor MN31 is connected to the positive input terminal of the comparator U1 and the sampling capacitor Cs, and the gate of the NMOS transistor MN31 is connected to the output terminal of the comparator U3 of the 1/2 × Ton generating circuit.
Further, the positive input end of the operational amplifier U1 of the current conversion module is connected with the source of the NMOS transistor MN31, the negative input end of the operational amplifier U1 is connected with the source of the resistor R32 and the NMOS transistor MN32, the output end of the operational amplifier U1 is connected with the gate of the NMOS transistor MN32, and the drain of the NMOS transistor MN32 is connected with the drain and the gate of the PMOS transistor MP 31.
Furthermore, the gate of a PMOS transistor MP32 of the integral comparison module is connected to the gate and the drain of a PMOS transistor MP31, the drain of a PMOS transistor MP32 is connected to a switch S31, the switch S31 is further connected to a capacitor C31, the drain of an NMOS transistor MM41, and the positive input terminal of a comparator U2, the negative input terminal of the comparator U2 is connected to the drain of an NMOS transistor MN42, the capacitor C41, and the switch S32, and pulse signals are respectively input to the gates of the NMOS transistor MN41 and the MOS transistor MN 42.
The working principle of the invention is as follows: firstly, a high-side current detection circuit generates a high-side switch tube current (namely an inductor current), and a proportional current Isense (1/K) IL, which is an inductor DC current plus an inductor ripple current, flows through a resistor R31 to obtain a voltage Vsense (Isense) R31; then 1/2 Ton generating circuit generates current to turn on NMOS tube MN31, so that sampling capacitor Cs is kept at Vsense voltage at 1/2 Ton, i.e. Vsamp (1/2 Ton), and Vsamp (1/K) IL _ DC R31; finally, the operational amplifier U1, the NMOS transistor MN32, and the resistor R32 convert Vsamp into a current, the current is copied through the PMOS transistor MP31 and the PMOS transistor MP32 to obtain Iave, where Iave ═ Vsamp/R32, the current is proportional to the inductor DC current (1/K) ═ IL _ DC ═ R31/R32, and if R31 ═ R32, then Iave ═ IL _ DC is provided.
The integration comparison module integrates the current Isamp and the reference current Iref, as shown in fig. 6, the current Isamp and the reference current Iref are integrated in a period Ts, the period Ts is divided into a first period Ts1 and a second period Ts2, the integrated voltage is compared, the comparison process is completed in two periods, the Iref is integrated in the first period, the switch S31 is turned off when the period Ts1 is ended, and the voltage of the capacitor C41 is kept at the voltage value at the moment when the period Ts1 is ended, and the voltage value is used as the reference voltage VREF(ii) a In the second period Ts2, switch S32 is opened, Iave starts charging capacitor C31 until VRAMPTo reach VREFComparator U2 flips to indicate that the inductor current has reached the set reference current. If the comparator U2 is not turned over when Ts2 is over, the inductor current is still small and smaller than the set value, and the inductor current can be kept in the PFM mode.
In summary, the present invention does not affect the conversion efficiency, and can switch the PWM mode and the PFM mode in a constant load current for the DC-DC, and the circuit can be applied to both CCM and DCM, and has high conversion efficiency, strong versatility and accuracy. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (2)
1. An average current detection circuit applied to a DC-DC converter, characterized in that: the average current detection circuit comprises an average current sampling module, a current conversion module and an integral comparison module which are connected in sequence;
the average current sampling module comprises a high-side current detection circuit, a resistor R31, an NMOS tube MN31, a 1/2 × Ton generation circuit and a capacitor Cs;
the resistor R31 is connected with the high-side current detection circuit and the drain electrode of the NMOS tube MN31, the source electrode of the NMOS tube MN31 is connected with the positive input end of the comparator U1 and the sampling capacitor Cs, and the grid electrode of the NMOS tube MN31 is connected with the output end of the comparator U3 of the 1/2 toton generation circuit;
the current conversion module comprises an operational amplifier U1, an NMOS transistor MN32, a resistor R32 and a PMOS transistor MP 31;
the positive input end of the operational amplifier U1 is connected with the source electrode of an NMOS tube MN31, the negative input end of the operational amplifier U1 is connected with the source electrodes of a resistor R32 and an NMOS tube MN32, the output end of the operational amplifier U1 is connected with the gate electrode of an NMOS tube MN32, and the drain electrode of the NMOS tube MN32 is connected with the drain electrode and the gate electrode of a PMOS tube MP 31;
the integral comparison module comprises a PMOS tube MP32, a switch S31, a capacitor C31, an NMOS tube MN41, a comparator U2, an NMOS tube MN42, a capacitor C41 and a switch S32;
the grid electrode of the PMOS tube MP32 is connected with the grid electrode and the drain electrode of the PMOS tube MP31, the drain electrode of the PMOS tube MP32 is connected with the switch S31, the switch S31 is further connected with the capacitor C31, the drain electrode of the NMOS tube MM41 and the positive input end of the comparator U2, the negative input end of the comparator U2 is connected with the drain electrode of the NMOS tube MN42, the capacitor C41 and the switch S32, and pulse signals are respectively input to the grid electrodes of the NMOS tube MN41 and the MOS tube MN 42.
2. The average current detection circuit applied to the DC-DC converter according to claim 1, wherein: the 1/2 star Ton generating circuit comprises an NMOS tube M51, a capacitor C51, an NMOS tube M52, a comparator U3, a current bias Ib and a current bias 2 star Ib, the drains of the NMOS tube M51 and the NMOS tube M52 are connected with the negative electrode input end of the comparator U3, meanwhile, the drain of the NMOS tube M51 is connected with the current bias Ib, the source of the NMOS tube M51 is grounded through the capacitor C51, the source of the NMOS tube M52 is connected with the current bias 2 star Ib, and pulse signals are respectively input to the grids of the NMOS tube M51 and the NMOS tube M52.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811516649.3A CN111313697B (en) | 2018-12-12 | 2018-12-12 | Average current detection circuit applied to DC-DC converter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811516649.3A CN111313697B (en) | 2018-12-12 | 2018-12-12 | Average current detection circuit applied to DC-DC converter |
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| CN111313697A CN111313697A (en) | 2020-06-19 |
| CN111313697B true CN111313697B (en) | 2021-01-12 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW459376B (en) * | 1999-06-09 | 2001-10-11 | Mitsubishi Electric Corp | Semiconductor device |
| CN101436821A (en) * | 2008-12-25 | 2009-05-20 | 西安电子科技大学 | PWM/PDM double-mode modulation selective circuit and double-mode modulation method |
| CN101640477A (en) * | 2008-07-31 | 2010-02-03 | 成都芯源系统有限公司 | Voltage regulating circuit for limiting average input current and current limiting method thereof |
| CN102355012A (en) * | 2011-08-11 | 2012-02-15 | 深圳市天微电子有限公司 | Numerical-control constant current driving circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI330775B (en) * | 2007-01-23 | 2010-09-21 | Richtek Technology Corp | Quick response switching regulator and control method thereof |
| US10148174B2 (en) * | 2016-03-28 | 2018-12-04 | Qualcomm Incorporated | Duty cycle estimator for a switch mode power supply |
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2018
- 2018-12-12 CN CN201811516649.3A patent/CN111313697B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW459376B (en) * | 1999-06-09 | 2001-10-11 | Mitsubishi Electric Corp | Semiconductor device |
| CN101640477A (en) * | 2008-07-31 | 2010-02-03 | 成都芯源系统有限公司 | Voltage regulating circuit for limiting average input current and current limiting method thereof |
| CN101436821A (en) * | 2008-12-25 | 2009-05-20 | 西安电子科技大学 | PWM/PDM double-mode modulation selective circuit and double-mode modulation method |
| CN102355012A (en) * | 2011-08-11 | 2012-02-15 | 深圳市天微电子有限公司 | Numerical-control constant current driving circuit |
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| CN111313697A (en) | 2020-06-19 |
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