CN111312317A - Nonvolatile memory control method and device - Google Patents

Nonvolatile memory control method and device Download PDF

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Publication number
CN111312317A
CN111312317A CN201811519991.9A CN201811519991A CN111312317A CN 111312317 A CN111312317 A CN 111312317A CN 201811519991 A CN201811519991 A CN 201811519991A CN 111312317 A CN111312317 A CN 111312317A
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charge pump
controller
nonvolatile memory
temperature value
current required
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CN201811519991.9A
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CN111312317B (en
Inventor
张建军
陈晓璐
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Zhaoyi Innovation Technology Group Co ltd
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GigaDevice Semiconductor Beijing Inc
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/30Power supply circuits

Abstract

The invention discloses a nonvolatile memory control method and a nonvolatile memory control device, which relate to the field of nonvolatile memories and comprise the following steps: the controller receives an operation instruction, the controller receives a target temperature value detected by the temperature detection circuit, the controller adjusts the nonvolatile memory to a target operation parameter corresponding to a preset target temperature value according to a corresponding relation between the preset temperature value and the operation parameter, and the controller executes the operation instruction according to the operation parameter. According to the nonvolatile memory control method and device provided by the invention, the erasing/programming controller in the nonvolatile memory can dynamically adjust the number of charge pump circuits in the programming operation or the erasing operation according to the change of the temperature of the memory unit, so that the nonvolatile memory always works at the highest efficiency, and the working efficiency of a user is improved.

Description

Nonvolatile memory control method and device
Technical Field
The present invention relates to the field of nonvolatile memories, and in particular, to a method and an apparatus for controlling a nonvolatile memory.
Background
Currently, data of a nonvolatile memory is stored in a memory Cell in a bit manner, for an SLC (Single-Level Cell), one bit is stored in one Cell, an MLC (Multi-Level Cell) stores two bits in one Cell, and a tlc (triple Level Cell) stores three bits in one Cell, wherein 8 of the cells form one byte in a unit, a plurality of bytes form a page, and the nonvolatile memory reads and writes data in a page unit and erases data in a block unit.
For example, when the memory cell in the nonvolatile memory is operated at normal temperature (generally about 25 ℃), the programming time of the nonvolatile memory is 0.4ms, when the memory cell is operated at high temperature (generally about 70 ℃), the programming time is increased to 0.8ms, when the memory cell is operated at low temperature (generally below 0 ℃), the programming time is reduced to 0.3ms, and it should be noted that the operating temperature of the nonvolatile memory is-40 ℃ to 85 ℃ in the industry, and there is no strict limit interval.
The reason for this is that when the nonvolatile memory is in operation, the efficiency of the program operation and the erase operation is determined by the driving capability of the charge pump, and at normal temperature, the driving capability of the charge pump is proper, and at high temperature, due to the characteristics of the components of the charge pump, the driving capability of the charge pump is reduced, which leads to the reduction of the program and erase efficiency, and the increase of the program time, and at low temperature, the driving capability of the charge pump is enhanced, and at this time, the voltage ripple applied to the memory cell is increased due to the higher voltage supplied by the charge pump, and the voltage stress on the memory cell is increased, which leads to the aggravation of the degradation of the memory cell and the reduction of the service life of the nonvolatile memory, and when the existing nonvolatile memory is shipped from factory, the number of charge pump circuits is reduced due to the consideration of the improvement of the service life of the nonvolatile memory, or even if, the driving capability of the charge pump is also reduced to a degree that the ripple generated by the voltage provided by the charge pump can damage the memory unit under the condition of low temperature, so that the programming and erasing efficiency of the nonvolatile memory is lower and the user experience is poorer under the conditions of normal temperature and high temperature.
Disclosure of Invention
In view of the above problems, the present invention provides a method and an apparatus for controlling a nonvolatile memory, which solve the problem in the prior art that the driving capability of a charge pump cannot be adjusted at a proper time according to the temperature of a memory cell when a program or erase operation is performed on the nonvolatile memory.
An embodiment of the present invention provides a method for controlling a nonvolatile memory, where the nonvolatile memory includes a temperature detection circuit and a controller, the temperature detection circuit is connected to a storage unit in the nonvolatile memory and the controller, and the method includes:
the controller receives an operation instruction;
the controller receives a target temperature value of the storage unit detected by the temperature detection circuit;
the controller adjusts the nonvolatile memory to a target operating parameter corresponding to a preset target temperature value according to the corresponding relation between the preset temperature value and the operating parameter;
and the controller executes the operation instruction according to the operation parameters.
Optionally, the nonvolatile memory includes a charge pump, and the charge pump includes a plurality of charge pump circuits;
the operation instruction comprises the following steps: programming instructions; the operating parameters include: the current required to be provided by the charge pump when the memory cell is programmed;
the controller adjusts the nonvolatile memory to a target operating parameter corresponding to a preset target temperature value according to a corresponding relation between the preset temperature value and the operating parameter, and the method comprises the following steps:
the controller determines the current required to be provided by the charge pump during target programming operation according to the corresponding relation between the preset temperature value and the operation parameter;
the controller adjusts charge pump switching parameters according to the current required to be provided by the charge pump during target programming operation, and the charge pump switching parameters are used for controlling the number of charge pump circuits in the charge pump to work.
Optionally, the nonvolatile memory includes a charge pump, and the charge pump includes a plurality of charge pump circuits;
the operation instruction comprises the following steps: an erasing instruction; the operating parameters include: the current required to be provided by the charge pump when the memory cell is erased;
the controller adjusts the nonvolatile memory to a target operating parameter corresponding to a preset target temperature value according to a corresponding relation between the preset temperature value and the operating parameter, and the method comprises the following steps:
the controller determines the current required to be provided by the charge pump during target erasing operation according to the corresponding relation between the preset temperature value and the operation parameter;
the controller adjusts charge pump switch parameters according to the current required to be provided by the charge pump during target erasing operation, and the charge pump switch parameters are used for controlling the working quantity of charge pump circuits in the charge pump.
Optionally, the executing, by the controller, the operation instruction according to the operation parameter includes:
when the controller receives a programming instruction, the controller controls the number of charge pump circuits in the charge pump according to the charge pump switching parameter so as to meet the current required for programming the memory cell.
Optionally, the executing, by the controller, the operation instruction according to the operation parameter includes:
when the controller receives an erasing instruction, the controller controls the number of charge pump circuits in the charge pump according to the charge pump switching parameter so as to meet the current required by the erasing operation of the memory unit.
An embodiment of the present invention further provides a nonvolatile memory control apparatus, where the nonvolatile memory includes a temperature detection circuit and a controller, the temperature detection circuit is connected to a storage unit in the nonvolatile memory and the controller, and the controller includes:
the receiving module is used for receiving an operation instruction;
the temperature value receiving module is used for receiving a target temperature value detected by the temperature detection circuit from the storage unit;
the adjusting module is used for adjusting the nonvolatile memory to a target operating parameter corresponding to the preset target temperature value according to the corresponding relation between the preset temperature value and the operating parameter by the controller;
and the operation module is used for executing the operation instruction according to the operation parameter by the controller.
Optionally, the nonvolatile memory includes a charge pump, and the charge pump includes a plurality of charge pump circuits;
the operation instruction comprises the following steps: programming instructions; the operating parameters include: the current required to be provided by the charge pump when the memory cell is programmed;
the adjustment module includes:
the first determining submodule is used for determining the current required to be provided by the charge pump during target programming operation according to the corresponding relation between a preset temperature value and an operating parameter by the controller;
and the first adjusting submodule is used for adjusting the charge pump switching parameter according to the current required to be provided by the charge pump during target programming operation by the controller, and the charge pump switching parameter is used for controlling the working quantity of charge pump circuits in the charge pump.
Optionally, the nonvolatile memory includes a charge pump, and the charge pump includes a plurality of charge pump circuits;
the operation instruction comprises the following steps: an erasing instruction; the operating parameters include: the current required to be provided by the charge pump when the memory cell is erased;
the adjustment module further comprises:
the second determining submodule is used for determining the current required to be provided by the charge pump during target erasing operation according to the corresponding relation between the preset temperature value and the operation parameter by the controller;
and the second adjusting submodule is used for adjusting the charge pump switching parameter according to the current required to be provided by the charge pump during target programming operation by the controller, and the charge pump switching parameter is used for controlling the working quantity of charge pump circuits in the charge pump.
Optionally, the operation module includes:
and the first control submodule is used for controlling the number of charge pump circuits in the charge pump according to the charge pump switching parameter when the controller receives a programming instruction so as to meet the current required by the programming operation of the memory cell.
Optionally, the operation module further includes:
and the second control submodule is used for controlling the number of charge pump circuits in the charge pump according to the charge pump switching parameter when the controller receives an erasing instruction so as to meet the current required by the erasing operation of the memory unit.
Compared with the prior art, the nonvolatile memory control method and the nonvolatile memory control device provided by the invention have the advantages that the temperature detection circuit is additionally arranged in the nonvolatile memory, the working temperature of the memory unit is detected before operation, the detected working temperature is fed back to the controller, and the number of the charge pump circuits during erasing and programming operation is changed by the controller, so that the nonvolatile memory can change the driving capability of the charge pump according to the disuse of the working temperature, the programming and erasing efficiency of the nonvolatile memory is improved, and meanwhile, the performance degradation of the memory unit is avoided.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 is a flow chart of a method of controlling a non-volatile memory according to the present invention;
FIG. 2 is a detailed flow chart of one step of a nonvolatile memory control method according to the present invention;
FIG. 3 is another detailed flow chart of one step of a method for controlling a non-volatile memory according to the present invention;
FIG. 4 is a detailed flow chart of one step of a nonvolatile memory control method according to the present invention;
FIG. 5 is a schematic structural diagram of an embodiment of the present invention;
FIG. 6 is a block diagram of a controller in a nonvolatile memory controlling apparatus according to the present invention;
FIG. 7 is a detailed block diagram of a controller in a nonvolatile memory control apparatus according to the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below. It should be understood that the specific embodiments described herein are merely illustrative of the invention, but do not limit the invention to only some, but not all embodiments.
Referring to fig. 1, a flowchart of a method for controlling a nonvolatile memory is shown, the nonvolatile memory includes a power input terminal, a temperature detection circuit and a controller, the temperature detection circuit is connected to a memory cell and the controller, and a specific method for controlling the nonvolatile memory may include the following steps:
step 101: the controller receives an operation instruction.
Referring to fig. 5, in the embodiment of the present invention, the nonvolatile memory includes a charge pump 10, an erase/program controller 20, a temperature detection circuit 30, and a memory array 40, wherein the charge pump 10 is also called a switched capacitor voltage converter, which is a dc converter that stores energy by using a so-called "flying" or "pumping" capacitor instead of an inductor or a transformer, and can raise or lower an input power voltage, and can also be used to generate a negative voltage, a MOS switch array inside the dc converter controls charging and discharging of the flying capacitor in a certain manner, so that the input voltage is multiplied or lowered by a certain factor (1/2,2 or 3) to obtain a required output voltage, the charge pump 10 in the nonvolatile memory provides an operating voltage for each component or module of the nonvolatile memory, and also provides a suitable voltage for various operations, the charge pump 10 includes a plurality of charge pump circuits, the single charge pump circuit generates a voltage to provide a current, and the plurality of charge pump circuits operate simultaneously to generate a higher voltage and provide a higher current, i.e., provide a stronger driving capability, and the driving capability that the charge pump 10 can provide varies according to the temperature on the memory cell, generally, the lower the temperature, the stronger the driving capability that the charge pump provides. The erasing/programming controller 20 is used for controlling the nonvolatile memory, when programming the memory cell, the driving capability required to be provided by the charge pump 10, that is, the current required to be provided by the charge pump 10, and at the same time, the controller 20 is also used for receiving various operation instructions sent by a user through an upper computer, the temperature detection circuit 30 is respectively connected with the memory cell of the nonvolatile memory and the erasing/programming controller 20, and is used for detecting the temperature value of the memory cell and feeding back the temperature value to the erasing/programming controller 20, it should be noted that the temperature detection circuit 30 can be operated all the time, so that the power consumption of the nonvolatile memory is larger in the standby state of the memory cell, the temperature detection circuit 30 can also be automatically activated by an internal logic function after the user sends an instruction, so that the power consumption of the nonvolatile memory is smaller in the standby state of the memory cell, the memory array 40 is composed of memory cells of a nonvolatile memory, and is used for data storage of the nonvolatile memory. The embodiment of the present invention does not specifically limit the connection mode for obtaining the working mode of each component or module in the nonvolatile memory.
Step 102: the controller receives a target temperature value of the storage unit detected by the temperature detection circuit.
Referring to fig. 5, in the embodiment of the present invention, a temperature detection circuit 30 is respectively connected to a memory cell of a nonvolatile memory and an erase/program controller 20, the temperature detection circuit 30 is used to detect a temperature value of the memory cell in the nonvolatile memory, in practical applications, an external environment temperature of the nonvolatile memory is not constant when the nonvolatile memory operates, which causes different temperatures of the memory cells in the nonvolatile memory, the higher the external temperature is, the higher the temperature of a natural memory cell is, the lower the external temperature is, the lower the temperature of the natural memory cell is, and the temperature of the memory cell in a standby state is different from the temperature of the memory cell in various operations, the temperature detection circuit 30 is added during design of the present invention, which can detect the temperature of the memory cell and feed back to the erase/program controller 20, so that the erase/program controller 20 can perform a next operation according to the received temperature value, the embodiment of the present invention does not specifically limit the specific manner of detecting the temperature of the memory cell and the specific structure of the temperature detection circuit.
Step 103: and the controller adjusts the nonvolatile memory to a target operating parameter corresponding to a preset target temperature value according to the corresponding relation between the preset temperature value and the operating parameter.
Referring to fig. 5, in the embodiment of the present invention, the erase/program controller 20 may control the current required to be supplied by the charge pump 10 according to the temperature of the memory cell, because the lower the temperature is, the stronger the current capability that the charge pump 10 can supply is, but at this time, the voltage ripple generated by the charge pump 10 is relatively large, the voltage stress applied to the memory cell is relatively large, which may cause aging of the memory cell, and the lower the current capability that the charge pump 10 can supply is, the lower the efficiency of programming or erasing the memory cell is, according to the temperature, the erase/program controller 20 may control the number of charge pump circuits to change the current magnitude supplied by the charge pump 10, and the factory configuration of the existing nonvolatile memory is to improve the service life of the nonvolatile memory, to reduce the number of charge pump circuits, or even if a large number of charge pump circuits is reserved, the driving capability of the charge pump 10 is also reduced to a degree that is enough to prevent the ripple generated by the voltage provided by the charge pump 10 from damaging the memory cell at low temperature, that is, during programming or erasing, regardless of the temperature, only the charge pump circuit is controlled to provide the current required for operating the memory cell at normal temperature, but the controller 20 of the present invention can control the number of the charge pump circuits and change the current magnitude during operation along with the change of temperature, so as to greatly improve the efficiency of the nonvolatile memory during operation.
Referring to fig. 2, step 103 may further include the following steps:
step 103 a: and the controller determines the current required to be provided by the charge pump during the target programming operation according to the corresponding relation between the preset temperature value and the operation parameter.
Step 103 b: the controller adjusts charge pump switching parameters according to the current required to be provided by the charge pump during the target programming operation, and the charge pump switching parameters are used for controlling the number of charge pump circuits in the charge pump to work.
Referring to fig. 3, step 103 may further include the following steps:
step 103 c: and the controller determines the current required to be provided by the charge pump during operation according to the corresponding relation between the preset temperature value and the operation parameter.
Step 103 d: the controller adjusts the charge pump switch parameters according to the current required to be provided by the charge pump during the target erasing operation, and the charge pump switch parameters are used for controlling the working quantity of charge pump circuits in the charge pump.
Referring to fig. 5, in the embodiment of the present invention, for example, when a memory cell in a nonvolatile memory performs a programming operation at a normal temperature (generally, about 25 ℃), a current supplied by a charge pump 10 is 6 ma, a time required for the nonvolatile memory to complete the programming operation is 0.4ms, when the memory cell performs the programming operation at a high temperature (generally, about 70 ℃), a current supplied by the charge pump 10 is 3.0 ma, a time required for the nonvolatile memory to complete the programming operation is 0.8ms, at this time, 20 controls the number of charge pump circuits to increase so that the current supplied by the charge pump 10 reaches 6 ma, the time required for the nonvolatile memory to complete the programming operation is 0.4ms, when the memory cell performs the programming operation at a low temperature (generally, less than 0 ℃), the current supplied by the charge pump 10 is 12 ma, and the time required for the nonvolatile memory to complete the programming operation is 0.3ms, although the time is shortened, the voltage ripple generated by the voltage of 12 ma provided by the charge pump is larger, and the loss of the memory unit is larger, at this time, 20 controls the number of the charge pump circuits to be reduced, so that the current provided by the charge pump 10 reaches 6 ma, the time required by the nonvolatile memory to complete the programming operation is changed into 0.4ms, although the time is slightly prolonged, the voltage ripple is smaller, and the loss of the memory unit is reduced, therefore, when the temperatures of the memory units are different, the erasing/programming controller 20 controls the number of the charge pump circuits according to different temperatures, and the nonvolatile memory is always kept efficient.
It can be simply deduced from the above that, when the nonvolatile memory is erased, the charge pump is controlled to provide the same current as that at normal temperature at high temperature or low temperature, so as to complete the erasing operation, it should be noted that, because the manufacturing process quality of the components adopted by the nonvolatile memory is different, the working states that can be achieved are different, the data are obtained by a large number of simulation experiments under the condition of meeting the general manufacturing process, and do not represent indexes of all nonvolatile memories, and in addition, the working temperature of the nonvolatile memory is required to be-40 ℃ to 85 ℃ in the industry, and is not a strict limited interval. The embodiment of the present invention does not specifically limit the correspondence between the temperature and the program/erase operation, the specific manner of adjustment, the magnitude of the current value, and the specific time.
Step 104: the controller executes the operation instruction according to the operation parameter.
Referring to fig. 5, in the embodiment of the present invention, when the erase/program controller 20 receives a program command, it determines the current required to be provided by the charge pump 10 during the program operation according to the temperature of the memory cell, adjusts the switching parameter of the charge pump, and adjusts the number of operations of the charge pump circuit in the charge pump 10 according to the switching parameter of the charge pump; when the erase/program controller 20 receives the erase command, it determines the current required to be provided by the charge pump 10 during the erase operation according to the temperature of the memory cell, adjusts the switching parameters of the charge pump, and adjusts the number of charge pump circuits in the charge pump 10 according to the switching parameters of the charge pump.
Referring to fig. 4, step 104 may specifically include the following steps:
step 104 a: the controller receives the programming instruction, and controls the number of charge pump circuits in the charge pump according to the charge pump switching parameter so as to meet the current required by programming the memory cell.
Step 104 b: the controller receives an erasing instruction, and controls the number of charge pump circuits in the charge pump according to the charge pump switching parameter so as to meet the current required by the erasing operation of the memory unit.
Referring to fig. 5, in the embodiment of the present invention, for example, a current provided by a single group of charge pump circuits in the charge pump 10 may be 1 ma, when the erase/program controller 20 receives a program instruction, the temperature detection circuit 30 detects that the temperature of the memory cell is normal temperature (generally, about 25 ℃), and feeds the temperature back to the erase/program controller 20, the erase/program controller 20 controls 6 groups of charge pump circuits in the charge pump 10 to simultaneously operate, provides 6 ma of current, completes the program operation, when the erase/program controller 20 receives the program instruction, the temperature detection circuit 30 detects that the temperature of the memory cell is high temperature (generally, about 70 ℃), although the charge pump circuits still operate 6 groups simultaneously, due to the characteristics of the charge pump components, the driving capability of the charge pump may be reduced due to the high temperature, and the current provided by the 6 groups of charge pump circuits may only reach 3.0 ma, the erase/program controller 20 controls the charge pump 10 to add 6 sets of charge pump circuits to work simultaneously, at this time, 12 sets of charge pump circuits work to provide 6 ma of current to complete the program operation, when the erase/program controller 20 receives a program instruction, the temperature detection circuit 30 detects that the temperature of the memory cell is low (generally below 0 ℃), at this time, the charge pump circuits still work simultaneously for 6 sets, but due to the self characteristics of the charge pump components, the driving capability of the charge pump is enhanced due to the low temperature, at this time, the current provided by the 6 sets of charge pump circuits can reach 12 ma, the erase/program controller 20 controls the charge pump 10 to reduce the work of the 3 sets of charge pump circuits, at this time, the 3 sets of charge pump circuits work to provide 6 ma of current to complete the program operation.
From the above, it can be easily inferred that, when the nonvolatile memory is subjected to the erase operation, the number of the charge pump circuits in the charge pump 10 is also controlled to be increased or decreased at a high temperature or a low temperature so as to provide a current equal to that at a normal temperature, so as to complete the erase operation. The embodiment of the present invention does not specifically limit the specific manner and the specific current value of the operation command.
For example, as shown in fig. 5, in the design scheme of this embodiment, a charge pump 10, an erase/program controller 20, a temperature detection circuit 30 and a storage array 40 are included in a nonvolatile memory, wherein the charge pump 10, also called a switched capacitor voltage converter, is a dc converter that stores energy by using a so-called "fast" or "pumping" capacitor, rather than an inductor or a transformer, and can raise or lower an input power voltage, and can also be used to generate a negative voltage, a MOS switch array inside the dc converter controls charging and discharging of the fast capacitor in a manner such that the input voltage is multiplied or decreased by a factor (1/2,2 or 3) to obtain a desired output voltage, the charge pump 10 in the nonvolatile memory provides an operating voltage for each component or module of the nonvolatile memory, and also provides a suitable voltage for each operation, the charge pump 10 includes a plurality of charge pump circuits, a single charge pump circuit generates a voltage to provide a current, the plurality of charge pump circuits operate simultaneously to generate a higher voltage to provide a higher current, i.e., to provide a stronger driving capability, the driving capability that the charge pump 10 can provide varies according to the temperature on the memory cell, and generally, the lower the temperature, the stronger the driving capability that the charge pump provides. The erasing/programming controller 20 is used for controlling the nonvolatile memory, when programming the memory cell, the driving capability required to be provided by the charge pump 10, that is, the current required to be provided by the charge pump 10, and at the same time, the controller 20 is also used for receiving various operation instructions sent by a user through an upper computer, the temperature detection circuit 30 is respectively connected with the memory cell of the nonvolatile memory and the erasing/programming controller 20, and is used for detecting the temperature value of the memory cell and feeding back the temperature value to the erasing/programming controller 20, it should be noted that the temperature detection circuit 30 can be operated all the time, so that the power consumption of the nonvolatile memory is larger in the standby state of the memory cell, the temperature detection circuit 30 can also be automatically activated by an internal logic function after the user sends an instruction, so that the power consumption of the nonvolatile memory is smaller in the standby state of the memory cell, the memory array 40 is composed of memory cells of the nonvolatile memory, and the size of the memory array is determined by the number of the memory cells and is used for data storage of the nonvolatile memory.
The non-volatile memory programming is performed in units of pages, and the erasing is performed in units of blocks, so in general, when the same memory cell is programmed or erased, the time for completing the programming operation is less than the time for completing the erasing operation, for example, a current can be supplied by a single set of charge pump circuit in the charge pump 10 to be 1 ma, when the temperature of the memory cell is normal temperature (generally about 25 ℃), a current of 6 ma is required for performing the programming operation, the time required for completing the programming operation is 0.4ms, when the erase/program controller 20 receives a program command, the temperature detection circuit 30 detects that the temperature of the memory cell is normal temperature (generally about 25 ℃), the detected temperature is fed back to the erase/program controller 20, the erase/program controller 20 controls the 6 sets of charge pump circuits in the charge pump 10 to simultaneously operate to supply a current of 6 ma, the time required for completing the programming operation is 0.4ms, when the erase/program controller 20 receives an erase command, the temperature detection circuit 30 detects that the temperature of the memory cell is normal temperature (generally about 25 ℃), and feeds back the temperature to the erase/program controller 20, the erase/program controller 20 controls 2 groups of charge pump circuits in the charge pump 10 to simultaneously work, and supplies 2 milliamperes of current, the time required for completing the erase operation is 90ms, and it should be noted that the erasing of the nonvolatile memory is divided into three types: erasing a sector with the capacity of 4 kbytes, erasing a block with the capacity of 32 kbytes and erasing a block with the capacity of 64 kbytes, wherein in general, the erasing time of the sector with the capacity of 4 kbytes is 90ms when the nonvolatile memory is just delivered from a factory, and the erasing time of the nonvolatile memory after aging can finally reach about 250 ms; the erasing time of a block with the capacity of 32 Kbytes is 250ms when the nonvolatile memory is just delivered from a factory, and the erasing time of the nonvolatile memory after aging can finally reach about 400 ms; the erasing time of a block with the capacity of 64 kbytes is 350ms when the nonvolatile memory is just delivered from a factory, and the erasing time of the nonvolatile memory after aging can finally reach about 500 ms.
When the erase/program controller 20 receives a program command, the temperature detection circuit 30 detects that the temperature of the memory cell is high (generally, about 70 ℃), although the charge pump circuits still work in 6 groups at the same time, due to the characteristics of the charge pump components, the driving capability of the charge pump is reduced due to the high temperature, the current provided by the 6 groups of charge pump circuits can only reach 3.0 ma at this time, the erase/program controller 20 controls the charge pump 10 to add 6 groups of charge pump circuits to work at the same time, at this time, 12 groups of charge pump circuits work to provide 6 ma of current, the current program operation is completed, when the erase/program controller 20 receives the erase command, the temperature detection circuit 30 detects that the temperature of the memory cell is high (generally, about 70 ℃), the erase/program controller 20 controls the charge pump 10 to add 2 groups of charge pump circuits to work at the same time, at this time, 4 groups of charge pump circuits work to provide 2 milliamperes of current, and the erasing operation is completed.
When the erase/program controller 20 receives a program command, the temperature detection circuit 30 detects that the temperature of the memory cell is low (generally, below 0 ℃), although the charge pump circuit still operates in 6 groups at the same time, due to the characteristics of the charge pump components, the low temperature causes the driving capability of the charge pump to be enhanced, the current provided by the 6 groups of charge pump circuits can reach 12 ma at this time, the erase/program controller 20 controls the charge pump 10 to reduce 3 groups of charge pump circuits to operate at the same time, at this time, the 3 groups of charge pump circuits operate to provide 6 ma current, the program operation is completed this time, when the erase/program controller 20 receives an erase command, the temperature detection circuit 30 detects that the temperature of the memory cell is low (generally, below 0 ℃), the erase/program controller 20 controls the charge pump 10 to reduce 1 group of charge pump circuits to operate at the same time, at this time, 1 group of charge pump circuits work to provide 2 milliamperes of current, and the erasing operation is completed.
It should be noted that, because the manufacturing process quality of the components adopted by the nonvolatile memory is different, the working states that can be achieved may vary, the data is obtained through a large number of simulation experiments under the condition of meeting the general manufacturing process, and does not represent the indexes of all nonvolatile memories, and in addition, the working temperature of the nonvolatile memory is-40 ℃ to 85 ℃ in the industry requirement, and there is no strict limited interval. The illustrated data in the embodiments of the present invention does not represent specific data of an actual nonvolatile memory.
Referring to fig. 6, there is shown a block diagram of a controller of a nonvolatile memory controlling device, the controller including:
a receiving module 310, configured to receive an operation instruction;
a temperature value receiving module 320, configured to receive a target temperature value of the storage unit detected by the temperature detection circuit;
the adjusting module 330 is configured to adjust, by the controller, the target operating parameter corresponding to the preset target temperature value by using the nonvolatile memory according to the corresponding relationship between the preset temperature value and the operating parameter;
and the operation module 340 is used for the controller to execute the operation instruction according to the operation parameter.
Optionally, referring to fig. 7, on the basis of fig. 6, the apparatus may further include:
the adjusting module 330 includes:
the first determining submodule 3301 is configured to determine, by the controller, a current required to be provided by the charge pump during a target programming operation according to a corresponding relationship between a preset temperature value and an operation parameter;
the first adjusting submodule 3302 is used for the controller to adjust the charge pump switch parameter according to the current that the charge pump needs to provide when the target programming operation;
the second determining submodule 3303 is configured to determine, by the controller, a current required to be provided by the charge pump during a target erase operation according to a corresponding relationship between a preset temperature value and an operation parameter;
and the second adjusting submodule 3304 is configured to adjust a switching parameter of the charge pump according to a current required to be provided by the charge pump during a target erase operation.
The operation module 340 includes:
the third control sub-module 3401 is configured to, when the controller receives a programming instruction, control the number of charge pump circuits in the charge pump according to a charge pump switching parameter so as to meet a current required for performing a programming operation on the memory cell;
and the fourth control submodule 3402 is configured to, when the controller receives an erase command, control the number of charge pump circuits in the charge pump according to the charge pump switching parameter so as to meet the current required for performing an erase operation on the memory cell.
Through the embodiment, when a user programs or erases the nonvolatile memory through the upper computer, the erasing/programming controller in the nonvolatile memory can dynamically adjust the number of the charge pump circuits during programming or erasing according to the temperature change of the storage unit, so that the nonvolatile memory always works at the highest efficiency, and the working efficiency of the user is improved.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The present invention provides a method and an apparatus for controlling a non-volatile memory, which are described in detail above, and the present invention is described in the following by applying specific examples to explain the principle and the embodiments of the present invention, and the description of the above embodiments is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (10)

1. A method for controlling a nonvolatile memory, the nonvolatile memory including a temperature detection circuit and a controller, the temperature detection circuit connecting a storage unit in the nonvolatile memory and the controller, the method comprising:
the controller receives an operation instruction;
the controller receives a target temperature value of the storage unit detected by the temperature detection circuit;
the controller adjusts the nonvolatile memory to a target operating parameter corresponding to a preset target temperature value according to the corresponding relation between the preset temperature value and the operating parameter;
and the controller executes the operation instruction according to the operation parameters.
2. The method of claim 1, wherein the non-volatile memory comprises a charge pump comprising a plurality of charge pump circuits;
the operation instruction comprises the following steps: programming instructions; the operating parameters include: the current required to be provided by the charge pump when the memory cell is programmed;
the controller adjusts the nonvolatile memory to a target operating parameter corresponding to a preset target temperature value according to a corresponding relation between the preset temperature value and the operating parameter, and the method comprises the following steps:
the controller determines the current required to be provided by the charge pump during target programming operation according to the corresponding relation between the preset temperature value and the operation parameter;
the controller adjusts charge pump switching parameters according to the current required to be provided by the charge pump during target programming operation, and the charge pump switching parameters are used for controlling the number of charge pump circuits in the charge pump to work.
3. The method of claim 1, wherein the non-volatile memory comprises a charge pump comprising a plurality of charge pump circuits;
the operation instruction comprises the following steps: an erasing instruction; the operating parameters include: the current required to be provided by the charge pump when the memory cell is erased;
the controller adjusts the nonvolatile memory to a target operating parameter corresponding to a preset target temperature value according to a corresponding relation between the preset temperature value and the operating parameter, and the method comprises the following steps:
the controller determines the current required to be provided by the charge pump during target erasing operation according to the corresponding relation between the preset temperature value and the operation parameter;
the controller adjusts charge pump switch parameters according to the current required to be provided by the charge pump during target erasing operation, and the charge pump switch parameters are used for controlling the working quantity of charge pump circuits in the charge pump.
4. The method of claim 1, wherein the controller executes the operating instructions according to the operating parameters, comprising:
when the controller receives a programming instruction, the controller controls the number of charge pump circuits in the charge pump according to the charge pump switching parameter so as to meet the current required for programming the memory cell.
5. The method of claim 1, wherein the controller executes the operating instructions according to the operating parameters, comprising:
when the controller receives an erasing instruction, the controller controls the number of charge pump circuits in the charge pump according to the charge pump switching parameter so as to meet the current required by the erasing operation of the memory unit.
6. A nonvolatile memory control apparatus, wherein the nonvolatile memory includes a temperature detection circuit and a controller, the temperature detection circuit is connected to a storage unit in the nonvolatile memory and the controller, and the controller includes:
the receiving module is used for receiving an operation instruction;
the temperature value receiving module is used for receiving a target temperature value detected by the temperature detection circuit from the storage unit;
the adjusting module is used for adjusting the nonvolatile memory to a target operating parameter corresponding to the preset target temperature value according to the corresponding relation between the preset temperature value and the operating parameter by the controller;
and the operation module is used for executing the operation instruction according to the operation parameter by the controller.
7. The apparatus of claim 6, wherein the non-volatile memory comprises a charge pump comprising a plurality of charge pump circuits;
the operation instruction comprises the following steps: programming instructions; the operating parameters include: the current required to be provided by the charge pump when the memory cell is programmed;
the adjustment module includes:
the first determining submodule is used for determining the current required to be provided by the charge pump during target programming operation according to the corresponding relation between a preset temperature value and an operating parameter by the controller;
and the first adjusting submodule is used for adjusting the charge pump switching parameter according to the current required to be provided by the charge pump during target programming operation by the controller, and the charge pump switching parameter is used for controlling the working quantity of charge pump circuits in the charge pump.
8. The apparatus of claim 6, wherein the non-volatile memory comprises a charge pump comprising a plurality of charge pump circuits;
the operation instruction comprises the following steps: an erasing instruction; the operating parameters include: the current required to be provided by the charge pump when the memory cell is erased;
the adjustment module further comprises:
the second determining submodule is used for determining the current required to be provided by the charge pump during target erasing operation according to the corresponding relation between the preset temperature value and the operation parameter by the controller;
and the second adjusting submodule is used for adjusting the charge pump switching parameter according to the current required to be provided by the charge pump during target programming operation by the controller, and the charge pump switching parameter is used for controlling the working quantity of charge pump circuits in the charge pump.
9. The apparatus of claim 6, wherein the operation module comprises:
and the first control submodule is used for controlling the number of charge pump circuits in the charge pump according to the charge pump switching parameter when the controller receives a programming instruction so as to meet the current required by the programming operation of the memory cell.
10. The apparatus of claim 6, wherein the operation module further comprises:
and the second control submodule is used for controlling the number of charge pump circuits in the charge pump according to the charge pump switching parameter when the controller receives an erasing instruction so as to meet the current required by the erasing operation of the memory unit.
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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320455B1 (en) * 1999-03-23 2001-11-20 Nec Corporation Boost circuit
CN1455980A (en) * 2001-02-01 2003-11-12 皇家菲利浦电子有限公司 Programmable charge pump device
US20040145947A1 (en) * 2002-11-12 2004-07-29 Stmicroelectronics S.R.L. Circuit for programming a non-volatile memory device with adaptive program load control
US20070097741A1 (en) * 2005-11-02 2007-05-03 Kang Sang-Beom Phase change random access memory, boosting charge pump and method of generating write driving voltage
CN102479550A (en) * 2010-11-25 2012-05-30 三星电子株式会社 Method compensation operating voltage, flash memory device, and data storage device
CN102663980A (en) * 2012-04-13 2012-09-12 北京京东方光电科技有限公司 Control circuit of gate driving circuit, working method of control circuit and liquid crystal display
CN107659268A (en) * 2017-10-23 2018-02-02 广州启途科技有限公司 The wide scope temperature compensation of voltage controlled oscillator in chip
CN108109646A (en) * 2016-11-24 2018-06-01 北京兆易创新科技股份有限公司 The programmed method and device of a kind of storage unit
CN108109659A (en) * 2016-11-24 2018-06-01 北京兆易创新科技股份有限公司 The method for deleting and device of a kind of storage unit
US20180183327A1 (en) * 2016-12-28 2018-06-28 Infineon Technologies Ag Charge pump arrangement and method for operating a charge pump arrangement

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320455B1 (en) * 1999-03-23 2001-11-20 Nec Corporation Boost circuit
CN1455980A (en) * 2001-02-01 2003-11-12 皇家菲利浦电子有限公司 Programmable charge pump device
US20040145947A1 (en) * 2002-11-12 2004-07-29 Stmicroelectronics S.R.L. Circuit for programming a non-volatile memory device with adaptive program load control
US20070097741A1 (en) * 2005-11-02 2007-05-03 Kang Sang-Beom Phase change random access memory, boosting charge pump and method of generating write driving voltage
CN1959846A (en) * 2005-11-02 2007-05-09 三星电子株式会社 Random access memory, boosting charge pump and method of generating write driving voltage
CN102479550A (en) * 2010-11-25 2012-05-30 三星电子株式会社 Method compensation operating voltage, flash memory device, and data storage device
CN102663980A (en) * 2012-04-13 2012-09-12 北京京东方光电科技有限公司 Control circuit of gate driving circuit, working method of control circuit and liquid crystal display
CN108109646A (en) * 2016-11-24 2018-06-01 北京兆易创新科技股份有限公司 The programmed method and device of a kind of storage unit
CN108109659A (en) * 2016-11-24 2018-06-01 北京兆易创新科技股份有限公司 The method for deleting and device of a kind of storage unit
US20180183327A1 (en) * 2016-12-28 2018-06-28 Infineon Technologies Ag Charge pump arrangement and method for operating a charge pump arrangement
CN107659268A (en) * 2017-10-23 2018-02-02 广州启途科技有限公司 The wide scope temperature compensation of voltage controlled oscillator in chip

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