CN111312174B - Organic light emitting display device and driving method thereof - Google Patents
Organic light emitting display device and driving method thereof Download PDFInfo
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- CN111312174B CN111312174B CN202010115065.6A CN202010115065A CN111312174B CN 111312174 B CN111312174 B CN 111312174B CN 202010115065 A CN202010115065 A CN 202010115065A CN 111312174 B CN111312174 B CN 111312174B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
Abstract
The embodiment of the invention discloses a driving method of an organic light-emitting display device and the organic light-emitting display device, relates to the technical field of display, and aims to improve charge residue of a driving transistor. The organic light emitting display device includes: an organic light emitting display panel including a pixel circuit including a driving transistor, a first transistor and a second transistor, the first transistor and the second transistor being oxide transistors, a gate of the first transistor being connected to a first scanning signal line, a first pole being connected to a reference signal line, and a second pole being connected to a gate of the driving transistor; a display driving chip; the driving method comprises the following steps: in the display mode, in the display time interval, the display driving chip drives the organic light-emitting display panel to emit light; when the display mode is switched to the non-display mode, in the discharging period of the non-display period, the display driving chip controls the first scanning signal line to output a conducting level, and the charges of the first node are released through the first transistor.
Description
[ technical field ] A method for producing a semiconductor device
The present invention relates to the field of display technologies, and in particular, to a driving method of an organic light emitting display device and an organic light emitting display device.
[ background of the invention ]
An organic light emitting display device includes a pixel circuit and an organic light emitting element, and the pixel circuit supplies a driving current to the organic light emitting element to drive it to emit light. The pixel circuit includes a driving transistor and a plurality of control transistors, and in order to stabilize the gate potential of the driving transistor, in the related art, a control transistor electrically connected to the gate of the driving transistor is generally provided as an Indium Gallium Zinc Oxide (IGZO) transistor. However, although the stability of the driving transistor can be improved when the pixel circuit operates after the control transistor is provided as the IGZO transistor, when the organic light emitting display device is in the standby mode or the power-off mode, the low leakage current characteristic of the IGZO transistor in the power-off state is disadvantageous to the discharge of the charges remaining on the gate of the driving transistor, which causes the gate voltage of the driving transistor to be biased for a long time and affects the performance of the driving transistor.
[ summary of the invention ]
In view of the above, embodiments of the present invention provide a driving method of an organic light emitting display device and an organic light emitting display device, which can improve the problem of charge residue on the gate of the driving transistor.
In one aspect, an embodiment of the present invention provides a method for driving an organic light emitting display device, including:
an organic light emitting display panel including a plurality of pixel circuits including a driving transistor, a first control transistor, and a second control transistor; the grid electrode of the driving transistor is electrically connected with a first node, the first pole of the driving transistor is electrically connected with a second node, and the second pole of the driving transistor is electrically connected with a third node; the first control transistor comprises a first transistor and a second transistor, the first transistor and the second transistor are oxide transistors, the grid electrode of the first transistor is electrically connected with a first scanning signal line, the first pole of the first transistor is electrically connected with a reference signal line, the second pole of the first transistor is electrically connected with the first node, the grid electrode of the second transistor is electrically connected with a second scanning signal line, the first pole of the second transistor is electrically connected with the first node, and the second pole of the second transistor is electrically connected with the third node;
a display driving chip;
a driving cycle of an organic light emitting display device includes a display period and a non-display period, the non-display period including a discharge period, the driving method including:
when the organic light-emitting display device is in a display mode, the display driving chip drives the organic light-emitting display panel to emit light in the display time interval;
when the organic light-emitting display device is switched from the display mode to the non-display mode, in the discharge period, the display driving chip controls the first scanning signal line to output a conducting level, so that the first transistor is conducted, and the charges of the first node are released through the first transistor.
In another aspect, an embodiment of the present invention provides an organic light emitting display device, including:
an organic light emitting display panel including a plurality of pixel circuits including a driving transistor, a first control transistor, and a second control transistor; the grid electrode of the driving transistor is electrically connected with a first node, the first pole of the driving transistor is electrically connected with a second node, and the second pole of the driving transistor is electrically connected with a third node; the first control transistor comprises a first transistor and a second transistor, the first transistor and the second transistor are oxide transistors, the grid electrode of the first transistor is electrically connected with a first scanning signal line, the first pole of the first transistor is electrically connected with a reference signal line, the second pole of the first transistor is electrically connected with the first node, the grid electrode of the second transistor is electrically connected with a second scanning signal line, the first pole of the second transistor is electrically connected with the first node, and the second pole of the second transistor is electrically connected with the third node;
a display driver chip for: driving an organic light emitting display panel to emit light during a display period when the organic light emitting display device is in a display mode; when the organic light emitting display device is switched from the display mode to the non-display mode, in a discharge period of a non-display period, the first scanning signal line is controlled to output a conducting level, the first transistor is conducted, and charges of the first node are released through the first transistor.
One of the above technical solutions has the following beneficial effects:
when the organic light emitting display device is in a display mode, in the working process of the pixel circuit, when the first transistor and the second transistor are cut off, the influence of leakage current on the potential of the first node can be reduced based on the characteristic that the leakage current is low when the oxide transistor is in an off state, so that the grid voltage of the driving transistor is stabilized, and the working stability of the driving transistor is improved. However, when the organic light emitting display device is in the non-display mode, the first transistor and the second transistor are turned off for a long time, and the characteristic of low leakage current thereof may cause the residual charge of the first node to be not released, resulting in long-term offset of the gate voltage of the driving transistor. In the technical scheme provided by the invention, the discharge time period is set in the non-display time period, the display driving chip is used for controlling the first scanning signal line to output the conducting level in the discharge time period, so that the first transistor can be conducted, the charge of the first node is released to the reference voltage signal line through the first transistor, the problem of charge residue of the first node is effectively solved, and the influence of long-term bias of the grid voltage of the driving transistor on the performance of the driving transistor is effectively improved.
Therefore, by adopting the technical scheme provided by the embodiment of the invention, the working stability of the driving transistor can be improved by utilizing the oxide transistor in the display period, the influence of the oxide transistor on the release of residual charges can be improved in the non-display period, and the performance of the driving transistor is optimized.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an organic light emitting display device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the invention;
FIG. 3 is a flowchart of a driving method according to an embodiment of the present invention;
fig. 4 is a timing diagram corresponding to the driving method according to the embodiment of the invention;
FIG. 5 is another flow chart of a driving method according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an organic light emitting display device according to an embodiment of the present invention;
fig. 7 is a schematic diagram of film structures of an oxide transistor and a low-temperature polysilicon transistor according to an embodiment of the invention;
fig. 8 is a schematic diagram of another film structure of an oxide transistor and a low-temperature polysilicon transistor according to an embodiment of the invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that although the terms first, second, third, etc. may be used to describe transistors in embodiments of the present invention, these transistors should not be limited to these terms. These terms are only used to distinguish transistors from one another. For example, a first transistor may also be referred to as a second transistor, and similarly, a second transistor may also be referred to as a first transistor, without departing from the scope of embodiments of the present invention.
An embodiment of the present invention provides a driving method of an organic light emitting display device, as shown in fig. 1, fig. 1 is a schematic structural diagram of the organic light emitting display device provided in the embodiment of the present invention, and the organic light emitting display device includes an organic light emitting display panel 1 and a display driving chip 2; as shown in fig. 2, fig. 2 is a schematic structural diagram of the pixel circuit provided in the embodiment of the present invention, and the pixel circuit 3 includes a driving transistor M0, a first control transistor T1, and a second control transistor T2; the gate of the driving transistor M0 is electrically connected to the first node N1, the first pole of the driving transistor M0 is electrically connected to the second node N2, and the second pole of the driving transistor M0 is electrically connected to the third node N3; the first control transistor T1 includes a first transistor M1 and a second transistor M2, the first transistor M1 and the second transistor M2 are oxide transistors, such as IGZO transistors, a gate of the first transistor M1 is electrically connected to a first Scan signal line Scan1, a first pole of the first transistor M1 is electrically connected to a reference signal line Vref, a second pole of the first transistor M1 is electrically connected to a first node N1, a gate of the second transistor M2 is electrically connected to a second Scan signal line Scan2, a first pole of the second transistor M2 is electrically connected to a first node N1, and a second pole of the second transistor M2 is electrically connected to a third node N3.
As shown in fig. 3 and 4, fig. 3 is a flowchart of a driving method according to an embodiment of the present invention, fig. 4 is a timing diagram corresponding to the driving method according to the embodiment of the present invention, a driving cycle of an organic light emitting display device includes a display period Td and a non-display period Tnd, and the non-display period Tnd includes a discharge period tdc, and the driving method includes:
step S1: when the organic light emitting display device is in the display mode, the display driving chip 2 drives the organic light emitting display panel 1 to emit light for the display period Td.
It is understood that the organic light emitting display panel 1 further includes other structures such as a gate driving circuit, a light emitting driving circuit, and a Data line Data, and the display driving chip 2 is electrically connected to the gate driving circuit, the light emitting driving circuit, and the Data line Data. The "the display driving chip 2 drives the organic light emitting display panel 1 to emit light" specifically means: the display driving chip 2 outputs a control signal to the gate driving circuit, controls the gate driving circuit to output a first scanning signal to the first scanning signal line Scan1, outputs a second scanning signal to the second scanning signal line Scan2, and outputs a third scanning signal to the third scanning signal line Scan3, the display driving chip 2 outputs a control signal to the light emission driving circuit, controls the light emission driving circuit to output a light emission control signal to the light emission control signal line Emit, and the display driving chip 2 supplies a Data signal to the Data line Data; thereby causing the pixel circuit 3 to drive the organic light emitting element D to emit light under the action of each signal, wherein the operation principle of the pixel circuit 3 will be described in detail in the following embodiments.
Step S2: when the organic light emitting display device is switched from the display mode to the non-display mode, in the discharge period tdc, the display driver chip 2 controls the first Scan signal line Scan1 to output a turn-on level (high level) to turn on the first transistor M1, and the charge at the first node N1 is discharged through the first transistor M1. The phrase "the display driver chip 2 controls the first Scan signal line Scan1 to output the on level" specifically means that the display driver chip 2 outputs a control signal to the gate driving circuit, and the gate driving circuit controls the first Scan signal line Scan1 to output the on level.
It should be noted that the non-display mode may refer to a standby mode, a shutdown mode or an abnormal power down mode, and in the non-display mode, the organic light emitting display panel 1 does not operate and does not perform image display. In addition, it should be noted that, when the organic light emitting display device is in the non-display mode, even if the display driver chip 2 is powered off, i.e. the power is turned off, the display driver chip 2 can still operate for a period of time, e.g. 200 μ s, under the driving of the power stored in the capacitor, during which period of time, the display driver chip 2 can still control the first Scan signal line Scan1 to output the on level.
With reference to fig. 2, when the organic light emitting display device is in the display mode, in the operation process of the pixel circuit 3, when the first transistor M1 and the second transistor M2 are turned off, based on the characteristic that the leakage current is low when the oxide transistor is in the off state, the influence of the leakage current on the potential of the first node N1 can be reduced, so as to stabilize the gate voltage of the driving transistor M0 and improve the operation stability of the driving transistor M0. However, when the organic light emitting display device is in the non-display mode, the first transistor M1 and the second transistor M2 are turned off for a long time, and the characteristic of low leakage current may result in that the residual charge at the first node N1 cannot be discharged, which results in long-term offset of the gate voltage of the driving transistor M0. In the embodiment of the present invention, the discharge time period tdc is set in the non-display time period Tnd, and the display driving chip 2 is used to control the first Scan signal line Scan1 to output the conducting level in the discharge time period tdc, so that the first transistor M1 can be turned on, and the charge of the first node N1 is released to the reference voltage signal line through the first transistor M1, thereby effectively improving the problem of charge residue at the first node N1, and further effectively improving the influence of the long-term bias of the gate voltage of the driving transistor M0 on the performance of the driving transistor M0.
Therefore, by adopting the driving method provided by the embodiment of the invention, the operation stability of the driving transistor M0 can be improved by using the oxide transistor in the display period Td, the influence of the oxide transistor on the release of residual charges can be improved in the non-display period Tnd, and the performance of the driving transistor M0 can be optimized.
Optionally, with reference to fig. 4 and fig. 5, fig. 5 is another flowchart of a driving method provided in an embodiment of the present invention, where when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes: in the discharging period tdc, the display driver chip 2 controls the second Scan signal line Scan2 to output a turn-on level (high level) to turn on the second transistor M2, and the charge of the third node N3 is discharged through the second transistor M2 and the first transistor M1. By controlling the conduction of the second transistor M2 in the discharging period tdc, the charges remaining on the third node N3 can be released, and the long-term bias of the potential of the second pole of the driving transistor M0 is avoided, thereby further optimizing the performance of the driving transistor M0.
Optionally, referring to fig. 2 again, the second control transistor T2 includes a third transistor M3, a gate of the third transistor M3 is electrically connected to the third Scan signal line Scan3, a first pole of the third transistor M3 is electrically connected to the Data line Data, and a second pole of the third transistor M3 is electrically connected to the second node N2.
Based on the above structure, with reference to fig. 4 and 5, when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes: in the discharge period tdc, the display driver chip 2 controls the third Scan signal line Scan3 to output a turn-on level (low level) to turn on the third transistor M3, and the charge of the second node N2 is discharged through the third transistor M3. By controlling the third transistor M3 to be turned on during the discharging period tdc, the charges remaining on the second node N2 can be released, and the long-term bias of the potential of the first electrode of the driving transistor M0 is avoided, thereby further optimizing the performance of the driving transistor M0.
Optionally, with reference to fig. 4, when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes: in the discharging period tdc, the display driving chip 2 controls the reference signal line Vref and the Data line Data to output the ground signal, respectively. By applying a ground signal to the reference signal line Vref, when the residual charges on the gate and the second pole of the driving transistor M0 are transferred to the reference signal line Vref, the residual charges are more favorably led out through the reference signal line Vref; by applying a ground signal to the Data line Data, when the residual charges on the first electrode of the driving transistor M0 are transferred to the Data line Data, the residual charges are more favorably led out through the Data line Data, so that the charge residue is further avoided.
Alternatively, referring to fig. 6 and fig. 2, fig. 6 is another schematic structural diagram of an organic light emitting display device according to an embodiment of the present invention, where the pixel circuit 3 further includes a storage capacitor C, a first plate of the storage capacitor C is electrically connected to the positive power signal line PVDD, and a second plate of the storage capacitor C is electrically connected to the first node N1; the organic light emitting display device further includes a power driving chip 4, and the power driving chip 4 is configured to supply a positive power signal to the positive power signal line PVDD and a negative power signal to the negative power signal line PVEE. It should be noted that the arrangement position of the power driving chip 4 shown in fig. 6 is only a schematic illustration, and in practical applications, the power driving chip 4 may be arranged on a back plate of the organic light emitting display device.
Based on the above structure, with reference to fig. 4, when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes: in the discharging period tdc, the power supply driver chip 4 controls the positive power supply signal line PVDD to discharge. Since the positive power signal line PVDD is connected to the first node N1 through the storage capacitor C, during the discharging period tdc, if the positive power signal changes, the potential change may further cause the potential of the first node N1 to change, thereby affecting the discharge of the residual charge on the first node N1. After the positive power signal line PVDD is discharged, the positive power signal line PVDD is applied with a stable ground signal, so that the influence of the signal on the positive power signal line PVDD on the release of the residual charges is avoided, and the release of the residual charges is more complete.
Further, the process of the power driving chip 4 controlling the discharge of the positive power signal line PVDD includes: the power supply driver chip 4 supplies a ground signal to the positive power supply signal line PVDD. In this way, the signal on the positive power signal line PVDD can be quickly switched from the positive power signal to the stable ground signal, and the discharge of the positive power signal line PVDD is accelerated, so that the possibility that the signal on the positive power signal line PVDD affects the release of the residual charges is reduced.
Alternatively, the process of the power driver chip 4 controlling the discharge of the positive power signal line PVDD includes: the power supply driver chip 4 stops supplying a signal to the positive power supply signal line PVDD. In this way, the signal on the positive power signal line PVDD can be released naturally, and compared with the power driving chip 4 which forcibly pulls down the potential on the positive power signal line PVDD, the current can be prevented from flowing backward, so that the current is prevented from being released to the display driving chip 2 through the pixel circuit 3 to damage the display driving chip 2.
In addition, with reference to fig. 2 and 4, the negative power supply signal line PVEE electrically connected to the cathode of the organic light emitting element D may be maintained at the ground potential during the non-display period Tnd.
Alternatively, referring to fig. 4 again, the discharging period tdc includes a first sub-period tdc1 and a second sub-period tdc2, in which the potential on the positive power signal line PVDD is discharged from the power supply potential to the ground potential in the first sub-period tdc1, and in which the potential on the positive power signal line PVDD maintains a stable ground potential in the second sub-period tdc 2. By setting the second sub-period tdc2 within the discharging period tdc, the signal on the positive power supply signal line PVDD can be stably maintained for a certain period of time of the ground signal, and the stability of the discharge of the residual charges is improved, thereby making the discharge of the residual charges more complete.
The non-display period Tnd further includes a non-discharge period tndc, which is positioned after the second sub-period tdc2, in which the first, second, and third Scan signal lines Scan1, Scan2, and Scan3 are placed at the ground potential. In the non-discharge period tndc, the residual charges at the first node N1, the second node N2, and the third node N3 do not need to be discharged any more, and therefore, the display driver chip 2 stops controlling the output signals of the first Scan signal line Scan1, the second Scan signal line Scan2, and the third Scan signal line Scan3 to be at the ground potential, and stops the driving of the pixel circuit 3. Further, it is also possible to place the emission control signal line Emit, the reference signal line Vref, and the Data line Data at the ground potential by stopping the control of the output signals from the display driving chip 2, and the positive power supply signal line PVDD and the negative power supply signal line PVEE by stopping the control of the output signals from the power supply driving chip 4.
Alternatively, referring again to fig. 2, the second control transistor T2 includes a fourth transistor M4 and a fifth transistor M5; a gate of the fourth transistor M4 is electrically connected to the emission control signal line Emit, a first pole of the fourth transistor M4 is electrically connected to the positive power supply signal line PVDD, a second pole of the fourth transistor M4 is electrically connected to the second node N2, a gate of the fifth transistor M5 is electrically connected to the emission control signal line Emit, a first pole of the fifth transistor M5 is electrically connected to the third node N3, and a second pole of the fifth transistor M5 is electrically connected to the anode of the organic light emitting element D.
Based on the above structure, with reference to fig. 4, when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes: in the discharging period tdc, the display driving chip 2 controls the emission control signal line Emit to output a cut-off level (high level) to turn off the fourth transistor M4 and the fifth transistor M5. By controlling the fourth transistor M4 to be turned off, the path between the second node N2 and the positive power signal line PVDD can be disconnected, and the influence of the fluctuation of the signal on the positive power signal line PVDD on the release of the residual charge of the second node N2 is avoided; by controlling the fifth transistor M5 to be turned off, the residual charge at the third node N3 can be discharged only through the release path of the second transistor M2 and the first transistor M1, and the residual charge is prevented from flowing into the organic light emitting element D through the fifth transistor M5.
Alternatively, the discharge period tdc has a duration of t1, and in order to make the residual charge more completely released in the discharge period tdc, t1 may satisfy: t1 is more than or equal to 1 mu s.
An embodiment of the present invention further provides an organic light emitting display device, please refer to fig. 1 and fig. 2 again, which includes an organic light emitting display panel 1 and a display driving chip 2.
The organic light emitting display panel 1 includes a plurality of pixel circuits 3, the pixel circuits 3 including a driving transistor M0, a first control transistor T1, and a second control transistor T2; the gate of the driving transistor M0 is electrically connected to the first node N1, the first pole of the driving transistor M0 is electrically connected to the second node N2, and the second pole of the driving transistor M0 is electrically connected to the third node N3; the first control transistor T1 includes a first transistor M1 and a second transistor M2, the first transistor M1 and the second transistor M2 are oxide transistors, a gate of the first transistor M1 is electrically connected to a first Scan signal line Scan1, a first pole of the first transistor M1 is electrically connected to a reference signal line Vref, a second pole of the first transistor M1 is electrically connected to a first node N1, a gate of the second transistor M2 is electrically connected to a second Scan signal line Scan2, a first pole of the second transistor M2 is electrically connected to a first node N1, and a second pole of the second transistor M2 is electrically connected to a third node N3.
The display driver chip 2 is configured to: driving the organic light emitting display panel 1 to emit light for a display period Td while the organic light emitting display device is in a display mode; when the organic light emitting display device is switched from the display mode to the non-display mode, in the discharge period tdc of the non-display period Tnd, the first Scan signal line Scan1 is controlled to output a turn-on level to turn on the first transistor M1, and the charge of the first node N1 is discharged through the first transistor M1.
When the organic light emitting display device is switched to the non-display mode, the display driving chip 2 is used for controlling the first Scan signal line Scan1 to output a conducting level, so that the first transistor M1 can be turned on, and the charges of the first node N1 are released to the reference voltage signal line through the first transistor M1, thereby effectively improving the problem of the residual charges of the first node N1, and further effectively improving the influence of the long-term bias of the gate voltage of the driving transistor M0 on the performance of the driving transistor M0. By adopting the organic light-emitting display device provided by the embodiment of the invention, the working stability of the driving transistor M0 can be improved by utilizing the oxide transistor in the display time Td, the influence of the oxide transistor on the release of residual charges can be improved in the non-display time Tnd, and the performance of the driving transistor M0 is optimized.
Alternatively, referring to fig. 2 and 4 again, the second control transistor T2 includes a third transistor M3, a gate of the third transistor M3 is electrically connected to the third Scan signal line Scan3, a first pole of the third transistor M3 is electrically connected to the Data line Data, and a second pole of the third transistor M3 is electrically connected to the second node N2. The display driver chip 2 is also configured to: in the discharge period tdc, the second Scan signal line Scan2 is controlled to output a turn-on level, so that the second transistor M2 is turned on, and the charge of the third node N3 is discharged through the second transistor M2 and the first transistor M1; the third Scan signal line Scan3 is controlled to output a turn-on level, so that the third transistor M3 is turned on, and the charge of the second node N2 is discharged through the third transistor M3. With this arrangement, the charges remaining on the second node N2 and the third node N3 can be released, and long-term bias of the potentials of the first pole and the second pole of the driving transistor M0 can be avoided, thereby further optimizing the performance of the driving transistor M0.
Alternatively, referring again to fig. 2, 4 and 6, the pixel circuit 3 further includes a storage capacitor C, a first plate of which is electrically connected to the positive power supply signal line PVDD, and a second plate of which is electrically connected to the first node N1; the organic light emitting display device further includes a power driving chip 4, and the power driving chip 4 is configured to control the positive power signal line PVDD to discharge during the discharge period tdc. During the discharging period tdc, if the positive power signal changes, the potential change further causes the potential of the first node N1 to change, thereby affecting the release of the residual charge on the first node N1. After the positive power signal line PVDD is controlled to discharge by the power driving chip 4, the discharged positive power signal line PVDD can be a stable ground signal, so that the influence of the signal on the positive power signal line PVDD on the release of the residual charges is avoided, and the release of the residual charges is more complete.
Optionally, referring to fig. 2 and 4 again, the second control transistor T2 further includes a fourth transistor M4 and a fifth transistor M5; a gate of the fourth transistor M4 is electrically connected to the emission control signal line Emit, a first pole of the fourth transistor M4 is electrically connected to the positive power supply signal line PVDD, and a second pole of the fourth transistor M4 is electrically connected to the second node N2; a gate of the fifth transistor M5 is electrically connected to the emission control signal line Emit, a first pole of the fifth transistor M5 is electrically connected to the third node N3, and a second pole of the fifth transistor M5 is electrically connected to the anode of the organic light emitting element D. The display driver chip 2 is also configured to: in the discharging period tdc, the emission control signal line Emit is controlled to output a cut-off level, and the fourth transistor M4 and the fifth transistor M5 are cut off. By controlling the fourth transistor M4 to be turned off, the path between the second node N2 and the positive power signal line PVDD can be disconnected, and the influence of the fluctuation of the signal on the positive power signal line PVDD on the release of the residual charge of the second node N2 is avoided; by controlling the fifth transistor M5 to be turned off, the residual charge at the third node N3 can be discharged only through the release path of the second transistor M2 and the first transistor M1, and the residual charge is prevented from flowing into the organic light emitting element D through the fifth transistor M5.
In addition, referring to fig. 2 again, the second control transistor T2 further includes a sixth transistor M6, a gate of the sixth transistor M6 is electrically connected to the first Scan signal line Scan1, a first pole of the sixth transistor M6 is electrically connected to the reference signal line Vref, and a second pole of the sixth transistor M6 is electrically connected to the anode of the organic light emitting element D.
The operation principle of the pixel circuit 3 in the display period Td will be described with reference to fig. 2 and 4:
the display period Td includes an initialization period t1 ', a data writing period t2 ', and a light emitting period t3 '.
In the initialization period t 1', the display driving chip 2 controls the first Scan signal line Scan1 to provide a high level, the second Scan signal line Scan2 to provide a low level, the third Scan signal line Scan3 to provide a high level, the emission control signal line Emit to provide a high level, the first transistor M1 and the sixth transistor M6 are turned on by the high level provided by the first Scan signal line Scan1, the reference signal provided by the reference signal line Vref is transmitted to the first node N1 via the turned-on first transistor M1 and to the anode of the organic light emitting element D via the turned-on sixth transistor M6, respectively, and the reset of the first node N1 and the anode of the organic light emitting element D is realized.
In the data writing period t 2', the display driver chip 2 controls the first Scan signal line Scan1 to be supplied with a low level, the second Scan signal line Scan2 to be supplied with a high level, the third Scan signal line Scan3 to be supplied with a low level, the emission control signal line Emit to be supplied with a high level, the second transistor M2 is turned on by the high level supplied from the second Scan signal line Scan2, the third transistor M3 is turned on by the low level supplied from the third Scan signal line Scan3, and the data signal is written into the driving transistor M0 via the turned-on third transistor M3 and the turned-on second transistor M2.
In the light emission period t 3', the display driver chip 2 controls the first Scan signal line Scan1 to supply a low level, the second Scan signal line Scan2 to supply a low level, the third Scan signal line Scan3 to supply a high level, the light emission control signal line Emit to supply a low level, the fourth transistor M4 and the fifth transistor M5 are turned on by the low level supplied from the light emission control signal line Emit, and the organic light emitting element D emits light by the drive current converted by the data signal and the positive power supply signal line PVDD.
Alternatively, to improve the stability of the second control transistor T2, the second control transistor T2 may be provided as a low temperature polysilicon transistor. As shown in fig. 7, fig. 7 is a schematic diagram of a film structure of an oxide transistor and a low temperature polysilicon transistor provided in an embodiment of the present invention, where the oxide transistor IGZO includes a first active layer 5, a first gate layer 6, and a first source drain layer 7, and the low temperature polysilicon transistor LTPS includes a second active layer 8, a second gate layer 9, and a second source drain layer 10; in a direction perpendicular to the plane of the organic light emitting display panel 1, there is an overlap between the first active layer 5 and the second active layer 8, and there is an overlap between the first gate layer 6 and the second gate layer 9.
It should be noted that the oxide transistor IGZO and the low-temperature polysilicon transistor LTPS may be two oxide transistors IGZO and low-temperature polysilicon transistors LTPS which are closest to each other in layout design, the oxide transistor IGZO may refer to any one of the first transistor M1 and the second transistor M2, and the low-temperature polysilicon transistor LTPS may refer to any one of the third transistor M3 to the sixth transistor M6.
With the arrangement, the film layer structures of the oxide transistor IGZO and the low-temperature polysilicon transistor LTPS are overlapped in the plane direction perpendicular to the organic light-emitting display panel 1, so that the space occupied by the film layer structures of the oxide transistor IGZO and the low-temperature polysilicon transistor LTPS in the plane direction parallel to the organic light-emitting display panel 1 is reduced, the whole space occupied by the pixel circuit 3 is effectively reduced, and the high-pixel-density design of the organic light-emitting display device is facilitated.
Further, referring to fig. 7 again, in the direction perpendicular to the plane of the organic light emitting display panel 1, the first gate layer 6 and the second gate layer 9 are located between the first active layer 5 and the second active layer 8, and the first gate layer 6 is located on the side of the second gate layer 9 close to the first active layer 5. At this time, the distance between the first gate layer 6 and the first active layer 5 is smaller, so that the driving capability of the electric field formed by the first gate layer 6 on the carriers in the first active layer 5 is improved, and similarly, the distance between the second gate layer 9 and the second active layer 8 is smaller, so that the driving capability of the electric field formed by the second gate layer 9 on the carriers in the second active layer 8 is improved.
Or, as shown in fig. 8, fig. 8 is another film structure diagram of the oxide transistor and the low temperature polysilicon transistor provided in the embodiment of the present invention, the second gate layer 9 is located between the first active layer 5 and the second active layer 8, the first gate layer 6 is located on a side of the first active layer 5 facing away from the second active layer 8, and the first gate layer 6, the first source drain layer 7, and the second source drain layer 10 are disposed in the same layer. So set up, under the prerequisite of guaranteeing that the interval between first gate layer 6 and the first active layer 5, between second gate layer 9 and the second active layer 8 is all less, first gate layer 6 and first source drain layer 7, second source drain layer 10 is with the layer setting, not only can simplify the manufacture craft of first gate layer 6, reduce the cost of manufacture, can also avoid first gate layer 6 additionally to occupy the membranous layer thickness, and then reduce pixel circuit 3's whole membranous layer thickness, more be favorable to organic light-emitting display device's frivolous design.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (13)
1. A driving method of an organic light emitting display device, characterized in that the organic light emitting display device comprises:
an organic light emitting display panel including a plurality of pixel circuits including a driving transistor, a first control transistor, and a second control transistor; the grid electrode of the driving transistor is electrically connected with a first node, the first pole of the driving transistor is electrically connected with a second node, and the second pole of the driving transistor is electrically connected with a third node; the first control transistor comprises a first transistor and a second transistor, the first transistor and the second transistor are oxide transistors, the grid electrode of the first transistor is electrically connected with a first scanning signal line, the first pole of the first transistor is electrically connected with a reference signal line, the second pole of the first transistor is electrically connected with the first node, the grid electrode of the second transistor is electrically connected with a second scanning signal line, the first pole of the second transistor is electrically connected with the first node, and the second pole of the second transistor is electrically connected with the third node;
a display driving chip;
a driving cycle of an organic light emitting display device includes a display period and a non-display period, the non-display period including a discharge period, the driving method including:
when the organic light-emitting display device is in a display mode, the display driving chip drives the organic light-emitting display panel to emit light in the display time interval;
when the organic light-emitting display device is switched from the display mode to the non-display mode, in the discharge period, the display driving chip controls the first scanning signal line to output a conducting level to enable the first transistor to be conducted, and charges of the first node are released through the first transistor;
the second control transistor comprises a fourth transistor and a fifth transistor; wherein a gate of the fourth transistor is electrically connected to a light emission control signal line, a first pole of the fourth transistor is electrically connected to a positive power signal line, a second pole of the fourth transistor is electrically connected to the second node, a gate of the fifth transistor is electrically connected to the light emission control signal line, a first pole of the fifth transistor is electrically connected to the third node, and a second pole of the fifth transistor is electrically connected to an anode of an organic light emitting element;
when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes:
in the discharging period, the display driving chip controls the light-emitting control signal line to output a cut-off level to cut off the fourth transistor and the fifth transistor;
the pixel circuit further comprises a storage capacitor, wherein a first polar plate of the storage capacitor is electrically connected with the positive power signal line, and a second polar plate of the storage capacitor is electrically connected with the first node;
the discharge period includes a first sub-period in which the potential on the positive power supply signal line is discharged from a power supply potential to a ground potential, and a second sub-period in which the potential on the positive power supply signal line maintains a stable ground potential;
the non-display period further includes a non-discharge period following the second sub-period, and the first scanning signal line and the second scanning signal line are placed at a ground potential in the non-discharge period.
2. The driving method according to claim 1, wherein when the organic light emitting display device is switched from the display mode to a non-display mode, the driving method further comprises:
in the discharging period, the display driving chip controls the second scanning signal line to output a conducting level, so that the second transistor is conducted, and the charge of the third node is released through the second transistor and the first transistor.
3. The driving method according to claim 1, wherein the second control transistor includes a third transistor, a gate electrode of which is electrically connected to a third scan signal line, a first pole of which is electrically connected to a data line, and a second pole of which is electrically connected to the second node;
when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes:
in the discharging period, the display driving chip controls the third scanning signal line to output a conducting level, so that the third transistor is conducted, and the charge of the second node is released through the third transistor.
4. The driving method according to claim 3, wherein when the organic light emitting display device is switched from the display mode to a non-display mode, the driving method further comprises:
and in the discharging period, the display driving chip controls the reference signal line and the data line to output grounding signals respectively.
5. The driving method according to claim 1,
the organic light emitting display device further comprises a power driving chip;
when the organic light emitting display device is switched from the display mode to the non-display mode, the driving method further includes:
in the discharge period, the power supply driving chip controls the positive power supply signal line to discharge.
6. The driving method according to claim 5,
the process of controlling the discharge of the positive power signal wire by the power driving chip comprises the following steps: the power driver chip provides a ground signal to the positive power signal line.
7. The driving method according to claim 5,
the process of controlling the discharge of the positive power signal wire by the power driving chip comprises the following steps: the power driving chip stops supplying a signal to the positive power signal line.
8. The driving method according to claim 1, wherein the discharge period has a duration of t1, t1 ≧ 1 μ s.
9. An organic light emitting display device, comprising:
an organic light emitting display panel including a plurality of pixel circuits including a driving transistor, a first control transistor, and a second control transistor; the grid electrode of the driving transistor is electrically connected with a first node, the first pole of the driving transistor is electrically connected with a second node, and the second pole of the driving transistor is electrically connected with a third node; the first control transistor comprises a first transistor and a second transistor, the first transistor and the second transistor are oxide transistors, the grid electrode of the first transistor is electrically connected with a first scanning signal line, the first pole of the first transistor is electrically connected with a reference signal line, the second pole of the first transistor is electrically connected with the first node, the grid electrode of the second transistor is electrically connected with a second scanning signal line, the first pole of the second transistor is electrically connected with the first node, and the second pole of the second transistor is electrically connected with the third node;
a display driver chip for: driving an organic light emitting display panel to emit light during a display period when the organic light emitting display device is in a display mode; when the organic light emitting display device is switched from the display mode to the non-display mode, in a discharge period of a non-display period, controlling the first scanning signal line to output a conducting level to enable the first transistor to be conducted, and releasing charges of the first node through the first transistor;
the second control transistor includes:
a fourth transistor, a gate of which is electrically connected to a light emission control signal line, a first pole of which is electrically connected to a positive power signal line, and a second pole of which is electrically connected to the second node;
a fifth transistor, a gate of which is electrically connected to the emission control signal line, a first pole of which is electrically connected to the third node, and a second pole of which is electrically connected to an anode of the organic light emitting element;
the display driver chip is further configured to: in the discharge period, controlling the light emission control signal line to output a turn-off level to turn off the fourth transistor and the fifth transistor;
the pixel circuit further comprises a storage capacitor, wherein a first polar plate of the storage capacitor is electrically connected with the positive power signal line, and a second polar plate of the storage capacitor is electrically connected with the first node;
the discharge period includes a first sub-period in which the potential on the positive power supply signal line is discharged from a power supply potential to a ground potential, and a second sub-period in which the potential on the positive power supply signal line maintains a stable ground potential;
the non-display period further includes a non-discharge period following the second sub-period, and the first scanning signal line and the second scanning signal line are placed at a ground potential in the non-discharge period.
10. The organic light-emitting display device according to claim 9, wherein the second control transistor comprises a third transistor, a gate electrode of the third transistor is electrically connected to a third scan signal line, a first pole of the third transistor is electrically connected to a data line, and a second pole of the third transistor is electrically connected to the second node;
the display driver chip is further configured to: in the discharging period, controlling the second scanning signal line to output a conducting level to enable the second transistor to be conducted, and discharging the charge of the third node through the second transistor and the first transistor; and controlling the third scan signal line to output a turn-on level to turn on the third transistor, and releasing the charge of the second node through the third transistor.
11. The organic light-emitting display device according to claim 9,
the organic light emitting display device further includes a power driving chip for controlling the positive power signal line to discharge in the discharge period.
12. The organic light-emitting display device according to claim 9, wherein the second control transistor is a low-temperature polysilicon transistor;
the oxide transistor comprises a first active layer, a first grid layer and a first source drain layer, and the low-temperature polycrystalline silicon transistor comprises a second active layer, a second grid layer and a second source drain layer;
in a direction perpendicular to a plane of the organic light emitting display panel, the first active layer and the second active layer overlap, and the first gate layer and the second gate layer overlap.
13. The organic light-emitting display device according to claim 12,
in a direction perpendicular to the plane of the organic light-emitting display panel, the first gate layer and the second gate layer are positioned between the first active layer and the second active layer, and the first gate layer is positioned on one side of the second gate layer close to the first active layer;
or the second gate layer is positioned between the first active layer and the second active layer, the first gate layer is positioned on one side of the first active layer, which is back to the second active layer, and the first gate layer, the first source drain layer and the second source drain layer are arranged on the same layer.
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| CN113516952B (en) * | 2021-05-26 | 2022-11-18 | 京东方科技集团股份有限公司 | Pixel driving circuit, driving method thereof and display panel |
| CN113674668A (en) * | 2021-08-16 | 2021-11-19 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit and display panel |
| KR20230056854A (en) | 2021-10-20 | 2023-04-28 | 삼성디스플레이 주식회사 | Pixel and display apparatus |
| CN115457910A (en) * | 2022-09-28 | 2022-12-09 | 厦门天马显示科技有限公司 | Display module, driving method thereof and display device |
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| KR101323493B1 (en) * | 2010-12-22 | 2013-10-31 | 엘지디스플레이 주식회사 | Organic light emitting diode display |
| US9576535B2 (en) * | 2013-01-17 | 2017-02-21 | Samsung Display Co., Ltd. | Pixel and organic light emitting display using the same |
| CN104200771B (en) * | 2014-09-12 | 2017-03-01 | 上海天马有机发光显示技术有限公司 | Image element circuit, array base palte and display device |
| CN106097973B (en) * | 2016-08-25 | 2018-05-29 | 深圳市华星光电技术有限公司 | A kind of circuit for being used to drive AMOLED pixels |
| CN108806610A (en) * | 2018-05-30 | 2018-11-13 | 昆山国显光电有限公司 | Driving circuit, pixel circuit, its driving method and display device |
| CN109119029B (en) * | 2018-06-19 | 2020-06-30 | 北京大学深圳研究生院 | Pixel circuit, driving method thereof, display device and electronic equipment |
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