CN111310393A - Simulation clock generation method and related product - Google Patents
Simulation clock generation method and related product Download PDFInfo
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- CN111310393A CN111310393A CN202010128949.5A CN202010128949A CN111310393A CN 111310393 A CN111310393 A CN 111310393A CN 202010128949 A CN202010128949 A CN 202010128949A CN 111310393 A CN111310393 A CN 111310393A
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Abstract
The embodiment of the application discloses a simulation clock generation method and a related product, which are applied to electronic equipment, wherein the electronic equipment comprises a digital clock generator; the method comprises the following steps: firstly, electronic equipment acquires a circuit rule of a digital circuit to be detected; then the electronic equipment determines basic input parameters according to the circuit rule through a digital clock generator; then the electronic equipment generates a simulation clock according to the basic input parameters through a digital clock generator, wherein the simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected; therefore, by the method, different simulation clocks are generated according to different basic input parameters, the requirements of various simulation scenes can be met, simulation personnel do not need to repeatedly generate clocks, time cost and labor cost are saved, and high efficiency and convenience of digital circuit inspection are improved.
Description
Technical Field
The present application relates to the field of electronic device technologies, and in particular, to a method for generating a simulation clock and a related product.
Background
The existing digital clock generator has too single function, and can only generate a clock with fixed frequency and fixed phase or a part of clocks with random parameters, which can cause the condition of missing test in the actual simulation. With the continuous development of integrated circuit manufacturing processes, digital circuits and systems have also gained wide application; in the design process of a digital circuit, simulation verification is the most important, complex and time-consuming link in the whole design process, and aims to verify whether the behavior of a circuit designed by a designer is consistent with that in the assumption or not or to verify whether the circuit designed by the designer meets the related requirements or not in a software environment.
Disclosure of Invention
The embodiment of the application provides a simulation clock generation method and a related product, so as to improve the high efficiency and convenience of digital circuit detection.
In a first aspect, an embodiment of the present application provides a method for generating an emulation clock, which is applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps:
acquiring a circuit rule of a digital circuit to be detected;
determining, by the digital clock generator, a basic input parameter according to the circuit rule;
and generating an emulation clock according to the basic input parameters by the digital clock generator, wherein the emulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected.
In a second aspect, an embodiment of the present application provides an emulation clock generating apparatus, which is applied to an electronic device, where the electronic device includes a digital clock generator; the simulation clock generating device comprises a processing unit, a communication unit and a storage unit, wherein,
the processing unit is used for acquiring the circuit rule of the digital circuit to be detected; and for determining, by the digital clock generator, basic input parameters according to the circuit rules; and the digital clock generator is used for generating an emulation clock according to the basic input parameters, wherein the emulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected.
In a third aspect, an embodiment of the present application provides an electronic device, including a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and the program includes instructions for executing steps in any method of the first aspect of the embodiment of the present application.
In a fourth aspect, the present application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program for electronic data exchange, where the computer program makes a computer perform part or all of the steps described in any one of the methods in the second aspect of the present application.
In a fifth aspect, the present application provides a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to perform some or all of the steps described in any one of the methods of the second aspect of the present application. The computer program product may be a software installation package.
It can be seen that, in the embodiments of the present application, a method for generating an emulation clock and a related product are provided, which are applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps: firstly, electronic equipment acquires a circuit rule of a digital circuit to be detected; then the electronic equipment determines basic input parameters according to the circuit rule through the digital clock generator; then the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator, wherein the simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected; therefore, by the method, different simulation clocks are generated according to different basic input parameters, the requirements of various simulation scenes can be met, simulation personnel do not need to repeatedly generate clocks, time cost and labor cost are saved, and high efficiency and convenience of digital circuit inspection are improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1A is a schematic flowchart of a simulation clock generation method according to an embodiment of the present application;
FIG. 1B is a schematic diagram of different phase values provided by an embodiment of the present application;
FIG. 1C is a diagram illustrating different jitter values provided by an embodiment of the present application;
FIG. 2 is a schematic flow chart of another simulation clock generation method provided in the embodiment of the present application;
FIG. 3 is a schematic flow chart of another simulation clock generation method provided in the embodiment of the present application;
fig. 4 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;
fig. 5 is a block diagram of functional units of an apparatus for generating an emulated clock according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions of the present application better understood, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The electronic device according to the embodiment of the present application may include various handheld devices, vehicle-mounted devices, wearable devices, computing devices or other processing devices connected to a wireless modem, which have wireless communication functions, and various forms of User Equipment (UE), Mobile Stations (MS), terminal devices (terminal device), and the like.
The following describes embodiments of the present application in detail.
Referring to fig. 1A, fig. 1A is a schematic flowchart of a method for generating a simulation clock according to an embodiment of the present application, applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps:
s101, the electronic equipment acquires a circuit rule of a digital circuit to be detected;
wherein the circuit rules include circuit characteristics and circuit functions.
S102, the electronic equipment determines basic input parameters according to the circuit rule through the digital clock generator;
wherein the basic input parameters include a period, a phase and a jitter value of a simulation clock.
Wherein the digital clock generator supports fixed selection and random selection of periods, phases and jitter values within a preset range.
S103, the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator.
The simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected.
And the signal to be detected is used for determining the detection result of the digital circuit to be detected.
It can be seen that, in the embodiments of the present application, a method for generating an emulation clock and a related product are provided, which are applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps: firstly, electronic equipment acquires a circuit rule of a digital circuit to be detected; then the electronic equipment determines basic input parameters according to the circuit rule through the digital clock generator; then the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator, wherein the simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected; therefore, by the method, different simulation clocks are generated according to different basic input parameters, the requirements of various simulation scenes can be met, simulation personnel do not need to repeatedly generate clocks, time cost and labor cost are saved, and high efficiency and convenience of digital circuit inspection are improved.
In one possible example, the electronic device determines, by the digital clock generator, a basic input parameter according to the circuit rule, including: and the electronic equipment determines the cycle range, the phase range and the jitter range of the simulation clock through the digital clock generator according to the circuit rule.
Wherein the period range is used to determine a plurality of random periods and/or at least one fixed period.
Wherein the phase range is used to determine a plurality of random phases and/or at least one fixed phase.
Wherein the jitter range is used to determine a plurality of random jitter frequencies and/or at least one fixed jitter frequency.
In specific implementation, the electronic device determines a period range, a phase range and a jitter range of the simulation clock according to the circuit rule through the digital clock generator, and selects a period value, a phase value and a jitter value in the period range, the phase range and the jitter range according to a preset strategy.
In this example, the electronic device determines the period range, the phase range and the jitter range of the simulation clock according to the circuit rule through the digital clock generator, which is beneficial to improving the adaptability of the simulation clock and the circuit to be detected and the high efficiency of the digital circuit detection.
In one possible example, the period range is used to determine a plurality of random periods and/or at least one fixed period, including: the electronic equipment determines a period random value in the period range according to the period range; the electronic device determines the plurality of random periods according to the period random value.
Wherein the digital clock generator supports random selection among a plurality of fixed periods.
In specific implementation, the electronic device determines a period random value in the period range according to the period range, and then the electronic device determines the plurality of random periods according to the period random value, wherein the period random value is used for limiting the period so that a fixed period meeting the circuit to be detected inevitably exists.
In this example, it can be seen that, according to the period range, the electronic device determines a period random value in the period range, and according to the period random value, the electronic device determines the plurality of random periods; the method is beneficial to enriching the simulation clock to meet various detection scenes and improving the high efficiency and accuracy of digital circuit detection.
In one possible example, the phase range is used to determine a plurality of random phases and/or at least one fixed phase, including: the electronic device queries the phase range, and determines whether the phase range comprises a first phase, a second phase and a third phase; and if the electronic equipment determines that the phase range comprises the first phase and the second phase, determining that the first phase and the second phase are fixed phases.
After the electronic equipment inquires the phase range, randomly selecting a plurality of phase values in the phase range as a phase period.
In a specific implementation, as shown in fig. 1B, the electronic device queries the phase range, determines that the phase range includes a first phase 0 and a second phase pi/2, but does not include a third phase pi, and determines that the first phase 0 and the second phase pi/2 are fixed phases.
As can be seen, in this example, the electronic device queries the phase range to determine whether the phase range includes a first phase, a second phase, and a third phase; if the electronic equipment determines that the phase range comprises the first phase and the second phase, determining that the first phase and the second phase are fixed phases; the method is beneficial to constructing a detection scene with different phases and meeting the requirement of the existence of the marginal phase value required by the circuit to be detected, is beneficial to reducing the omission factor, and is further beneficial to improving the accuracy of circuit detection.
In one possible example, the phase range is used to determine a plurality of random phases and/or at least one fixed phase, including: the electronic device determining a fixed phase in the range of phases; the electronic device randomly selects a plurality of random phase values in the phase range, and determines the plurality of random phase values as the plurality of random phases.
Wherein the random phase and the fixed phase may have the same value.
In a specific implementation, the electronic device determines that the fixed phase in the phase range is pi, and then the electronic device randomly selects a plurality of random phase values 3 pi/4, 7 pi/10 and the like in the phase range to determine that the plurality of random phase values are the plurality of random phases.
As can be seen, in this example, the electronic device determines a fixed phase in the range of phases; the electronic equipment randomly selects a plurality of random phase values in the phase range, and determines the plurality of random phase values as a plurality of random phases; the method is favorable for reducing invalid random selection, and further is favorable for improving the high efficiency of digital circuit inspection.
In one possible example, the jitter range is used to determine a plurality of random jitter frequencies and/or at least one fixed jitter frequency, including: and the electronic equipment queries a preset information base through the digital clock generator, and determines the corresponding jitter frequency in the jitter range as a random jitter frequency and/or a fixed jitter frequency by taking the random phase and the random period as query identifiers.
The preset information base is a mapping database preset by the digital clock generator and used for determining random jitter frequency and fixed jitter frequency in the jitter range.
In a specific implementation, as shown in fig. 1C, the electronic device queries a preset information base through the digital clock generator, determines that the corresponding jitter frequencies in the jitter range include a fast jitter frequency F1 and a normal jitter frequency F2 as random jitter frequencies by using the random phase and the random period as query identifiers, and determines that the slow jitter frequency F3 fixes the jitter frequency.
In this example, the electronic device queries a preset information base through the digital clock generator, and determines that the corresponding jitter frequency in the jitter range is a random jitter frequency and/or a fixed jitter frequency by using the random phase and the random period as query identifiers; the method is favorable for improving the diversity of the jitter frequency and further is favorable for improving the detection accuracy of the digital circuit.
In one possible example, the electronic device generates an emulated clock from the basic input parameters through the digital clock generator, including: the electronic equipment determines the simulation clock to be generated by using the random period, the random phase and the random jitter frequency as the basic input parameters through the digital clock generator; and the electronic equipment determines the simulation clock to be generated by using the fixed period, the fixed phase and the fixed jitter frequency as the basic input parameters through the digital clock generator.
The simulation clock generated by the basic input parameters can repeatedly detect the circuit to be detected, and different simulation clocks can detect the same circuit to be detected.
In a specific implementation, the electronic device determines the simulated clock X1 to be generated by the digital clock generator with the random period T1, the random phase W1 and the random jitter frequency V1 as the basic input parameters.
In a specific implementation, the electronic device determines the simulated clock X2 to be generated by the digital clock generator with the fixed period T2, the fixed phase W2 and the fixed jitter frequency V2 as the basic input parameters.
In this example, it can be seen that, the electronic device determines, by the digital clock generator, the simulation clock to be generated with the random period, the random phase, and the random jitter frequency as the basic input parameters; the electronic equipment determines the simulation clock to be generated by the digital clock generator by taking the fixed period, the fixed phase and the fixed jitter frequency as the basic input parameters; the method is favorable for improving the adaptability of the simulation clock and the circuit to be detected and the high efficiency and the accuracy of the digital circuit detection.
Referring to fig. 2, fig. 2 is a schematic flow chart of another simulation clock generation method provided in the embodiment of the present application, and the method is applied to an electronic device, where the electronic device includes a digital clock generator; as shown in the figure, the simulation clock generation method comprises the following steps:
s201, the electronic equipment acquires a circuit rule of a digital circuit to be detected;
s202, the electronic equipment determines the cycle range, the phase range and the jitter range of the simulation clock through the digital clock generator according to the circuit rule;
s203, the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator;
and S204, driving the digital circuit to be detected to generate a signal to be detected by using the simulation clock generated by the electronic equipment, and further determining the detection result of the digital circuit to be detected.
It can be seen that, in the embodiments of the present application, a method for generating an emulation clock and a related product are provided, which are applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps: firstly, electronic equipment acquires a circuit rule of a digital circuit to be detected; then the electronic equipment determines basic input parameters according to the circuit rule through the digital clock generator; then the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator, wherein the simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected; therefore, by the method, different simulation clocks are generated according to different basic input parameters, the requirements of various simulation scenes can be met, simulation personnel do not need to repeatedly generate clocks, time cost and labor cost are saved, and high efficiency and convenience of digital circuit inspection are improved.
In addition, the electronic equipment determines the period range, the phase range and the jitter range of the simulation clock through the digital clock generator according to the circuit rule, so that the adaptability of the simulation clock and the circuit to be detected is favorably improved, and the high efficiency of digital circuit detection is favorably improved.
Referring to fig. 3, fig. 3 is a schematic flow chart of another simulation clock generation method provided in the embodiment of the present application, and the method is applied to an electronic device, where the electronic device includes a digital clock generator; as shown in the figure, the simulation clock generation method comprises the following steps:
s301, the electronic equipment acquires a circuit rule of the digital circuit to be detected;
s302, the electronic equipment determines the cycle range, the phase range and the jitter range of the simulation clock through the digital clock generator according to the circuit rule;
s303, the electronic equipment inquires the phase range and determines whether the phase range comprises a first phase, a second phase and a third phase;
s304, if it is determined that the phase range includes the first phase and the second phase, the electronic device determines that the first phase and the second phase are fixed phases;
s305, the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator;
and S306, driving the digital circuit to be detected to generate a signal to be detected by using the simulation clock generated by the electronic equipment, and further determining the detection result of the digital circuit to be detected.
It can be seen that, in the embodiments of the present application, a method for generating an emulation clock and a related product are provided, which are applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps: firstly, electronic equipment acquires a circuit rule of a digital circuit to be detected; then the electronic equipment determines basic input parameters according to the circuit rule through the digital clock generator; then the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator, wherein the simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected; therefore, by the method, different simulation clocks are generated according to different basic input parameters, the requirements of various simulation scenes can be met, simulation personnel do not need to repeatedly generate clocks, time cost and labor cost are saved, and high efficiency and convenience of digital circuit inspection are improved.
Further, the electronic device queries the phase range, determining whether the phase range includes a first phase, a second phase, and a third phase; if the electronic equipment determines that the phase range comprises the first phase and the second phase, determining that the first phase and the second phase are fixed phases; the method is beneficial to constructing a detection scene with different phases and meeting the requirement of the existence of the marginal phase value required by the circuit to be detected, is beneficial to reducing the omission factor, and is further beneficial to improving the accuracy of circuit detection.
Consistent with the embodiments shown in fig. 1A, fig. 2, and fig. 3, please refer to fig. 4, and fig. 4 is a schematic structural diagram of an electronic device 400 provided in an embodiment of the present application, as shown in the figure, the electronic device 400 includes an application processor 410, a memory 420, a communication interface 430, and one or more programs 421, where the one or more programs 421 are stored in the memory 420 and configured to be executed by the application processor 410, and the one or more programs 421 include instructions for performing the following steps;
acquiring a circuit rule of a digital circuit to be detected;
determining, by the digital clock generator, a basic input parameter according to the circuit rule;
and generating an emulation clock according to the basic input parameters by the digital clock generator, wherein the emulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected.
It can be seen that, in the embodiments of the present application, a method for generating an emulation clock and a related product are provided, which are applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps: firstly, electronic equipment acquires a circuit rule of a digital circuit to be detected; then the electronic equipment determines basic input parameters according to the circuit rule through the digital clock generator; then the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator, wherein the simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected; therefore, by the method, different simulation clocks are generated according to different basic input parameters, the requirements of various simulation scenes can be met, simulation personnel do not need to repeatedly generate clocks, time cost and labor cost are saved, and high efficiency and convenience of digital circuit inspection are improved.
In one possible example, the determining, by the digital clock generator, the basic input parameters according to the circuit rule, the instructions in the program are specifically configured to perform the following operations: determining, by the digital clock generator, a period range, a phase range, and a jitter range of a simulation clock according to the circuit rule, wherein the period range is used for determining a plurality of random periods and/or at least one fixed period; the phase range is used for determining a plurality of random phases and/or at least one fixed phase; the jitter range is used to determine a plurality of random jitter frequencies and/or at least one fixed jitter frequency.
In one possible example, the period range is used to determine a plurality of random periods and/or at least one fixed period, and the instructions in the program are specifically configured to perform the following operations: determining a periodic random value in the periodic range according to the periodic range; and determining the plurality of random periods according to the period random value.
In one possible example, the phase range is used to determine a plurality of random phases and/or at least one fixed phase, and the instructions in the program are specifically configured to perform the following: querying the phase range to determine whether the phase range includes a first phase, a second phase, and a third phase; if the phase range is determined to include the first phase and the second phase, determining the first phase and the second phase as fixed phases.
In one possible example, the phase range is used to determine a plurality of random phases and/or at least one fixed phase, and the instructions in the program are specifically configured to perform the following: determining a fixed phase in the phase range; and randomly selecting a plurality of random phase values in the phase range, and determining the plurality of random phase values as the plurality of random phases.
In one possible example, the jitter range is used to determine a plurality of random jitter frequencies and/or at least one fixed jitter frequency, and the instructions in the program are specifically configured to perform the following operations: and inquiring a preset information base through the digital clock generator, and determining the corresponding jitter frequency in the jitter range as a random jitter frequency and/or a fixed jitter frequency by taking the random phase and the random period as inquiry identifiers.
In one possible example, the generating, by the digital clock generator, an emulated clock according to the basic input parameters, the instructions in the program being specifically configured to perform the following operations: determining the simulation clock to be generated by the digital clock generator with the random period, the random phase and the random jitter frequency as the basic input parameters; and determining the simulation clock to be generated by using the digital clock generator and taking the fixed period, the fixed phase and the fixed jitter frequency as the basic input parameters.
The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It is understood that the electronic device comprises corresponding hardware structures and/or software modules for performing the respective functions in order to realize the above-mentioned functions. Those of skill in the art will readily appreciate that the present application is capable of hardware or a combination of hardware and computer software implementing the various illustrative elements and algorithm steps described in connection with the embodiments provided herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the electronic device may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
Fig. 5 is a block diagram of functional units of the simulation clock generation apparatus 500 according to the embodiment of the present application. The simulation clock generating apparatus 500 is applied to an electronic device including a digital clock generator; the artificial clock generating device 500 comprises a processing unit 501, a communication unit 502 and a storage unit 503, wherein,
the processing unit 501 is configured to obtain a circuit rule of the digital circuit to be detected; and for determining, by the digital clock generator, basic input parameters according to the circuit rules; and the digital clock generator is used for generating an emulation clock according to the basic input parameters, wherein the emulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected.
It can be seen that, in the embodiments of the present application, a method for generating an emulation clock and a related product are provided, which are applied to an electronic device, where the electronic device includes a digital clock generator; the method comprises the following steps: firstly, electronic equipment acquires a circuit rule of a digital circuit to be detected; then the electronic equipment determines basic input parameters according to the circuit rule through the digital clock generator; then the electronic equipment generates a simulation clock according to the basic input parameters through the digital clock generator, wherein the simulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected; therefore, by the method, different simulation clocks are generated according to different basic input parameters, the requirements of various simulation scenes can be met, simulation personnel do not need to repeatedly generate clocks, time cost and labor cost are saved, and high efficiency and convenience of digital circuit inspection are improved.
It can be understood that, since the method embodiment and the apparatus embodiment are different presentation forms of the same technical concept, the content of the method embodiment portion in the present application should be synchronously adapted to the apparatus embodiment portion, and is not described herein again.
In a possible example, the processing unit 501 is specifically configured to determine, by the digital clock generator, a basic input parameter according to the circuit rule, and to: determining, by the digital clock generator, a period range, a phase range, and a jitter range of a simulation clock according to the circuit rule, wherein the period range is used for determining a plurality of random periods and/or at least one fixed period; the phase range is used for determining a plurality of random phases and/or at least one fixed phase; the jitter range is used to determine a plurality of random jitter frequencies and/or at least one fixed jitter frequency.
In a possible example, the period range is used to determine a plurality of random periods and/or at least one fixed period, and the processing unit 501 is specifically configured to: determining a periodic random value in the periodic range according to the periodic range; and determining the plurality of random periods according to the period random value.
In one possible example, the phase range is used to determine a plurality of random phases and/or at least one fixed phase, and the processing unit 501 is specifically configured to: querying the phase range to determine whether the phase range includes a first phase, a second phase, and a third phase; if the phase range is determined to include the first phase and the second phase, determining the first phase and the second phase as fixed phases.
In one possible example, the phase range is used to determine a plurality of random phases and/or at least one fixed phase, and the processing unit 501 is specifically configured to: determining a fixed phase in the phase range; and randomly selecting a plurality of random phase values in the phase range, and determining the plurality of random phase values as the plurality of random phases.
In one possible example, the jitter range is used to determine a plurality of random jitter frequencies and/or at least one fixed jitter frequency, and the processing unit 501 is specifically configured to: and inquiring a preset information base through the digital clock generator, and determining the corresponding jitter frequency in the jitter range as a random jitter frequency and/or a fixed jitter frequency by taking the random phase and the random period as inquiry identifiers.
In a possible example, the processing unit 501 is specifically configured to generate, by the digital clock generator, an emulated clock according to the basic input parameters, and to: determining the simulation clock to be generated by the digital clock generator with the random period, the random phase and the random jitter frequency as the basic input parameters; and determining the simulation clock to be generated by using the digital clock generator and taking the fixed period, the fixed phase and the fixed jitter frequency as the basic input parameters.
Embodiments of the present application also provide a computer storage medium, where the computer storage medium stores a computer program for electronic data exchange, the computer program enabling a computer to execute part or all of the steps of any one of the methods described in the above method embodiments, and the computer includes an electronic device.
Embodiments of the present application also provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods as described in the above method embodiments. The computer program product may be a software installation package, the computer comprising an electronic device.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A simulation clock generation method is applied to an electronic device, wherein the electronic device comprises a digital clock generator; the method comprises the following steps:
acquiring a circuit rule of a digital circuit to be detected;
determining, by the digital clock generator, a basic input parameter according to the circuit rule;
and generating an emulation clock according to the basic input parameters by the digital clock generator, wherein the emulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected.
2. The method of claim 1, wherein determining, by the digital clock generator, the basic input parameters according to the circuit rule comprises:
determining, by the digital clock generator, a period range, a phase range, and a jitter range of a simulation clock according to the circuit rule, wherein the period range is used for determining a plurality of random periods and/or at least one fixed period; the phase range is used for determining a plurality of random phases and/or at least one fixed phase; the jitter range is used to determine a plurality of random jitter frequencies and/or at least one fixed jitter frequency.
3. The method of claim 2, wherein the period range is used to determine a plurality of random periods and/or at least one fixed period, comprising:
determining a periodic random value in the periodic range according to the periodic range;
and determining the plurality of random periods according to the period random value.
4. The method of claim 2, wherein the phase range is used to determine a plurality of random phases and/or at least one fixed phase, comprising:
querying the phase range to determine whether the phase range includes a first phase, a second phase, and a third phase;
if the phase range is determined to include the first phase and the second phase, determining the first phase and the second phase as fixed phases.
5. The method of claim 2, wherein the phase range is used to determine a plurality of random phases and/or at least one fixed phase, comprising:
determining a fixed phase in the phase range;
and randomly selecting a plurality of random phase values in the phase range, and determining the plurality of random phase values as the plurality of random phases.
6. The method according to claim 3, wherein the jitter range is used for determining a plurality of random jitter frequencies and/or at least one fixed jitter frequency, comprising:
and inquiring a preset information base through the digital clock generator, and determining the corresponding jitter frequency in the jitter range as a random jitter frequency and/or a fixed jitter frequency by taking the random phase and the random period as inquiry identifiers.
7. The method of claim 1, wherein generating an emulated clock from the basic input parameters by the digital clock generator comprises:
determining the simulation clock to be generated by the digital clock generator with the random period, the random phase and the random jitter frequency as the basic input parameters;
and determining the simulation clock to be generated by using the digital clock generator and taking the fixed period, the fixed phase and the fixed jitter frequency as the basic input parameters.
8. An emulation clock generating apparatus, applied to an electronic device, the electronic device including a digital clock generator; the simulation clock generating device comprises a processing unit, a communication unit and a storage unit, wherein,
the processing unit is used for acquiring the circuit rule of the digital circuit to be detected; and for determining, by the digital clock generator, basic input parameters according to the circuit rules; and the digital clock generator is used for generating an emulation clock according to the basic input parameters, wherein the emulation clock is used for driving the digital circuit to be detected to generate a signal to be detected, and the signal to be detected is used for determining a detection result of the digital circuit to be detected.
9. An electronic device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method of any of claims 1-7.
10. A computer-readable storage medium, characterized in that a computer program for electronic data exchange is stored, wherein the computer program causes a computer to perform the method according to any one of claims 1-7.
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| CN114499728A (en) * | 2020-11-11 | 2022-05-13 | 迈普通信技术股份有限公司 | Associated clock jitter suppression method and device for E1 link and electronic equipment |
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