CN111308882B - Circuit system for pseudo satellite clock synchronization and working method thereof - Google Patents
Circuit system for pseudo satellite clock synchronization and working method thereof Download PDFInfo
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- G04—HOROLOGY
- G04R—RADIO-CONTROLLED TIME-PIECES
- G04R20/00—Setting the time according to the time information carried or implied by the radio signal
- G04R20/02—Setting the time according to the time information carried or implied by the radio signal the radio signal being sent by a satellite, e.g. GPS
- G04R20/06—Decoding time data; Circuits therefor
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- G—PHYSICS
- G04—HOROLOGY
- G04R—RADIO-CONTROLLED TIME-PIECES
- G04R20/00—Setting the time according to the time information carried or implied by the radio signal
- G04R20/02—Setting the time according to the time information carried or implied by the radio signal the radio signal being sent by a satellite, e.g. GPS
- G04R20/04—Tuning or receiving; Circuits therefor
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Abstract
The invention relates to a circuit system for pseudo-satellite clock synchronization and a working method thereof, belonging to the technical field of indoor positioning navigation. The system comprises a reference signal source module and a plurality of pseudo satellite signal generating modules, wherein the reference signal source module comprises a reference signal source, a frequency divider and a BPSK modulator and is used for providing clock information and synchronization information for the pseudo satellite signal generating modules. The pseudo satellite signal generation module comprises a receiving circuit, a clock recovery circuit, a pulse width detection circuit, an information code generation module and a transmitting circuit. According to the invention, accurate time information does not need to be acquired, a high-precision clock and a local clock are saved, and the cost is saved; the clock recovery circuit directly recovers the clock from the signal sent by the reference signal source module, so that the carrier signal synchronization can be completed, and the complex capturing, tracking, coding and decoding circuits are saved; the pulse width detection circuit can complete the synchronization of information code modulation by detecting the change of the phase discriminator caused by the periodic phase jump.
Description
Technical Field
The invention relates to a circuit system for pseudo-satellite clock synchronization and a working method thereof, belonging to the technical field of indoor positioning navigation.
Background
The global positioning system can provide all-weather, uninterrupted and high-precision real-time positioning, navigation and time service information for users. However, since the satellite navigation signal is an electromagnetic wave in nature, it is susceptible to various kinds of interference, so that the received signal is weak. Particularly, when the GNSS receiver works indoors, satellite signals are greatly attenuated by buildings and even no signal occurs, so that the positioning accuracy is low or the positioning cannot be performed. In response to the situation, the main solutions at present include WLAN assisted positioning, UMTS assisted positioning, inertial navigation, infrared positioning, ultrasonic positioning, and the like. Each of these solutions has advantages, but are still not mature enough and make seamless engagement with GNSS systems difficult. The pseudolite can be conveniently applied to regions without satellite signals, such as indoor parking lots and underground parking lots, due to the characteristics of controllable transmission power, flexible quantity and random arrangement.
In practical application, the pseudolite system only stays in a theoretical or experimental stage and is not popularized in a large range. The main reason for this is that accurate pseudolite coordinate information and pseudorange observation information are required for accurate positioning based on the pseudolite system. The acquisition process of the pseudo-satellite coordinate information comprises the steps of firstly obtaining the pseudo-satellite coordinate position through accurate measurement, then writing the pseudo-satellite coordinate position into an ephemeris of a pseudo-satellite, and finally obtaining the pseudo-satellite coordinate position through ephemeris decoding by a receiver. And pseudorange observations need to be obtained by multiplying the time difference from each pseudolite to the receiver by the speed of light. Only if the transmission clocks of all the pseudolites are accurately synchronized can the effectiveness of the pseudo-range observed values from the receiver to all the pseudolites be guaranteed. Therefore, synchronization of clocks between pseudolites is a difficult and critical issue in pseudolite application.
Because the pseudolite is mainly used for providing more accurate positioning information for users in a satellite signal shielding area, and the requirement on the accuracy of time service information is not high, the application requirement can be met only by providing the same clock synchronization signal for each pseudolite. The existing clock synchronization circuit technology needs to perform time calibration on a pseudo satellite by combining a high-precision clock with a known information source and a known pseudo satellite position, and a required capturing, tracking, coding and decoding circuit consumes more resources and has higher cost; yet another approach is to synchronize the clock by the master station transmitting a clock signal and a synchronization signal, which is detected by inserting a specific symbol, which also consumes a lot of hardware resources. Aiming at the defects of the existing clock synchronization method, a hardware circuit system for saving resources is required to be designed to realize the synchronization of the carrier signal of the pseudo satellite module and the synchronization of the information code modulation.
Disclosure of Invention
In view of the deficiencies of the prior art, the present invention discloses a circuit system for pseudolite clock synchronization.
The invention also discloses a working method of the circuit system for synchronizing the pseudolite clock.
The technical scheme of the invention is as follows:
circuitry for pseudolite clock synchronization, comprising: a reference signal source module and more than 4 pseudo satellite signal generating modules;
the reference signal source module is used for providing clock information and synchronization information for each pseudo satellite signal generation module, the clock information is used for enabling a clock recovery circuit in the pseudo satellite signal generation module to recover and generate clock signals, the synchronization information is used for enabling a pulse width detection circuit in the pseudo satellite signal generation module to detect and generate synchronization signals, the pseudo satellite signal generation modules with the number of 4 or more transmit pseudo satellite signals which are accurately synchronized under the action of the clock signals and the synchronization signals, and the pseudo satellite signals are provided for pseudo satellite users.
Preferably, the reference signal source module includes a reference signal source, a frequency divider, a BPSK modulator, and a transmitting circuit, where the reference signal source is configured to generate a reference clock signal of the entire system, the BPSK modulator is a binary phase shift keying modulator and serves as a phase jump circuit, one path of the reference signal source provides an input carrier signal for the BPSK modulator, the other path of the reference signal source is connected to the frequency divider, the frequency divider is configured to divide the frequency of a signal output by the reference signal source, the frequency divider divides the frequency of the signal output by the reference signal source and serves as a modulation signal of the BPSK modulator, and the transmitting circuit includes a power amplifier PA and a transmitting antenna.
The phase jump circuit refers to a BPSK modulation circuit in the reference signal source module and can generate periodic 180-degree phase jump.
Preferably, the pseudo satellite signal generating module comprises a receiving circuit, a clock recovery circuit, a pulse width detection circuit, an information code generating module, a BPSK modulator and a transmitting circuit,
the receiving circuit comprises a Low Noise Amplifier (LNA), a band-pass filter (BPF) and a driving module; the receiving circuit is used for receiving signals sent by the reference signal source module, and the usability of the signals is improved through the low-noise amplifier, the band-pass filter and the driving circuit;
the clock recovery circuit comprises a phase discriminator PFD, a charge pump CHP, a loop filter LPF and a voltage controlled oscillator VCO, wherein the phase discriminator, the charge pump, the loop filter and the voltage controlled oscillator are sequentially connected end to end, the output end of the voltage controlled oscillator is the output end of the clock recovery circuit, and the output signal of the clock recovery circuit is a satellite carrier signal; the input end of the phase discriminator is connected with a driving module of the receiving circuit, one path of output signal of the phase discriminator is connected to the charge pump, the signal of the other path of up end of the phase discriminator is the input end of the pulse width detection circuit, the other path of up end of the phase discriminator outputs a phase error signal, and the phase error signal is a pulse signal with a certain width; the clock recovery circuit uses the signal processed by the receiving circuit as an input reference, performs clock recovery on the input reference signal through phase error feedback, and the output frequency of the clock recovery circuit is the satellite carrier frequency fcThe clock recovery circuit is used for ensuring that carrier signals generated by each pseudo satellite generating module have the same frequency and phase, and the clock recovery circuit is also used for detecting phase jump information in input signals, so that an internal phase discriminator outputs phase error signals under the condition that the output carrier signals are not influenced, and the phase error signals are pulse signals with certain width.
The pulse width detection circuit comprises a delay circuit and a phase comparison circuit, one path of signal at the input end of the pulse width detection circuit is connected to the phase comparison circuit, the other path of signal is connected to the delay circuit, the output end of the delay circuit is connected to the phase comparison circuit, and the output end of the phase comparison circuit is the output end of the pulse width detection circuit; an input signal of the pulse width detection circuit forms a delay signal after passing through a delay circuit; the pulse width detection circuit generates a negative pulse when the phase jumps by detecting the pulse width of the up end of the phase discriminator, thereby achieving the purpose of extracting the synchronous signal.
The information code generation module comprises an ephemeris data generation module, a pseudo-random code data generation module, an AND logic module, an output control module, a frequency divider 1 and a frequency divider 2, wherein the ephemeris data generation moduleThe data generation module writes the coordinate position of the pseudo-satellite signal generation module into ephemeris parameters and generates required ephemeris information data, and the pseudo-random code generation module generates pseudo-random codes compatible with GNSS signals; the input end of the frequency divider 1 is connected to a voltage-controlled oscillator of a clock recovery circuit, the output end of the frequency divider 1 is connected to a pseudo-random code data generation module, the pseudo-random code data generation module is used for generating pseudo-random codes, the input end of the frequency divider 2 is connected to the frequency divider 1, the output of the frequency divider 2 is connected to an ephemeris data generation module, the ephemeris data generation module is used for generating ephemeris data, the ephemeris data generation module and the pseudo-random code data generation module are both connected to the AND logic module, the AND logic module is used for carrying out AND operation on the ephemeris data and the pseudo-random codes to generate the information codes, the output end of the AND logic module is connected to an output control module, the output control module is connected to the output end of a pulse width detection circuit, a control signal of the output control module is derived from an output signal of the pulse width detection circuit, the output signal of the information code generating module is an information code; the output control module starts to follow the frequency f under the synchronization of the synchronous signal0Generating an information code, wherein the information code is modulated to the carrier waves with the same frequency and the same phase in a BPSK mode;
the output end of the information code generation module and the output end of the clock recovery circuit are both connected to a BPSK modulator, and the BPSK modulator is connected with the transmitting circuit;
the transmitting circuit comprises a power amplifier PA and a transmitting antenna, and is used for transmitting the pseudo satellite signals modulated by the BPSK modulator to a space to be positioned through the transmitting antenna so as to provide pseudo satellite positioning signals for pseudo satellite users.
The BPSK modulators in the pseudo-satellite signal generation modules have the same functions as the BPSK modulators in the reference signal source module. F is0Is the frequency of a pseudo-random code, said fcIs the carrier frequency of the satellite.
Further preferably, the reference signal source is used for generating a reference clock signal of the whole system, the frequency of which isRate of 2fc；
The frequency divider is used for dividing the frequency of the signal output by the reference signal source to generate a signal with a period twice the period of the satellite frame;
the BPSK modulator in the reference signal source module is configured to generate a clock signal with a phase jump of 180 ° every other frame period.
Preferably, each pseudolite signal generation module needs to be adjusted when being arranged, so that distances between each pseudolite signal generation module and the reference signal source module are all completely equal to d, and it is ensured that the clock signals and the synchronization signals received by each pseudolite signal generation module are strictly in phase.
Further preferably, each pseudo random code data generation module in each pseudo satellite signal generation module respectively adopts different pseudo random codes.
A working method of a circuit system utilizing the pseudolite clock synchronization comprises the following specific steps:
(1) the reference signal source module divides the frequency of a signal output by a reference signal source into signals with a period being two times of a satellite frame period through a frequency divider, and then carries out BPSK modulation on the signals of the reference signal source and the signals obtained through frequency division through a BPSK modulator to generate reference signals jumping 180 degrees in phase every other frame period, wherein the reference signals refer to signals finally emitted by the reference signal source module and comprise clock information and synchronous information, the pseudo-satellite signal generation module can recover and detect clock signals and synchronous signals from the reference signals, the reference signals are sent to each pseudo-satellite signal generation module with the same distance with the reference signal source module, and the signals received by each pseudo-satellite signal generation module are guaranteed to be strictly in-phase and in-phase;
(2) each pseudo satellite signal generation module receives the same-frequency and same-phase reference signals sent by the reference signal source module, and the received signals are filtered, amplified in low noise and driven by the receiving circuit, so that the usability of the received signals is increased;
(3) the clock recovery circuit takes the signal processed by the receiving circuit as an input reference signal, and performs phase locking by utilizing the principle of negative feedback, thereby generating a satellite carrier signal with the same frequency and phase as required; the same-frequency and same-phase signals mean that the signals used as carriers by each pseudo satellite generating module are signals with the same frequency and the same phase;
the phase discriminator in the clock recovery circuit is used for comparing the phases of the output signal and the reference signal and outputting the phase difference value of the output signal and the reference signal, and the phase discriminator and the charge pump work at 2fcThe phase detector outputs periodic spike pulses after the clock recovery circuit is locked, and after the clock recovery circuit receives 180-degree phase jump, the phase detector outputs a group of wide pulses to the charge pump to balance the influence caused by the phase jump and ensure that the circuit is still in a locked state;
(4) the pulse width detection circuit generates synchronous signals for modulating the information codes of all the pseudolites to the carrier wave at the same time by detecting the output signals of the up end of the phase discriminator; the pulse width detection circuit delays the pulse signal at the up end of the phase discriminator and then performs NAND operation with the undelayed original signal to be used as an output mark signal; when the system is arranged, the delay time is adjusted, the threshold value of the detection circuit is set, and only the widest pulse signal can be detected when the phase jumps each time, namely only one negative pulse signal is generated; when a negative pulse signal is detected, entering the step (5); when the negative pulse signal is not detected, the output control module does not modulate the information code onto the carrier signal. At the moment, the system continues to circularly detect the negative pulse signal until the negative pulse signal appears;
(5) after receiving the negative pulse output by the pulse width detection circuit, an output control module in the information code generation module starts to modulate the information code onto a carrier signal through a BPSK modulator, so that the initial code phases of all the pseudolite generation modules are ensured to be the same; meanwhile, under the action of the frequency divider 1 and the frequency divider 2, the output control module controls the information code generation module to receive the first synchronous signal and then to generate the control information code according to the frequency f0Producing output information codes, i.e. only requiring one synchronisation, each pseudolite being generatedThe module can generate subsequent synchronous signals according to the first synchronous signal to ensure that the pseudo satellite signals are continuously and synchronously transmitted; the phase mutation generated by the reference signal source module is periodic and can be used for periodic synchronization, so that the clock deviation generated by one-time synchronization is reduced, and the stability of the system is ensured;
(6) the BPSK modulator in the pseudo satellite signal generation module performs BPSK modulation by using the same-frequency and same-phase signal output by the clock recovery circuit as a satellite carrier signal and using the information code with the same initial code phase generated by the information code generation module as a modulation signal to generate a required pseudo satellite signal; the same frequency and same phase as the initial code phase both refer to the signal relationship between the pseudo satellite signal generating modules;
(7) and (3) a transmitting circuit in the pseudo satellite signal generating module amplifies the power of the pseudo satellite signal generated by the BPSK modulator in the step (6), and transmits the pseudo satellite signal to a space to be positioned through an antenna to provide a required pseudo satellite positioning signal for a pseudo satellite user.
The invention has the beneficial effects that:
1. the invention aims to solve the problem of clock synchronization among all pseudolite modules in a pseudolite system, and through the proposed clock synchronization circuit system and the method thereof, all pseudolites are ensured to simultaneously transmit pseudolite signals with the same frequency and phase, and the positioning precision of the whole pseudolite system is improved. The invention aims at the characteristics that the pseudolite system only needs positioning and does not need precise time service, and the pseudolite does not need a high-precision atomic clock, thereby saving the cost of the system.
2. According to the invention, a hardware circuit system for clock synchronization is designed to perform clock synchronization of each pseudolite, so that the carrier phase and the initial code phase of the pseudolite signal transmitted by each pseudolite are ensured to be the same, and the accuracy of a pseudo-range observation value in the pseudolite system is improved.
3. The invention provides reference clock information for the whole pseudolite system through a reference signal source module, and the clock recovery is carried out by the clock recovery circuit which is completely equidistant to the reference signal source module, thereby ensuring the high-precision synchronization of the recovered carrier phase.
4. The invention adopts the phase jump combined with the pulse width detection circuit to obtain the synchronizing signal, has simpler circuit structure, and saves hardware resources by comparing the method for determining the synchronizing signal by encoding and decoding, improves the precision of the initial code phase and further improves the positioning precision of the pseudolite positioning system.
5. The whole system structure of the scheme is simple, a local clock is not needed, accurate time service is not needed, a wireless transmitting mode is adopted between the information source module and the pseudo satellite signal module, and the costs of optical fibers, a monitoring station, a network management center and the like are saved. The scheme of the application is designed for the signal synchronization problem among the pseudolite modules, and is not only a principle solution, but also a specific circuit-level clock synchronization system.
Drawings
FIG. 1 is a schematic block diagram of a pseudolite clock synchronization system in accordance with the present invention;
FIG. 2 is a circuit diagram of a reference signal source module according to the present invention;
fig. 3 is a circuit diagram of a pseudolite signal generation module according to the present invention.
Fig. 4 is a circuit diagram of an implementation of the pulse width detection circuit according to the present invention.
Detailed Description
The invention is further described, but not limited to, in the following description, in conjunction with the drawings and examples:
example 1
Circuitry for pseudolite clock synchronization, for example for use in a GPS pseudolite system of the L1 band, comprising: a reference signal source module and 4 pseudolite signal generation modules as shown in figure 1. The reference signal source module is used for providing clock information and synchronization information for each pseudo satellite signal generation module, the clock information is used for enabling a clock recovery circuit in the pseudo satellite signal generation module to recover and generate clock signals, the synchronization information is used for enabling a pulse width detection circuit in the pseudo satellite signal generation module to detect and generate synchronization signals, the 4 pseudo satellite signal generation modules emit pseudo satellite signals which are accurately synchronized under the action of the clock signals and the synchronization signals, and the pseudo satellite signals are provided for pseudo satellite users.
The "clock information and synchronization information" herein are not the clock signal generated by the clock recovery circuit and the synchronization signal generated by the pulse width detection circuit. The reference signal source module modulates the frequency-divided signal (i.e., the provided synchronization information) on the carrier signal, and the pulse width detection circuit can detect the synchronization signal. The clock signal and the synchronization signal are concepts in the pseudo satellite generating module, and the signal emitted by the reference signal source module can enable the pseudo satellite generating module to recover and detect the clock signal and the synchronization signal.
The reference signal source module comprises a reference signal source, a frequency divider, a BPSK modulator and a transmitting circuit, the reference signal source is used as an input carrier signal of the BPSK modulator, the reference signal source is used for generating a reference clock signal of the whole system, the frequency divider divides the frequency of the reference signal source into frequency division signals which are used as modulation signals of the BPSK modulator, and the transmitting circuit comprises a power amplifier PA and a transmitting antenna, as shown in fig. 2; the 4 pseudolite signal generation modules include a receiving circuit, a clock recovery circuit, a pulse width detection circuit, an information code generation module, a BPSK modulator and a transmitting circuit, as shown in fig. 3, the receiving circuit includes a low noise amplifier LNA, a band pass filter BPF and a driving module, the clock recovery circuit includes a phase discriminator PFD, a charge pump CHP, a loop filter LPF and a voltage controlled oscillator VCO, the phase discriminator, the charge pump, the loop filter and the voltage controlled oscillator are connected end to end, the pulse width detection circuit includes a delay circuit and a phase comparison circuit, one input end of the phase comparison circuit is directly led from an input end of the pulse width detection circuit, the other input end of the phase comparison circuit is led from a delay signal of an input signal of the pulse width detection circuit after passing through the delay circuit, an output end of the phase comparison circuit is connected to an output end of the pulse width detection circuit, the input signal of the pulse width detection circuit is led from the up end of the phase discriminator, the information code generation module comprises an ephemeris data generation module, a pseudo-random code data generation module, a logic module, an output control module, a frequency divider 1 and a frequency divider 2, the output of the frequency divider 1 is connected with the pseudo-random code data generation module, the output of the frequency divider 2 is connected with the ephemeris data generation module, the ephemeris data and the pseudo-random code are subjected to and operation by the logic module to generate the information code, the control signal of the output control module is led from the output end of the pulse width detection circuit, and the transmitting circuit comprises a Power Amplifier (PA) and a transmitting antenna.
The reference signal source module is used for providing clock information and synchronization information for each pseudo satellite signal generation module, the reference signal source is used for generating a reference clock signal of the whole system, the frequency of the reference clock signal is 3150.84MHz, the frequency divider is used for dividing the frequency of the reference signal source to generate a signal with the period being twice the GPS frame period (60s), and the BPSK modulator is used for generating a clock signal with 180-degree phase jump every other frame period (30 s); the 4 pseudolite signal generation modules need to be adjusted when being arranged, so that the distances between each pseudolite signal generation module and the reference signal source module are completely equal to d, as shown in fig. 1, signals received by each pseudolite signal generation module are ensured to be strictly in phase, the 4 pseudolite signal generation modules transmit precisely synchronized pseudolite signals under the action of clock signals and synchronizing signals, the clock signals are same-frequency and same-phase reference clock signals provided by the reference signal source, the synchronizing signals are synchronizing mark signals which ensure that information codes of each pseudolite are simultaneously modulated onto carrier waves, the receiving circuit is used for receiving signals transmitted by the reference signal source module, the usability of the signals is improved through a low-noise amplifier, a band-pass filter and a driving circuit, and the clock recovery circuit utilizes the signals processed by the receiving circuit as input references, the clock recovery circuit is used for ensuring that carrier signals generated by each pseudo-satellite generating module are in the same frequency and phase, the clock recovery circuit is also used for detecting phase jump information in the input signals, an internal phase discriminator outputs phase error signals under the condition that the output carrier signals are not influenced, the phase error signals are pulse signals with a certain width, the pulse width detection circuit generates negative pulses during phase jump by detecting the pulse width of an up end of the phase discriminator to achieve the purpose of extracting the synchronous signals, the ephemeris data generating module in the information code generating module compiles the coordinate position of the pseudo-satellite signal generating module into GPS ephemeris parameters to generate the needed GPS ephemeris data, the pseudo-random code generating module generates pseudo-random codes compatible with GPS signals, each module in the multi-channel pseudo-satellite signal generating module adopts different pseudo-random codes, and the output control module starts to generate information codes according to the frequency of 1.023MHz under the synchronization of the synchronous signals. And the transmitting circuit transmits the modulated pseudo satellite signal to a space to be positioned through an antenna to provide a pseudo satellite positioning signal for a pseudo satellite user.
Example 2
An operating method of a circuit system for synchronizing a pseudo satellite clock of a GPS-based L1 frequency band according to embodiment 1 includes:
(1) the reference signal source module divides the frequency of a reference signal source into signals with the period being two times of the GPS frame period (60s) through a frequency divider, then the BPSK modulator conducts BPSK modulation on the signals of the reference signal source and the signals obtained through frequency division to generate reference signals with the phase jumping of 180 degrees every other frame period (30s), and the reference signals are sent to all pseudo satellite signal generating modules with the same distance from the reference signal source module, so that the signals received by all the pseudo satellite signal generating modules are guaranteed to be strictly in the same frequency and phase.
(2) Each pseudo satellite signal generation module receives signals with the same frequency and the same phase, which are sent by the reference signal source module, and the received signals are filtered, amplified with low noise and driven by the receiving circuit, so that the usability of the received signals is increased.
(3) The clock recovery circuit takes the signal processed by the receiving circuit as an input reference signal, and performs phase locking by using the principle of negative feedback, thereby generating a carrier signal of the satellite carrier frequency with the same frequency and phase as required. The same-frequency and same-phase signals mean that the signals used as carriers by each pseudo satellite generating module are same-frequency and same-phase signals.
The phase discriminator in the clock recovery circuit is used for comparing the phases of the output signal and the reference signal and outputting the phase difference value of the output signal and the reference signal. The phase detector and the charge pump work at 3150.84MHz frequency, and the phase detector outputs periodic spike pulse after the clock recovery circuit is locked. When the clock recovery circuit receives a 180 ° phase jump, the phase detector outputs a group of wide pulses to the charge pump to balance the effects of the phase jump and ensure that the circuit is still in a locked state.
(4) The pulse width detection circuit generates synchronous signals for simultaneously modulating the information codes of all the pseudolites to the carrier by detecting the output signals of the up end of the phase discriminator. The pulse width detection circuit delays the pulse signal at the up end of the phase discriminator and then performs NAND operation with the undelayed original signal to serve as an output mark signal. When the system is installed, the threshold value of the detection circuit can be changed by reasonably adjusting the delay time, and only the widest pulse signal can be detected when the phase jumps each time, namely only one negative pulse signal is generated. And (5) when the negative pulse signal is detected, the step is carried out, and when the negative pulse signal cannot be detected, the output control module cannot modulate the information code on the carrier signal. At which point the system will continue to cycle through the detection of negative going signals until they occur.
(5) And the output control module in the information code generation module starts to modulate the information code on a carrier signal after receiving the negative pulse output by the pulse width detection circuit, so as to ensure that the initial code phases of the pseudolite generation modules are the same. Meanwhile, under the action of the frequency divider 1 and the frequency divider 2, the output control module controls the information code generation module to generate the output information code according to the frequency of 1.023MHz after receiving the first synchronizing signal, namely, each pseudolite generation module can generate subsequent synchronizing signals according to the first synchronizing signal only by one-time synchronization, so that the pseudolite signals are continuously and synchronously transmitted. The phase jump generated by the reference signal source module is periodic and can be used for periodic synchronization, thereby reducing the clock deviation generated by only one-time synchronization and ensuring the stability of the system.
(6) The BPSK modulation module performs BPSK modulation by using the signals with the same frequency and phase output by the clock recovery circuit as carrier signals and using the information codes with the same initial code phase generated by the information code generation module as modulation signals to generate required pseudolite signals. The same frequency and phase as the initial code phase both refer to the signal relationship between the pseudolite signal generation modules.
(7) And (3) after the transmitting circuit in the pseudo satellite signal generating module amplifies the power of the pseudo satellite signal generated by the BPSK modulating module in the step (6), transmitting the pseudo satellite signal to a space to be positioned through an antenna, and providing a needed GPS pseudo satellite positioning signal for a pseudo satellite user.
Example 3
A circuit system for pseudolite clock synchronization, for example, in a Beidou B1 frequency band pseudolite system, comprises: a reference signal source module and 4 pseudo satellite signal generating modules. The reference signal source module comprises a reference signal source, a frequency divider, a BPSK modulator and a transmitting circuit, the reference signal source is used as an input carrier signal of the BPSK modulator, the frequency divider divides the frequency of the reference signal source to be used as a modulation signal of the BPSK modulator, and the transmitting circuit comprises a Power Amplifier (PA) and a transmitting antenna; the 4 pseudo satellite signal generation modules comprise a receiving circuit, a clock recovery circuit, a pulse width detection circuit, an information code generation module, a BPSK modulator and a transmitting circuit, wherein the receiving circuit comprises a Low Noise Amplifier (LNA), a Band Pass Filter (BPF) and a driving module, the clock recovery circuit comprises a phase discriminator (PFD), a charge pump (CHP), a loop filter (LPF) and a Voltage Controlled Oscillator (VCO), the phase discriminator, the charge pump, the loop filter and the voltage controlled oscillator are connected end to end, the pulse width detection circuit comprises a delay circuit and a phase comparison circuit, one input end of the phase comparison circuit is directly led from the input end of the pulse width detection circuit, the other input end of the phase comparison circuit is led from a delay signal of an input signal of the pulse width detection circuit after passing through the delay circuit, and the output end of the phase comparison circuit is connected to the output end of the pulse width detection circuit, the input signal of the pulse width detection circuit is led from the up end of the phase discriminator, the information code generation module comprises an ephemeris data generation module, a pseudo-random code data generation module, a logic module, an output control module, a frequency divider 1 and a frequency divider 2, the output of the frequency divider 1 is connected with the pseudo-random code data generation module, the output of the frequency divider 2 is connected with the ephemeris data generation module, the ephemeris data and the pseudo-random code are subjected to and operation by the logic module to generate the information code, the control signal of the output control module is led from the output end of the pulse width detection circuit, and the transmitting circuit comprises a Power Amplifier (PA) and a transmitting antenna.
The reference signal source module is used for providing clock signals and synchronous signals for each pseudo satellite signal generation module, the reference signal source is used for generating reference clock signals of the whole system, the frequency of the reference clock signals is 3122.196MHz, the frequency divider is used for dividing the frequency of the reference signal source to generate signals with the period being twice of the Beidou D1 telegraph text main frame period (60s), and the BPSK modulator is used for generating clock signals with 180-degree phase jump every other main frame period (30 s); the 4 pseudo satellite signal generating modules need to be adjusted when being arranged, so that the distances between each pseudo satellite signal generating module and the reference signal source module are completely equal to d, and the signals received by each pseudo satellite signal generating module are ensured to be strictly in phase, the 4 pseudo satellite signal generating modules transmit precisely synchronous pseudo satellite signals under the action of clock signals and synchronous signals, the receiving circuit is used for receiving the signals transmitted by the reference signal source module, the usability of the signals is improved through a low noise amplifier, a band-pass filter and a driving circuit, the clock recovery circuit uses the signals processed by the receiving circuit as input references, performs clock recovery on the input reference signals through phase error feedback, outputs signals with the satellite carrier frequency of 1561.098MHz, and is used for ensuring that the carrier signals generated by each pseudo satellite generating module are in the same frequency and phase, the clock recovery circuit is also used for detecting phase jump information in an input signal, an internal phase discriminator outputs a phase error signal under the condition that an output carrier signal is not influenced, the phase error signal is a pulse signal with a certain width, the pulse width detection circuit generates a negative pulse when the phase jumps by detecting the pulse width of an up end of the phase discriminator, so that the aim of extracting the synchronous signal is fulfilled, the ephemeris data generation module in the information code generation module writes the coordinate position of the pseudo satellite signal generation module into a Beidou ephemeris parameter to generate required Beidou ephemeris information data, the pseudo random code generation module generates pseudo random codes compatible with the Beidou signal, each module in the multi-channel pseudo satellite signal generation module adopts different pseudo random codes, and the output control module is under the synchronization of the synchronous signal, information codes are started to be generated according to the frequency of 2.046 MHz. And the transmitting circuit transmits the modulated pseudo satellite signal to a space to be positioned through an antenna to provide a pseudo satellite positioning signal for a pseudo satellite user.
Example 4
A method for operating a circuit system for synchronizing a GPS-based pseudolite clock in the L1 frequency band in embodiment 3, comprising the steps of:
(1) the reference signal source module divides the frequency of a reference signal source into signals with the period being two times of the Beidou D1 telegraph text main frame period (60s) through a frequency divider, and then the BPSK modulator conducts BPSK modulation on the signals of the reference signal source and the signals obtained through frequency division to generate reference signals with the phase jumping of 180 degrees every other main frame period (30s), and the reference signals are sent to all pseudolite signal generation modules with the same distance from the reference signal source module, so that the signals received by all the pseudolite signal generation modules are guaranteed to be strictly in the same frequency and phase.
(2) Each pseudo satellite signal generation module receives signals with the same frequency and the same phase, which are sent by the reference signal source module, and the received signals are filtered, amplified with low noise and driven by the receiving circuit, so that the usability of the received signals is increased.
(3) The clock recovery circuit takes the signal processed by the receiving circuit as an input reference signal, and performs phase locking by using the principle of negative feedback, thereby generating a carrier signal of the satellite carrier frequency with the same frequency and phase as required. The same-frequency and same-phase signals mean that the signals used as carriers by each pseudo satellite generating module are same-frequency and same-phase signals.
The phase discriminator in the clock recovery circuit is used for comparing the phases of the output signal and the reference signal and outputting the phase difference value of the output signal and the reference signal. The phase detector and the charge pump work at 3122.196MHz frequency, and the phase detector outputs periodic spike pulse after the clock recovery circuit is locked. When the clock recovery circuit receives a 180 ° phase jump, the phase detector outputs a group of wide pulses to the charge pump to balance the effects of the phase jump and ensure that the circuit is still in a locked state.
(4) The pulse width detection circuit generates synchronous signals for simultaneously modulating the information codes of all the pseudolites to the carrier by detecting the output signals of the up end of the phase discriminator. The pulse width detection circuit delays the pulse signal at the up end of the phase discriminator and then performs NAND operation with the undelayed original signal to serve as an output mark signal. When the system is installed, the threshold value of the detection circuit can be changed by reasonably adjusting the delay time, and only the widest pulse signal can be detected when the phase jumps each time, namely only one negative pulse signal is generated. And (5) when the negative pulse signal is detected, the step is carried out, and when the negative pulse signal cannot be detected, the output control module cannot modulate the information code on the carrier signal. At which point the system will continue to cycle through the detection of negative going signals until they occur.
(5) And the output control module in the information code generation module starts to modulate the information code on a carrier signal after receiving the negative pulse output by the pulse width detection circuit, so as to ensure that the initial code phases of the pseudolite generation modules are the same. Meanwhile, under the action of the frequency divider 1 and the frequency divider 2, the output control module controls the information code generation module to generate the output information code according to the frequency of 2.046MHz after receiving the first synchronizing signal, namely, each pseudolite generation module can generate subsequent synchronizing signals according to the first synchronizing signal only by synchronizing once, so that the pseudolite signals are continuously and synchronously transmitted. The phase jump generated by the reference signal source module is periodic and can be used for periodic synchronization, thereby reducing the clock deviation generated by only one-time synchronization and ensuring the stability of the system.
(6) The BPSK modulation module performs BPSK modulation by using the signals with the same frequency and phase output by the clock recovery circuit as carrier signals and using the information codes with the same initial code phase generated by the information code generation module as modulation signals to generate required pseudolite signals. The same frequency and phase as the initial code phase both refer to the signal relationship between the pseudolite signal generation modules.
(7) And (3) a transmitting circuit in the pseudo satellite signal generating module amplifies the power of the pseudo satellite signal generated by the BPSK modulating module in the step (6), and transmits the pseudo satellite signal to a space to be positioned through an antenna to provide a required Beidou pseudo satellite positioning signal for a pseudo satellite user.
Claims (5)
1. Circuitry for pseudolite clock synchronization, comprising: a reference signal source module and more than 4 pseudo satellite signal generating modules;
the reference signal source module is used for providing clock information and synchronous information for each pseudo satellite signal generation module, the clock information is used for enabling the pseudo satellite signal generation modules to recover and generate clock signals, the synchronous information is used for enabling the pseudo satellite signal generation modules to detect and generate synchronous signals, the pseudo satellite signal generation modules with the number of 4 or more transmit pseudo satellite signals which are accurately synchronized under the action of the clock signals and the synchronous signals, and the pseudo satellite signals are provided for pseudo satellite users;
the reference signal source module comprises a reference signal source, a frequency divider, a BPSK modulator of the reference signal source module and a transmitting circuit, wherein the reference signal source is used for generating a reference clock signal of the whole system, the BPSK modulator is a binary phase shift keying modulator and serves as a phase jump circuit, one path of the reference signal source provides an input carrier signal for the BPSK modulator of the reference signal source module, the other path of the reference signal source is connected to the frequency divider, the frequency divider is used for dividing the frequency of a signal output by the reference signal source, the frequency divider divides the frequency of the signal output by the reference signal source and serves as a modulation signal of the BPSK modulator to be connected to the BPSK modulator of the reference signal source module, and the transmitting circuit comprises a power amplifier and;
the pseudo satellite signal generating module comprises a BPSK modulator and a transmitting circuit of a receiving circuit, a clock recovery circuit, a pulse width detection circuit, an information code generating module and a pseudo satellite signal generating module,
the receiving circuit comprises a low noise amplifier, a band-pass filter and a driving module; the receiving circuit is used for receiving signals sent by the reference signal source module;
the clock recovery circuit comprises a phase discriminator, a charge pump, a loop filter and a voltage-controlled oscillator, wherein the phase discriminator, the charge pump, the loop filter and the voltage-controlled oscillator are sequentially connected end to end, the output end of the voltage-controlled oscillator is the output end of the clock recovery circuit, and the output signal of the clock recovery circuit is a satellite carrier signal; the input end of the phase discriminator is connected with a driving module of the receiving circuit, one path of output signal of the phase discriminator is connected to the charge pump, the signal of the other path of up end of the phase discriminator is the input end of the pulse width detection circuit, the other path of up end of the phase discriminator outputs a phase error signal, and the phase error signal is a pulse signal with a certain width;
the pulse width detection circuit comprises a delay circuit and a phase comparison circuit, one path of signal at the input end of the pulse width detection circuit is connected to the phase comparison circuit, the other path of signal is connected to the delay circuit, the output end of the delay circuit is connected to the phase comparison circuit, and the output end of the phase comparison circuit is the output end of the pulse width detection circuit;
the information code generation module comprises an ephemeris data generation module, a pseudo-random code data generation module, an AND logic module, an output control module, a frequency divider 1 and a frequency divider 2, wherein the ephemeris data generation module writes the coordinate position of the pseudo-satellite signal generation module into ephemeris parameters and generates required ephemeris information data, and the pseudo-random code generation module generates pseudo-random codes compatible with GNSS signals; the input end of the frequency divider 1 is connected to a voltage-controlled oscillator of a clock recovery circuit, the output end of the frequency divider 1 is connected to a pseudo-random code data generation module, the pseudo-random code data generation module is used for generating pseudo-random codes, the input end of the frequency divider 2 is connected to the frequency divider 1, the output of the frequency divider 2 is connected to an ephemeris data generation module, the ephemeris data generation module is used for generating ephemeris data, the ephemeris data generation module and the pseudo-random code data generation module are both connected to the AND logic module, the AND logic module is used for carrying out AND operation on the ephemeris data and the pseudo-random codes to generate the information codes, the output end of the AND logic module is connected to an output control module, the output control module is connected to the output end of a pulse width detection circuit, a control signal of the output control module is derived from an output signal of the pulse width detection circuit, the output signal of the information code generating module is an information code;
the output end of the information code generation module and the output end of the clock recovery circuit are both connected to the BPSK modulator of the pseudo satellite signal generation module, and the BPSK modulator of the pseudo satellite signal generation module is connected with the transmitting circuit;
the transmitting circuit comprises a power amplifier and a transmitting antenna, and the transmitting circuit is used for transmitting the pseudo satellite signals modulated by the BPSK modulator of the pseudo satellite signal generating module into a space to be positioned through the transmitting antenna so as to provide pseudo satellite positioning signals for pseudo satellite users.
2. The circuitry for pseudolite clock synchronization of claim 1 wherein said reference signal source is configured to generate a system wide reference clock signal having a frequency of 2fc；
The frequency divider is used for dividing the frequency of the signal output by the reference signal source to generate a signal with a period twice the period of the satellite frame;
the BPSK modulator in the reference signal source module is configured to generate a clock signal with a phase jump of 180 ° every other frame period.
3. The circuitry for pseudolite clock synchronization of claim 1, wherein each pseudolite signal generation module is substantially equidistant from the reference signal source module.
4. The circuitry of claim 1, wherein each of said pseudolite signal generation modules comprises a pseudo-random code data generation module, each of said pseudo-random code data generation modules using a different pseudo-random code.
5. A method of operating the circuitry for pseudolite clock synchronization of claim 1, comprising the steps of:
(1) the reference signal source module divides a signal output by a reference signal source into signals with a period being two times of a satellite frame period through a frequency divider, and then BPSK modulates the signal of the reference signal source and the signal obtained by frequency division through a BPSK modulator of the reference signal source module to generate a reference signal with a phase jumping of 180 degrees every other frame period, wherein the reference signal refers to a signal finally emitted by the reference signal source module and comprises clock information and synchronous information, the pseudo satellite signal generation module can recover and detect the clock signal and the synchronous signal from the reference signal, and the reference signal is sent to each pseudo satellite signal generation module with a distance completely equal to the distance between the reference signal source module and the pseudo satellite signal generation module;
(2) each pseudo satellite signal generation module receives the same-frequency and same-phase reference signals sent by the reference signal source module, and the received signals are filtered, amplified with low noise and driven by a receiving circuit;
(3) the clock recovery circuit takes the signal processed by the receiving circuit as an input reference signal, and performs phase locking by utilizing the principle of negative feedback, thereby generating a satellite carrier signal with the same frequency and phase as required;
the phase discriminator in the clock recovery circuit is used for comparing the phases of the output signal and the reference signal and outputting the phase difference value of the output signal and the reference signal, and the phase discriminator and the charge pump work at 2fcThe phase detector outputs periodic spike pulses after the clock recovery circuit is locked, and after the clock recovery circuit receives 180-degree phase jump, the phase detector outputs a group of wide pulses to the charge pump to balance the influence caused by the phase jump and ensure that the circuit is still in a locked state;
(4) the pulse width detection circuit generates synchronous signals for modulating the information codes of all the pseudolites to the carrier wave at the same time by detecting the output signals of the up end of the phase discriminator; the pulse width detection circuit delays the pulse signal at the up end of the phase discriminator and then performs NAND operation with the undelayed original signal to be used as an output mark signal; when the system is arranged, the delay time is adjusted, the threshold value of the detection circuit is set, and only the widest pulse signal can be detected when the phase jumps each time, namely only one negative pulse signal is generated; when a negative pulse signal is detected, entering the step (5); when the negative pulse signal is not detected, the negative pulse signal is continuously and circularly detected until the negative pulse signal appears;
(5) after receiving the negative pulse output by the pulse width detection circuit, an output control module in the information code generation module starts to modulate the information code onto a carrier signal through a BPSK modulator of the pseudo satellite signal generation module, so that the initial code phases of all the pseudo satellite generation modules are ensured to be the same; meanwhile, under the action of the frequency divider 1 and the frequency divider 2, the output control module controls the information code generation module to receive the first synchronous signal and then to generate the control information code according to the frequency f0The output information code is generated, namely, each pseudo satellite generating module can generate subsequent synchronous signals according to the first synchronous signal only by one-time synchronization, so that the pseudo satellite signals are continuously and synchronously transmitted;
(6) the BPSK modulator in the pseudo satellite signal generation module performs BPSK modulation by using the same-frequency and same-phase signal output by the clock recovery circuit as a satellite carrier signal and using the information code with the same initial code phase generated by the information code generation module as a modulation signal to generate a required pseudo satellite signal;
(7) and (3) after the transmitting circuit in the pseudo satellite signal generating module amplifies the power of the pseudo satellite signal generated by the BPSK modulator in the pseudo satellite signal generating module in the step (6), transmitting the pseudo satellite signal to a space to be positioned through an antenna, and providing a required pseudo satellite positioning signal for a pseudo satellite user.
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