CN111276953B - Single-chip lightning protection device - Google Patents

Single-chip lightning protection device Download PDF

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Publication number
CN111276953B
CN111276953B CN202010166860.8A CN202010166860A CN111276953B CN 111276953 B CN111276953 B CN 111276953B CN 202010166860 A CN202010166860 A CN 202010166860A CN 111276953 B CN111276953 B CN 111276953B
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region
zener
lightning protection
contact
upper layer
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CN111276953A (en
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乔明
童成伟
赵菲
齐钊
张波
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University of Electronic Science and Technology of China
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University of Electronic Science and Technology of China
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/005Emergency protective circuit arrangements for limiting excess current or voltage without disconnection avoiding undesired transient conditions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0676Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type comprising combinations of diodes, or capacitors or resistors
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/044Physical layout, materials not provided for elsewhere

Abstract

The invention provides a single-chip lightning protection device.A first high-power resistor in a single-chip lightning protection circuit is connected with one end of an input end of the single-chip lightning protection circuit, and the other end of the single-chip lightning protection circuit is connected with a cathode of a first Zener diode, an anode of a second Zener diode, one end of a first bidirectional TVS (transient voltage suppressor) and an input end of a logic circuit; one end of the second high-power resistor is connected with the output end of the single-chip lightning protection circuit, and the other end of the second high-power resistor is connected with the cathode of the third Zener diode, the anode of the fourth Zener diode, one end of the second bidirectional TVS transistor and the output end of the logic circuit; the other end of the first bidirectional TVS tube and the other end of the second bidirectional TVS tube are grounded; the cathode of the second Zener diode and the cathode of the fourth Zener diode are connected with a first power end of the logic circuit; the anode of the first Zener diode and the anode of the third Zener diode are connected with a second power supply end of the logic circuit. The invention also provides a plurality of device structure schemes for realizing the lightning protection circuit.

Description

Single-chip lightning protection device
Technical Field
The invention belongs to the field of electronic science and technology, and relates to a lightning surge protection device and circuit based on an integrated circuit on-chip ElectroStatic Discharge (ESD) protection technology.
Background
In the field of high-speed communication, the problems of electromagnetic compatibility and surge failure must be considered in communication interfaces (such as RS232, RS485, USB2.0 and the like). In practical applications, it is also common for high frequency high speed interfaces to accumulate a large amount of charge on the circuit due to lightning strikes or poor grounding. The common surge protection device mainly comprises a power resistor, a voltage dependent resistor, a Transient Voltage Suppressor (TVS) and a gas discharge tube, and a single chip integrated TVS tube and a current limiting resistor are used as a protection circuit.
The existing lightning protection generally protects external piezoresistor, a gas discharge tube, a TVS and other elements, and needs to be matched and selected for protection of each port, so that single-chip integration is difficult to realize. Therefore, an integrated, compatible and reliable lightning protection circuit is urgently needed in engineering.
Disclosure of Invention
Aiming at the defects of difficult integration and low reliability in the traditional lightning protection technology, the invention provides a single-chip lightning protection circuit and a device structure thereof aiming at a lightning protection device structure and a protection method, and the high robustness of the circuit under the lightning stroke condition is realized through the clamping characteristics of a high-power resistor and a bidirectional TVS (transient voltage suppressor).
The technical scheme of the single-chip lightning protection circuit provided by the invention is as follows:
a single-chip lightning protection circuit comprises a first high-power resistor, a second high-power resistor, a first Zener diode, a second Zener diode, a third Zener diode, a fourth Zener diode, a first bidirectional TVS (transient voltage suppressor) and a second bidirectional TVS (transient voltage suppressor),
one end of the first high-power resistor is connected with the input end of the single-chip lightning protection circuit, and the other end of the first high-power resistor is connected with the cathode of the first Zener diode, the anode of the second Zener diode, one end of the first bidirectional TVS (transient voltage suppressor) and the input end of the logic circuit; the logic circuit is a circuit to be subjected to lightning stroke protection;
one end of a second high-power resistor is connected with the output end of the single-chip lightning protection circuit, and the other end of the second high-power resistor is connected with the cathode of a third Zener diode, the anode of a fourth Zener diode, one end of a second bidirectional TVS (transient voltage suppressor) and the output end of the logic circuit;
the other end of the first bidirectional TVS tube and the other end of the second bidirectional TVS tube are grounded;
the cathode of the second Zener diode and the cathode of the fourth Zener diode are connected with a first power end of the logic circuit;
the anode of the first Zener diode and the anode of the third Zener diode are connected with a second power supply end of the logic circuit.
Specifically, a first power supply end of the logic circuit is connected with a positive direct current source, and a second power supply end of the logic circuit is floating or connected with an alternating current ground.
Based on the single-chip lightning protection circuit provided by the invention, the invention also provides a technical scheme for realizing the structure:
a single-chip lightning protection device comprises a first conductive type substrate, a buried oxide region and a second conductive type epitaxial region which are sequentially arranged from bottom to top, wherein two resistor structures, four Zener tube structures and two bidirectional TVS tube structures are arranged on the second conductive type epitaxial region;
the resistor structure is a Poly resistor structure or a trap resistor structure;
the Zener diode structure comprises a first PWELL area arranged at the upper layer in the second conduction type epitaxial area, a first Zener injection area arranged at the upper layer in the first PWELL area, and a first N + contact area and a first P + contact area arranged at the upper layer in the first Zener injection area, wherein the first N + contact area is used as a cathode of the Zener diode structure, and the first P + contact area is used as an anode of the Zener diode structure;
the bidirectional TVS tube structure comprises a first WELL region arranged at the upper layer inside the second conductive type epitaxial region, and two second P + contact regions arranged at the upper layer inside the first WELL region and a second N + contact region arranged between the two second P + contact regions; the two second P + contact regions are respectively used as two connecting ends of the bidirectional TVS tube structure;
grooves for isolation are arranged among the resistor structure, the Zener tube structure and the bidirectional TVS tube structure, and the grooves are arranged in the second conductive type epitaxial region;
one connecting end of the first resistor structure is used as an input connecting end of the single-chip lightning protection device, and the other connecting end of the first resistor structure is connected with a cathode of the first Zener tube structure, an anode of the second Zener tube structure, one connecting end of the first bidirectional TVS tube structure and an input connecting end of the logic circuit; the logic circuit is a circuit to be subjected to lightning stroke protection;
one connecting end of the second resistor structure is connected with the output connecting end of the single-chip lightning protection circuit, and the other connecting end of the second resistor structure is connected with the cathode of the third Zener tube structure, the anode of the fourth Zener tube structure, one connecting end of the second bidirectional TVS tube structure and the output connecting end of the logic circuit;
the other connecting end of the first bidirectional TVS tube structure and the other connecting end of the second bidirectional TVS tube structure are grounded;
the cathode of the second Zener tube structure and the cathode of the fourth Zener tube structure are connected with the first power supply connection end of the logic circuit;
the anode of the first Zener tube structure and the anode of the third Zener tube structure are connected with the second power supply connection end of the logic circuit.
Specifically, the Poly resistance structure comprises a second oxidation layer and first polycrystalline silicon, wherein the second oxidation layer is arranged above the second conductive type epitaxial region, the first polycrystalline silicon is arranged above the second oxidation layer, the center of the second oxidation layer is provided with one connecting end of the Poly resistance structure, and one side of the first polycrystalline silicon is provided with the other connecting end of the Poly resistance structure.
Specifically, the Poly resistor structure further comprises a third thick oxide layer disposed between the second oxide layer and the first polysilicon.
Specifically, a fourth oxide layer is formed on the second conductive type epitaxial region through etching and deposition, and the second oxide layer is arranged on the fourth oxide layer.
Specifically, the well resistor structure comprises a first NWELL region arranged at the upper layer in the second conductive type epitaxial region, and a third N + contact region and a fourth N + contact region arranged at the upper layer in the first NWELL region, wherein the third N + contact region and the fourth N + contact region are respectively used as two connection ends of the well resistor structure.
Specifically, the first WELL region is an NWELL region, and the second N + contact region is tangent to the two second P + contact regions on the two sides respectively.
Specifically, a second zener injection region is further disposed on an upper layer inside the first WELL region, and the two second P + contact regions and the second N + contact region are disposed on an upper layer inside the second zener injection region.
Specifically, the first WELL area comprises a second PWELL area, a third NWELL area and a third PWELL area which are sequentially connected in a tangent mode, the number of the second N + contact areas is two, one second N + contact area is tangent to one second P + contact area and is arranged on the upper layer in the second PWELL area, the other second N + contact area is tangent to the other second P + contact area and is arranged on the upper layer in the third PWELL area, and the two second N + contact areas are arranged on one side close to the third NWELL area.
The invention has the advantages that the invention provides a process platform and a method for realizing a novel lightning protection device by designing the lightning protection circuit and a corresponding device structure, realizes the design of the lightning protection circuit and the device which can be integrated into a single chip, and reduces the circuit area; in addition, various implementation schemes of the lightning protection device can be combined at will.
Drawings
Fig. 1 is a schematic circuit structure diagram of a single-chip lightning protection circuit according to the present invention.
Fig. 2 is a structural diagram of a single chip lightning protection device in embodiment 1.
Fig. 3 is a structural diagram of a single chip lightning protection device in embodiment 2.
Fig. 4 is a structural diagram of a single chip lightning protection device in embodiment 5.
Fig. 5 is a structural diagram of a single chip lightning protection device in embodiment 6.
Fig. 6 is a structural diagram of a single chip lightning protection device in embodiment 8.
Fig. 7 is a structural diagram of a single chip lightning protection device in embodiment 9 according to the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
The invention provides a single-chip lightning protection circuit, which is a specific circuit structure diagram as shown in fig. 1, and comprises a first high-power resistor R1, a second high-power resistor R2, a first Zener diode Z1, a second Zener diode Z2, a third Zener diode Z3, a fourth Zener diode Z4, a first bidirectional TVS diode D1 and a second bidirectional TVS diode D2, wherein one end of the first high-power resistor R1 is connected with an input end of the single-chip lightning protection circuit, and the other end is connected with a cathode of the first Zener diode Z1, an anode of the second Zener diode Z2, one end of the first bidirectional TVS diode D1 and an input end of a logic circuit; the logic circuit is a circuit to be subjected to lightning stroke protection, and integrates the circuit to be subjected to lightning stroke protection and other circuits of the invention; one end of a second high-power resistor R1 is connected with the output end output of the single-chip lightning protection circuit, and the other end of the second high-power resistor R1 is connected with the cathode of a third Zener diode Z3, the anode of a fourth Zener diode Z4, one end of a second bidirectional TVS tube D2 and the output end of the logic circuit; the other end of the first bidirectional TVS tube D1 and the other end of the second bidirectional TVS tube D2 are grounded GND; the cathode of the second Zener diode Z2 and the cathode of the fourth Zener diode Z4 are connected with a first power supply end Vcc of the logic circuit; the anode of the first Zener diode Z1 and the anode of the third Zener diode Z3 are connected to a second power supply terminal-Vcc of the logic circuit.
The first power supply end of the logic circuit is connected with a high level according to the requirement of the logic circuit, such as a positive direct current source, the second power supply end of the logic circuit is floating or connected with an alternating current ground, and the alternating current ground can be any direct current port.
The working principle of the single-chip lightning protection circuit provided by the aspect is as follows: when a lightning surge occurs, the first high-power resistor R1 is subjected to a high voltage, and then the first bidirectional TVS tube D1 changes the impedance value between the two terminals from a high impedance to a low impedance at a fast speed to absorb a transient high current, clamping the voltage across the two terminals of the first bidirectional TVS tube D1 at a predetermined value, thereby protecting the following circuit elements from the impact of transient high-voltage spike pulses. In addition, the circuit and the device have a bidirectional ESD protection function, namely, no matter the lightning surge is a positive pulse or a negative pulse, the lightning surge can be discharged through the bidirectional TVS tube.
In addition, the invention further provides a single-chip lightning protection device, which comprises a first conductive type substrate 222, an oxygen burying area 501 and a second conductive type epitaxial area 111 which are sequentially arranged from bottom to top, wherein the second conductive type epitaxial area 111 is provided with two resistor structures, four zener tube structures and two bidirectional TVS tube structures, and the connecting ends of the two resistor structures, the four zener tube structures and the two bidirectional TVS tube structures are connected to realize the single-chip lightning protection circuit.
Example 1
As shown in fig. 2, this embodiment provides an implementation form of a part of the device in a single chip lightning protection device structure, in this embodiment, the zener structure includes a first PWELL region 211 disposed at an upper layer inside the second conductivity type epitaxial region 111, a first zener implant region 204 disposed at an upper layer inside the first PWELL region 211, and a first N + contact region 101 and a first P + contact region 201 disposed at an upper layer inside the first zener implant region 204, wherein the first N + contact region 101 serves as a cathode of the zener structure, and the first P + contact region 201 serves as an anode of the zener structure.
The bidirectional TVS tube structure adopts a zener structure, including a first WELL region (in this embodiment, the first WELL region is an NWELL region, i.e., the second NWELL region 122 in fig. 2) disposed at an upper layer inside the second conductive type epitaxial region 111, two second P + contact regions 202 and 203 disposed at an upper layer inside the first WELL region, and a second N + contact region 102 disposed between the two second P + contact regions; the two second P + contact regions 202 and 203 respectively serve as two connection terminals of the bidirectional TVS tube structure. In this embodiment, the second N + contact region 102 is tangent to the two second P + contact regions 202 and 203 on the two sides.
In this embodiment, the resistor structure is a Poly resistor structure, and includes a second oxide layer 502 disposed above the second conductive type epitaxial region 111 and a first polysilicon 01 disposed above the second oxide layer 502, a connection end of the Poly resistor structure is disposed at a center of the second oxide layer 501, and the connection end of the Poly resistor structure is wound around a plurality of turns as a starting point to form a high-power resistor, and another connection end of the Poly resistor structure is led out from a left side or a right side of the first polysilicon 01.
Trenches 400 are formed at two ends of the Poly resistor structure, and second field oxide layers 502 are formed on the N-type epitaxial regions 111 between the trenches 400. A groove 400 is also arranged between the Zener tube structure and the bidirectional TVS tube structure to play an isolation role.
In this embodiment, the first conductive type substrate 222 is selected to be P-type bulk silicon, and the second conductive type epitaxial region 111 is selected to be N-type epitaxial.
Example 2
As shown in fig. 3, the main differences between the structure of the present embodiment and that of embodiment 1 are: a well resistor structure is adopted instead of the Poly resistor structure, the well resistor structure includes a first NWELL region 121 disposed at an upper layer inside the second conductivity type epitaxial region 11, and a third N + contact region 104 and a fourth N + contact region 105 disposed at an upper layer inside the first NWELL region 121, wherein the third N + contact region 104 and the fourth N + contact region 105 respectively serve as two connection terminals of the well resistor structure.
The working principle of the embodiment is as follows:
when the lightning surge is suffered, the voltage passes through the bidirectional TVS structure in the second NWELL zone 122 to clamp the node voltage, an internal circuit is blocked, and the current is discharged by a high-power surge TVS tube; the first NWELL well 121 of the well resistor structure integrated in fig. 3 is a lightly doped region with high resistivity and large resistance, and the first NWELL 121 has heavily doped contact holes of the third N + contact region 104 and the fourth N + contact region 105 at two ends, so that the well resistor structure bears large voltage and the substrate breaks down before the resistor reaches the corresponding current limiting capability. Based on this, the buried oxide layer 501 functions to realize substrate withstand voltage; secondly, the zener structure integrated in fig. 2 and 3 protects the power supply from lightning surge; again, the trench 400 of the sidewalls may preferably be filled with poly, as a high voltage isolation trench to boost withstand voltage and isolate the TVS protection structure and the resistance protection structure from being affected.
Example 3
The main differences between this example and examples 1 and 2 are: the first conductive type substrate 222 is selected to be an N-type substrate and the second conductive type epitaxial region 111 is selected to be a P-type epitaxial.
Example 4
The main differences between this example and example 2 are: the first NWELL area 121 is replaced with a PWELL area, the third N + contact area 104 is replaced with a P + contact area, and the fourth N + contact area 105 is replaced with a P + contact area.
Example 5
As shown in fig. 4, the main differences between this embodiment and embodiment 1 are: the structure of the Poly resistor is improved, a third thick oxide layer 503 is arranged above the second field oxide layer 502, and the first polysilicon 01 is arranged above the third thick oxide layer 503, because lightning surge has requirements on the thickness of a medium.
Example 6
As shown in fig. 5, the main differences between this embodiment and embodiments 1 and 5 are: another modification is given to the Poly resistor structure by etch-depositing a fourth oxide layer 504 on the second conductivity type epitaxial region 111, a second field oxide layer 502 disposed over the fourth oxide layer 504, and a first Poly 01 disposed over the second oxide layer 502. The dielectric layer in embodiment 5 is the second field oxide layer 502 plus the third thick oxide layer 503, but the step is too high, so the fourth oxide layer 504 provided in this embodiment is deposited again after etching, and the step height can be reduced without changing the thickness of the dielectric layer.
Example 7
The main differences between this example and examples 5 and 6 are: the third thick oxide layer 503 and the fourth oxide layer 504 can be changed to other dielectrics, such as high/low k dielectrics, SiN layers or other mixture dielectrics.
Example 8
As shown in fig. 6, the main difference between this embodiment and embodiment 1 is that: the structure of the bidirectional TVS tube is modified by further providing a second zener implant 205 above the inside of the second NWELL region 122, and two second P + contact regions 202 and 203 and a second N + contact region 102 are disposed at the upper layer inside the second zener implant 205.
Example 9
As shown in fig. 7, the main difference between this embodiment and embodiment 1 is: another modification to the bidirectional TVS tube structure is to use different clamping manners in the form of thyristors to implement the first WELL region with the second PWELL region 212, the third NWELL region 123 and the third PWELL region 213 which are sequentially connected tangentially, and the second N + contact regions are two, i.e., two 103 in fig. 7, wherein one second N + contact region 103 is tangential to one second P + contact region 203 and disposed on the inside upper layer of the second PWELL region 212, the other second N + contact region 103 is tangential to the other second P + contact region 203 and disposed on the inside upper layer of the third PWELL region 213, and the two second N + contact regions are disposed on the side close to the third NWELL region 123.
The above embodiments show different implementations of the resistor structure and the bidirectional TVS structure, and the resistor and TVS implementation given in each embodiment can be combined arbitrarily.
By using different combinations of the resistor structure, the zener tube structure and the bidirectional TVS tube structure provided in the above embodiments, it can be realized that the integrated equivalent circuit in the device is a single-chip lightning protection device of the circuit shown in fig. 1, the lightning protection device provided by the present invention can be formed only by correspondingly arranging two resistor structures, four zener tube structures and two bidirectional TVS tube structures in the device, and connecting the connecting end of each structure to the circuit structure shown in fig. 1, and the high robustness of the circuit under the condition of lightning stroke is realized by using the clamping characteristics of the high-power resistor and the TVS.
Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.

Claims (8)

1. A single-chip lightning protection device is characterized by comprising a first conductive type substrate, a buried oxide region and a second conductive type epitaxial region which are sequentially arranged from bottom to top, wherein two resistor structures, four Zener tube structures and two bidirectional TVS tube structures are arranged on the second conductive type epitaxial region;
the resistor structure is a Poly resistor structure or a trap resistor structure;
the Zener diode structure comprises a first PWELL area arranged at the upper layer in the second conduction type epitaxial area, a first Zener injection area arranged at the upper layer in the first PWELL area, and a first N + contact area and a first P + contact area arranged at the upper layer in the first Zener injection area, wherein the first N + contact area is used as a cathode of the Zener diode structure, and the first P + contact area is used as an anode of the Zener diode structure;
the bidirectional TVS tube structure comprises a first WELL region arranged at the upper layer inside the second conductive type epitaxial region, and two second P + contact regions arranged at the upper layer inside the first WELL region and a second N + contact region arranged between the two second P + contact regions; the two second P + contact regions are respectively used as two connecting ends of the bidirectional TVS tube structure;
grooves for isolation are arranged among the resistor structure, the Zener tube structure and the bidirectional TVS tube structure, and the grooves are arranged in the second conductive type epitaxial region;
one connecting end of the first resistor structure is used as an input connecting end of the single-chip lightning protection device, and the other connecting end of the first resistor structure is connected with a cathode of the first Zener tube structure, an anode of the second Zener tube structure, one connecting end of the first bidirectional TVS tube structure and an input connecting end of the logic circuit; the logic circuit is a circuit to be subjected to lightning stroke protection;
one connecting end of the second resistor structure is connected with the output connecting end of the single-chip lightning protection circuit, and the other connecting end of the second resistor structure is connected with the cathode of the third Zener tube structure, the anode of the fourth Zener tube structure, one connecting end of the second bidirectional TVS tube structure and the output connecting end of the logic circuit;
the other connecting end of the first bidirectional TVS tube structure and the other connecting end of the second bidirectional TVS tube structure are grounded;
the cathode of the second Zener tube structure and the cathode of the fourth Zener tube structure are connected with the first power supply connection end of the logic circuit;
the anode of the first Zener tube structure and the anode of the third Zener tube structure are connected with the second power supply connection end of the logic circuit.
2. The single chip lightning protection device of claim 1, wherein the Poly resistor structure comprises a second oxide layer disposed over the second conductivity type epitaxial region and a first polysilicon disposed over the second oxide layer, the second oxide layer having a center position disposed one connection end of the Poly resistor structure and one side of the first polysilicon disposed the other connection end of the Poly resistor structure.
3. The single chip lightning protection device of claim 2, wherein the Poly resistor structure further comprises a third thick oxide layer disposed between the second oxide layer and the first polysilicon.
4. The single chip lightning protection device of claim 2, wherein a fourth oxide layer is formed by etch deposition over the epitaxial region of the second conductivity type, the second oxide layer being disposed over the fourth oxide layer.
5. The single chip lightning protection device of claim 1, wherein the well resistive structure comprises a first NWELL region disposed at an upper layer inside the second conductivity type epitaxial region, and a third N + contact region and a fourth N + contact region disposed at an upper layer inside the first NWELL region, the third N + contact region and the fourth N + contact region serving as two connection terminals of the well resistive structure, respectively.
6. The single chip lightning protection device of claim 1, wherein the first WELL region is an NWELL region, and the second N + contact region is tangent to two second P + contact regions on two sides, respectively.
7. The single chip lightning protection device of claim 6, wherein said first WELL region inner upper layer is further provided with a second Zener injection region, and said two second P + contact regions and a second N + contact region are provided on said second Zener injection region inner upper layer.
8. The single chip lightning protection device of claim 1, wherein the first WELL region comprises a second PWELL region, a third NWELL region and a third PWELL region connected sequentially tangentially, two second N + contact regions, one of the second N + contact regions being tangential to and disposed on an upper layer within the second PWELL region, the other of the second N + contact regions being tangential to and disposed on an upper layer within the third PWELL region, and two of the second N + contact regions being disposed on a side adjacent to the third NWELL region.
CN202010166860.8A 2020-03-11 2020-03-11 Single-chip lightning protection device Active CN111276953B (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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