CN111274661B - Waveguide slot antenna low side lobe design method based on slot voltage extraction - Google Patents

Waveguide slot antenna low side lobe design method based on slot voltage extraction Download PDF

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CN111274661B
CN111274661B CN201811451738.4A CN201811451738A CN111274661B CN 111274661 B CN111274661 B CN 111274661B CN 201811451738 A CN201811451738 A CN 201811451738A CN 111274661 B CN111274661 B CN 111274661B
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slot
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seam
waveguide
length
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CN111274661A (en
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杨龙
吴伟
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Beijing Huahang Radio Measurement Research Institute
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q13/00—Waveguide horns or mouths; Slot antennas; Leaky-waveguide antennas; Equivalent structures causing radiation along the transmission path of a guided wave
    • H01Q13/10—Resonant slot antennas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/0087—Apparatus or processes specially adapted for manufacturing antenna arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/29—Combinations of different interacting antenna units for giving a desired directional characteristic
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)

Abstract

A waveguide slot antenna low side lobe design method based on slot voltage extraction comprises the following steps: step 1, a single slot waveguide crack model is established, slot parameter extraction and curve fitting are carried out through simulation analysis, and single slot characteristic equations F (g, d) and F (d, l) are obtained; step 2, obtaining initial slot bias d of the waveguide slot array according to the array weighted voltage U and the characteristic equations F (g, d) and F (d, l) of the step 1 0 Length of seam l 0 The method comprises the steps of carrying out a first treatment on the surface of the Step 3 the stitch bias d obtained in the step 2 0 Length of seam l 0 Establishing a waveguide gap array model, performing simulation analysis by adopting HFSS software, extracting each gap voltage, and obtaining array gap voltage distribution U 1 array Pattern performance; step 4 array U 1 array Comparing with U, selecting a gap to be modified, and obtaining a new gap deviation d according to the characteristic equations F (g, d) and F (d, l) in the step 1 1 Length of seam l 1 Recalculating the array model; and 5, repeating the step 3 and the step 4 until the performance of the obtained array pattern meets the design requirement.

Description

Waveguide slot antenna low side lobe design method based on slot voltage extraction
Technical Field
The invention belongs to the technical field of antennas, and particularly relates to a low-sidelobe waveguide slit antenna design method.
Background
In modern sea warfare, the warfare command system should have the characteristics of quick response capability, internetworking, serialization, modularization and the like, and higher requirements are put forward on antenna systems of carrier-borne radar equipment and communication equipment. With the development of electronic information technology, the electromagnetic environment of the battle sea area is more and more complex, and the threat of electronic interference is more and more serious. The competition of the two parties for the electromagnetic control right can lead to the failure of the normal work of the radio electronic equipment, communication command failure, radar blind, electronic guidance control loss and the like. With the development of technology, the ship-based radar system is required to have stronger capabilities of resisting electronic interference, anti-radiation missile, radar detection and low-altitude and ultra-low-altitude striking of high-speed anti-ship missile.
An antenna array antenna is one of effective means for solving the above-described problems. In order to effectively combat targets and improve the anti-interference capability of the radar, low or ultra-low side lobe arrays are required for the radar antenna. Very low sidelobe antennas have become an important component of high performance electronic systems. In particular, a radar, which works effectively in environments with severe ground objects and electronic interference, must employ antennas with as low side lobes as possible. Low or ultra low sidelobe array antennas are a common requirement of modern radars and one of the key technologies that are urgently needed to be solved.
For the traditional waveguide slot antenna, three design formulas of the Eliott are mainly adopted for low-side lobe design at present, but the Eliott design formulas are extremely easy to have the conditions of low solving efficiency and low solving success rate, and a simpler and quicker traditional waveguide slot antenna low-side lobe design method needs to be sought.
Disclosure of Invention
Aiming at the problems, the invention provides a waveguide slit antenna low side lobe design method based on slit voltage extraction, which is used for carrying out simulation extraction on waveguide slit voltage values, accurately analyzing the voltage characteristics of each radiation slit, realizing accurate control of weight distribution and realizing low side lobe waveguide antenna design.
The technical scheme of the invention is as follows:
a waveguide slot antenna low side lobe design method based on slot voltage extraction is characterized by comprising the following steps:
step 1, establishing a single-slit waveguide slit model, extracting slit parameters and performing curve fitting through simulation analysis to obtain single-slit characteristic equations F (g, d) and F (d, l), wherein g represents single-slit resonance admittance, d represents single-slit bias, and l represents single-slit length;
step 2, obtaining initial slot bias d of the waveguide slot array according to the array weighted voltage U and the characteristic equations F (g, d) and F (d, l) in the step 1 0 Length of seam l 0 ；
Step 3, the seam offset d is obtained according to the step 2 0 Length of seam l 0 Establishing a waveguide gap array model, performing simulation analysis by adopting HFSS software, extracting each gap voltage, and obtaining array gap voltage distribution U 1 array Pattern performance;
step 4, array U 1 array Comparing with U, selecting a gap to be modified, and obtaining a new gap deviation d according to the characteristic equations F (g, d) and F (d, l) in the step 1 1 Length of seam l 1 Recalculating the array model;
and 5, repeating the step 3 and the step 4 until the performance of the obtained array pattern meets the design requirement.
Further, the single slot waveguide crack model in step 1 is obtained through an automatic modeling program, a single slot model VBS script file is established through MATLAB, and an HFSS software script interface is utilized for calling.
Further, the slit parameters in the step 1 are extracted, parameters of a single slit waveguide slit model are automatically derived through MATLAB control HFSS software, planning processing is carried out by using MATLAB, useful information is extracted, and a slit admittance matrix G, a slit bias matrix D and a slit length matrix L in a resonance state are obtained; the parameter fitting is realized through MATLAB, 4-order curve fitting is carried out on an admittance matrix G and a seam deflection matrix D to obtain a characteristic equation F (G, D), 4-order curve fitting is carried out on a seam deflection matrix D and a seam length matrix L to obtain a characteristic equation F (D, L), and therefore a mathematical relationship among single seam admittance G, seam deflection D and seam length L is established.
Further, the array weighted voltage U in step 2 is obtained according to the actual design requirement.
Further, the array weighted voltage U is obtained by adopting a Taylor weighting or Chebyshev weighting method.
Further, the initial slot bias d of the waveguide slot array in the step 2 0 Length of seam l 0 Obtained by the following method:
1) And (3) calculating the power distribution value of the single radiation waveguide:
namely the distribution value of the power of the feed slot of the feed waveguide;
2) Calculating the power distribution value of each radiation slit:
wherein:
n-is the number of radiation slits on the radiation waveguide;
m-is the number of waveguides;
f ij -corresponding function value for weighted voltage U
3) The power distribution value P of each radiation slit ij I.e. the resonance admittance g of each slot ij The initial seam offset d can be obtained through the characteristic equations F (g, d) and F (d, l) in the step 1 0 Length of seam l 0 。
Further, in step 3, the waveguide slot array model is obtained through an automated modeling program, an array model VBS script file is built through MATLAB, and an HFSS software script interface is used for calling.
Further, the array slit voltage distribution U in step 3 1 array Obtained by line integration of the slot center in HFSS simulation software.
Further, the seam bias d in the step 4 1 Length of seam l 1 The acquisition process is as follows:
1) By comparison of U 1 array Selecting a gap position which deviates greatly from the weighted array U from U;
2) Adjusting the selected gap according to the change rule of the characteristic equation F (g, d), namely if U 1 array If the intermediate value is too large relative to U, the power of the original radiation slit is distributed to a value P ij And (3) reducing the size, and recalculating the seam offset and the seam length by using the method in the step (3).
The invention can simulate and extract the voltage value of the waveguide slot, accurately analyze the voltage characteristic of each radiation slot, realize the accurate control of weight distribution and realize the design of the low-sidelobe waveguide antenna.
Drawings
FIG. 1 is a flow chart of the design method of the invention.
Detailed Description
The technical scheme of the invention is further explained and illustrated in detail below with reference to the accompanying drawings.
A low side lobe design method of a waveguide slot antenna based on slot voltage extraction, which can process different forms of waveguide slot antennas, as shown in fig. 1, and comprises the following steps:
step 1, establishing a single-slot waveguide crack model, and performing slot parameter extraction and curve fitting through simulation analysis to obtain single-slot characteristic equations F (g, d) and F (d, l); where g represents the single-slit resonance admittance, d represents the single-slit bias, and l represents the single-slit length.
The single slot waveguide crack model is obtained through an automatic modeling program, a single slot model VBS script file is established through MATLAB, and an HFSS software script interface is utilized for calling;
the slit parameter extraction automatically derives an S11 parameter of a single slit waveguide slit model through MATLAB operation HFSS software, and performs planning processing by using MATLAB to extract useful information, so as to obtain a slit admittance matrix G, a slit bias matrix D and a slit length matrix L in a resonance state;
the parameter fitting is realized through MATLAB, 4-order curve fitting is carried out on an admittance matrix G and a seam deflection matrix D to obtain a characteristic equation F (G, D), 4-order curve fitting is carried out on a seam deflection matrix D and a seam length matrix L to obtain a characteristic equation F (D, L), and therefore a mathematical relationship among single seam admittance G, seam deflection D and seam length L is established.
Step 2, obtaining initial slot bias d of the waveguide slot array according to the array weighted voltage U and the characteristic equations F (g, d) and F (d, l) in the step 1 0 Length of seam l 0 。
The array weighted voltage U is obtained according to actual design requirements and is obtained by adopting any weighting method such as Taylor weighting, chebyshev weighting and the like.
The initial slot bias d of the waveguide slot array 0 Length of seam l 0 Obtained by the following method:
1) And (3) calculating the power distribution value of the single radiation waveguide:
i.e. the slot power splitting value of the feed waveguide.
2) Calculating the power distribution value of each radiation slit:
wherein:
n-is the number of slots on the radiation waveguide.
m-is the number of waveguides.
f ij -corresponding function value for weighted voltage U
3) The power distribution value P of each radiation slit ij I.e. the resonance admittance g of each slot ij The initial seam offset d can be obtained through the characteristic equations F (g, d) and F (d, l) in the step 1 0 Length of seam l 0 。
Step 3, the seam offset d is obtained according to the step 2 0 Length of seam l 0 Establishing a waveguide gap array model, performing simulation analysis by adopting HFSS software, extracting each gap voltage, and obtaining array gap voltage distribution U 1 array Pattern performance.
The waveguide gap array model is obtained through an automatic modeling program, an array model VBS script file is established through MATLAB, and an HFSS software script interface is utilized for calling;
the array slit voltage distribution U 1 array Obtained by line integration of the slot center in HFSS simulation software.
Step 4, array U 1 array Comparing with U, selecting a gap to be modified, and obtaining a new gap deviation d according to the characteristic equations F (g, d) and F (d, l) in the step 1 1 Length of seam l 1 The array model is recalculated.
The seam is deviated d 1 Length of seam l 1 The acquisition process is as follows:
2) By comparison of U 1 array Selecting a gap position which deviates greatly from the weighted array U from U;
2) Adjusting the selected gap according to the change rule of the characteristic equation F (g, d), namely if U 1 array If the intermediate value is too large relative to U, the power of the original radiation slit is distributed to a value P ij And (3) reducing the size, and recalculating the seam offset and the seam length by using the method in the step (3).
And 5, repeating the step 3 and the step 4 until the performance of the obtained array pattern meets the design requirement.

Claims (8)

1. A waveguide slot antenna low side lobe design method based on slot voltage extraction is characterized by comprising the following steps:
step 1, establishing a single-slit waveguide slit model, extracting slit parameters and performing curve fitting through simulation analysis to obtain single-slit characteristic equations F (g, d) and F (d, l), wherein g represents single-slit resonance admittance, d represents single-slit bias, and l represents single-slit length;
step 2, obtaining initial slot bias d of the waveguide slot array according to the array weighted voltage U and the characteristic equations F (g, d) and F (d, l) in the step 1 0 Length of seam l 0 ；
Step 3, the seam offset d is obtained according to the step 2 0 Length of seam l 0 Establishing a waveguide gap array model, performing simulation analysis by adopting HFSS software, extracting each gap voltage, and obtaining array gap voltage distribution U 1 array Pattern performance;
step 4, array U 1 array Comparing with U, selecting a gap to be modified, and obtaining a new gap deviation d according to the characteristic equations F (g, d) and F (d, l) in the step 1 1 Length of seam l 1 Recalculating the array model;
the seam is deviated d 1 Length of seam l 1 The acquisition process is as follows:
1) By comparison of U 1 array And the U-shaped part is connected with the U,selecting a gap position which deviates greatly from the weighting array U;
2) Adjusting the selected gap according to the change rule of the characteristic equation F (g, d), namely if U 1 array If the intermediate value is too large relative to U, the power of the original radiation slit is distributed to a value P ij Reducing, and recalculating the seam offset and the seam length by using the method in the step 3;
and 5, repeating the step 3 and the step 4 until the performance of the obtained array pattern meets the design requirement.
2. The method for designing the low side lobe of the waveguide slot antenna based on slot voltage extraction as claimed in claim 1, wherein the single slot waveguide slot model in step 1 is obtained through an automatic modeling program, a single slot model VBS script file is built through MATLAB, and an HFSS software script interface is used for calling.
3. The method for designing the low side lobe of the waveguide slot antenna based on slot voltage extraction as claimed in claim 1, wherein the slot parameter extraction in the step 1 automatically derives single slot waveguide slot model parameters through MATLAB operation HFSS software, and performs planning processing by using MATLAB to extract useful information to obtain a slot admittance matrix G, a slot deflection matrix D and a slot length matrix L in a resonance state; the parameter fitting is realized through MATLAB, 4-order curve fitting is carried out on an admittance matrix G and a seam deflection matrix D to obtain a characteristic equation F (G, D), 4-order curve fitting is carried out on a seam deflection matrix D and a seam length matrix L to obtain a characteristic equation F (D, L), and therefore a mathematical relationship among single seam admittance G, seam deflection D and seam length L is established.
4. The method for designing a low side lobe of a waveguide slot antenna based on slot voltage extraction as claimed in claim 1, wherein the array weighted voltage U in step 2 is obtained according to actual design requirements.
5. The method for designing a low side lobe of a waveguide slot antenna based on slot voltage extraction as claimed in claim 4, wherein the array weighted voltage U is obtained by Taylor weighting or Chebyshev weighting.
6. The method for designing a low side lobe of a waveguide slot antenna based on slot voltage extraction as claimed in claim 1, wherein the initial slot bias d of the waveguide slot array in step 2 0 Length of seam l 0 Obtained by the following method:
1) And (3) calculating the power distribution value of the single radiation waveguide:
namely the distribution value of the power of the feed slot of the feed waveguide;
2) Calculating the power distribution value of each radiation slit:
wherein:
n-is the number of radiation slits on the radiation waveguide;
m-is the number of waveguides;
f ij -corresponding function value for weighted voltage U
3) The power distribution value P of each radiation slit ij I.e. the resonance admittance g of each slot ij The initial seam offset d can be obtained through the characteristic equations F (g, d) and F (d, l) in the step 1 0 Length of seam l 0 。
7. The method for designing the low side lobe of the waveguide slot antenna based on slot voltage extraction according to claim 1, wherein the waveguide slot array model in the step 3 is obtained through an automatic modeling program, an array model VBS script file is built through MATLAB, and the HFSS software script interface is used for calling.
8. A slot voltage extraction based waveguide slot antenna as claimed in claim 1The low side lobe design method is characterized in that the array gap voltage distribution U in the step 3 1 array Obtained by line integration of the slot center in HFSS simulation software.
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