CN111273723A - Reference current source, reference current generation method and electronic equipment - Google Patents
Reference current source, reference current generation method and electronic equipment Download PDFInfo
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- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The invention discloses a reference current source, a reference current generation method and electronic equipment, and relates to the technical field of integrated circuits, so as to improve the voltage characteristic and the temperature characteristic of the reference current source. The reference current source includes: the starting circuit is used for providing control signals for the mirror current circuit and the bias circuit; the mirror current circuit is used for outputting mirror currents with the same current magnitude under the control of the control signal; a bias circuit electrically connected to the power supply terminal for outputting a reference current; and a modulation circuit for modulating the mirror current output from the mirror current circuit to suppress a temperature coefficient of the mirror current. The reference current source does not need the assistance of other circuits such as an operational amplifier and the like, can work by adopting low power supply voltage, and reduces the power consumption of the circuit. The reference current generation method is applied to the reference current source. The reference current source is applied to electronic equipment.
Description
Technical Field
The present invention relates to the field of integrated circuit technologies, and in particular, to a reference current source, a method for generating a reference current, and an electronic device.
Background
The reference current source is used for providing bias current for normal work of the chip in the analog integrated circuit, and the performance of the reference current source directly influences the performance of the whole CMOS integrated circuit.
At present, the most common method for generating the reference current is to use a band gap reference circuit in the form of a triode to realize the reference voltage of the extremely low temperature coefficient and use the reference voltage as a reference, and the value of the reference voltage is about 1.25V. The reference current generated by the bandgap reference circuit has a relatively high correlation with a temperature coefficient, and the bandgap reference circuit has a relatively high influence on a reference voltage value, so that it is difficult to generate the reference current usable at a low power supply voltage in the prior art.
Disclosure of Invention
The invention aims to provide a reference current source with low power supply voltage and low temperature coefficient, which is used for improving the power supply characteristic and the temperature characteristic of the reference current source.
In order to achieve the above object, the present invention provides a reference current source including:
the starting circuit is used for providing control signals for the mirror current circuit and the bias circuit;
the mirror current circuit is used for outputting mirror currents with the same current magnitude under the control of the control signal;
a bias circuit electrically connected to the power supply terminal, the bias circuit for outputting a reference current;
and a modulation circuit for modulating the mirror current output by the mirror current circuit to suppress a temperature coefficient of the mirror current;
the control end of the starting circuit is electrically connected with the public end, the input end of the starting circuit is respectively electrically connected with the power supply end and the public end, and the output end of the starting circuit is electrically connected with the control end of the mirror current circuit and the control end of the bias circuit; the input end of the mirror current circuit is electrically connected with the power supply end, the output end of the mirror current circuit is respectively electrically connected with the input end of the modulation circuit and the control end of the modulation circuit, and the output end of the modulation circuit is electrically connected with the public end.
The reference current source provided by the invention utilizes the starting circuit to provide control signals for the mirror current circuit and the bias circuit, the mirror current circuit outputs the mirror current with the same current under the control of the control signals, and the mirror current output by the mirror current circuit is modulated by the modulation circuit so as to inhibit the temperature coefficient of the mirror current, reduce the influence of the temperature on the mirror current and obtain the mirror current with extremely low temperature coefficient. Because the control end of the bias circuit is electrically connected with the control end of the mirror current circuit, and the input end of the bias circuit is electrically connected with the input end of the mirror current, the temperature coefficient of the reference current output by the bias circuit is also obtained by modulation of the modulation circuit, and because the temperature coefficient of the mirror current is extremely low, the reference current with extremely low temperature coefficient can be obtained. Meanwhile, the reference current source provided by the invention only comprises a mirror current circuit, a modulation circuit, a starting circuit and a bias circuit, and is not required to be assisted by other circuits such as an operational amplifier, and other auxiliary circuits cannot cause more partial voltage, so that the low-power-supply-voltage work can be realized.
The invention also provides a method for generating reference current, which applies the reference current source in the technical proposal and comprises,
the starting circuit provides control signals for the mirror current circuit and the bias circuit;
the mirror current circuit outputs two paths of mirror currents with the same current under the control of the control signal;
the modulation circuit modulates the image current to inhibit the temperature coefficient of the image current;
the bias circuit outputs a reference current under the control of the control signal, and the ratio of the reference current to the mirror current is greater than 0.
Compared with the prior art, the beneficial effects of the reference current generation method provided by the invention are the same as those of the reference current source provided by the technical scheme, and are not repeated herein.
The invention also provides electronic equipment comprising the reference current source provided by the technical scheme.
Compared with the prior art, the electronic device provided by the invention has the same beneficial effects as the reference current source provided by the technical scheme, and the detailed description is omitted here.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic diagram of a conventional triode-type bandgap reference circuit generating a reference current according to an embodiment of the present invention;
FIG. 2 is a simplified diagram of a reference current source according to an embodiment of the present invention;
FIG. 3 is a circuit diagram of a reference current source according to an embodiment of the present invention;
FIG. 4 is a graph of reference current versus temperature provided by an embodiment of the present invention;
FIG. 5 is a graph of reference current versus supply voltage provided by an embodiment of the present invention;
fig. 6 is a flowchart of a method for generating a reference current according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In an analog integrated circuit, a reference current source is used for providing a high-precision reference current source which is not changed along with temperature and power supply voltage for core module circuits such as an operational amplifier, a comparator, an analog-to-digital converter and the like in a complementary metal-Oxide-Semiconductor (CMOS) integrated circuit. The performance of the reference current source directly affects the performance of the entire CMOS integrated circuit.
At present, the most common method for generating the reference current is to use a band-gap reference circuit in the form of a triode. Fig. 1 shows a prior art bandgap reference circuit in the form of a triode, which includes a mirror current circuit 100, a start-up circuit 200, a reference voltage temperature coefficient cancellation circuit 300 and a reference current temperature coefficient cancellation circuit 400, which are electrically connected in sequence.
The working principle of the band-gap reference circuit is as follows: the negative temperature coefficient of the threshold voltage of the triode VT3 is utilized to offset the positive temperature coefficient of the threshold voltage difference of the triode VT1 and the triode VT2, the standard voltage Vref of the extremely low temperature coefficient is obtained as the reference, and the value of the reference voltage Vref is about 1.25V.
Specifically, while the start circuit 200 controls the mirror current circuit 100 to start, the start circuit 200 and the reference voltage temperature coefficient cancellation circuit 300 obtain the reference voltage Vref with an extremely low temperature coefficient by proportionally and additively adding the mirror current output by the mirror current circuit 100. Illustratively, the reference voltage Vref having a temperature coefficient of 0 at normal temperature may be obtained by adjusting the ratio of R1 and R3. The reference voltage Vref is used to derive a very low temperature coefficient of reference current Iref by the ratio of the off-chip resistance R4. However, the number of chip pins and devices is increased by using the off-chip resistor R4, and the off-chip resistor R4 has a certain temperature coefficient, so the reference current Iref obtained by the above method also has a certain temperature coefficient. And it is difficult to obtain a reference current at a low power voltage when the reference voltage Vref is relatively high.
In view of the above problems, embodiments of the present invention provide a reference current source. Fig. 2 is a simplified schematic diagram of a reference current source according to an embodiment of the present invention. As shown in fig. 2, the reference current source includes a start-up circuit 10, a mirror current circuit 20, a modulation circuit 30, and a bias output circuit 40. The connection relationship between these circuits is as follows:
the control end of the start circuit 10 is electrically connected to the common end GND, the input end of the start circuit 10 is electrically connected to the power supply end VCC, the input end of the start circuit 10 is electrically connected to the common end GND, and the output end a of the start circuit 10 is electrically connected to the control end of the mirror current circuit 20 and the control end of the bias circuit 40, respectively. The input end of the mirror current circuit 1 is electrically connected to a power supply terminal VCC, the output end of the mirror current circuit 10 is electrically connected to the input end of the modulation circuit 30 and the control terminal of the modulation circuit 30, respectively, and the output end of the modulation circuit 30 is electrically connected to a common terminal GND.
The working principle of the technical scheme is as follows: in an initial state, the output end of the starting circuit outputs a control signal to control the mirror current circuit and the bias circuit to start, so that the output end of the mirror current circuit outputs the mirror current with the same current. The mirror current flows into the modulation circuit, and the modulation circuit suppresses the temperature coefficient of the mirror current by modulating the mirror current. Because the control end of the bias circuit is electrically connected with the control end of the mirror current circuit, and the input end of the bias circuit is electrically connected with the input end of the mirror current, the temperature coefficient of the reference current output by the bias circuit is also restrained.
Based on the above technical scheme of the reference current source, the embodiment of the invention provides the control signal to the mirror current circuit and the bias circuit by using the starting circuit, controls the mirror current circuit to output the mirror currents with the same current magnitude, and then modulates the mirror currents output by the mirror current circuit by using the modulation circuit so as to suppress the temperature coefficient of the mirror currents, reduce the influence of the temperature on the mirror currents, and obtain the mirror currents with extremely low temperature coefficients. Because the control end of the bias circuit is electrically connected with the control end of the mirror current circuit, and the input end of the bias circuit is electrically connected with the input end of the mirror current, the bias circuit outputs the reference current with extremely low temperature coefficient. Meanwhile, the reference current source provided by the embodiment of the invention only comprises the mirror current circuit, the modulation circuit, the starting circuit and the bias circuit, and is not assisted by other circuits such as an operational amplifier and the like, so that the voltage division of other auxiliary circuits is reduced, the reference current source can work by adopting low power supply voltage, and the power consumption of the circuit is reduced.
In one possible design, fig. 3 shows a circuit diagram of a reference current source provided by an embodiment of the present invention. As shown in fig. 3, the modulation circuit includes: a first transistor M1, a second transistor M2, and a positive temperature coefficient impedance sub-circuit 31. It should be understood that the first transistor and the second transistor may be transistors or Field Effect Transistors (FETs), such as Junction FETs (JFETs) or metal-oxide semiconductor FETs (MOSFETs), which are abbreviated as MOS transistors.
As shown in fig. 3, the mirror current circuit 2 includes a first output terminal and a second output terminal, the first output terminal of the mirror current circuit 2 is electrically connected to the input terminal of the ptc impedance sub-circuit 31 and the control terminal of the first transistor M1, the output terminal of the ptc impedance sub-circuit 31 is electrically connected to the input terminal of the first transistor M1, the control terminal of the second transistor M2 and the control terminal of the start-up circuit 1, respectively, and the output terminal of the first transistor M1 is electrically connected to the common terminal GND; an input terminal of the second transistor M2 is electrically connected to the second output terminal of the mirror current circuit 2, and an output terminal of the second transistor M2 is electrically connected to the common terminal GND.
In some embodiments, the positive temperature coefficient impedance subcircuit includes a plurality of positive temperature coefficient resistors electrically connected together.
In other embodiments, the positive temperature coefficient impedance subcircuit includes a plurality of positive temperature coefficient resistors and a plurality of negative temperature coefficient resistors electrically connected together. For example: the positive temperature coefficient impedance sub-circuit comprises a positive temperature coefficient resistor and a negative temperature coefficient resistor.
The control end of the modulation circuit is electrically connected with the control end of the starting circuit and the input end of the starting circuit respectively. Therefore, after the starting circuit controls the mirror current circuit to start, the modulation circuit is also used for stopping the starting circuit from outputting the control signal, so that the starting circuit cannot influence the mirror current circuit.
In one possible design, as shown in fig. 3, the mirror current circuit 2 includes a third transistor M3 and a fourth transistor M4. The control terminal of the third transistor M3 is electrically connected to the control terminal of the bias circuit 4, the input terminal of the third transistor M3 is electrically connected to the power supply terminal VCC, and the output terminal of the third transistor M3 is electrically connected to the input terminal of the positive temperature coefficient impedance sub-circuit 31 and the control terminal of the modulation circuit 3, respectively.
A control terminal of the fourth transistor M4 is electrically connected to the output terminal of the fourth transistor M4 and the control terminal of the bias circuit 4, respectively, an input terminal of the fourth transistor M4 is electrically connected to the power supply terminal VCC, and an output terminal of the fourth transistor M4 is electrically connected to the input terminal of the modulation circuit 3.
As shown in fig. 3, in order to make the mirror current circuit 1 output two mirror currents with the same magnitude, the first transistor M1 and the second transistor M2 may be designed as MOS transistors of the same type, and the channel width-to-length ratio of the first transistor M1 is the same as the channel width-to-length ratio of the second transistor M2. Meanwhile, the third transistor M3 and the fourth transistor M4 are designed to be MOS transistors of the same type, and the channel width-to-length ratio of the third transistor M3 is the same as that of the fourth transistor M4, so as to ensure that the output mirror current does not change.
It should be understood that the first transistor M1 and the second transistor M2 may be NMOS transistors or PMOS transistors; the third transistor M3 and the fourth transistor M4 may be NMOS transistors or PMOS transistors. Illustratively, the first transistor M1 and the second transistor M2 are NMOS transistors, and the third transistor M3 and the fourth transistor M4 are PMOS transistors.
To achieve modulation of the mirror current temperature coefficient, the difference in threshold voltages of the first and second transistors is greater than 0, it being understood that the threshold voltage of the first transistor may be greater than the threshold voltage of the second transistor, and the threshold voltage of the first transistor may also be less than the threshold voltage of the second transistor. Illustratively, the threshold voltage of the first transistor is greater than the threshold voltage of the second transistor.
According to the electrical connection relationship among the first transistor M1, the second transistor M2, and the ptc resistor 31 shown in fig. 3, it can be known that the proportional relationship between the threshold voltage difference of the first transistor M1 and the second transistor M2 and the total resistance of the ptc resistor 31 satisfies the following formula:
wherein I is a mirror current value, Δ VthR is the total resistance of the ptc resistive sub-circuit 31, which is the difference in threshold voltages of the first transistor M1 and the second transistor M2.
Assume that the mirror current flowing through the first transistor M1 is IDS1The mirror current flowing through the second transistor M2 is IDS2From the microscopic formula of the mirror current flowing through the transistor, we obtain:
wherein, VGS1Is the gate-source voltage, V, of the first transistor M1GS2Is the gate-source voltage of the second transistor M2; vth1Is the threshold voltage, V, of the first transistor M1th2Is the threshold voltage of the second transistor M2; w1/L1Is the channel width-to-length ratio, W, of the first crystal M12/L2Is the channel width-to-length ratio of the second transistor M2; coxIs a gate oxide capacitance per unit area of a transistor gate; mu.snIs the carrier mobility.
Since the two mirror currents flowing through the first transistor M1 and the second transistor M2 are equal, and the channel width-length ratio of the first transistor M1 is equal to the channel width-length ratio of the second transistor M2, the two mirror currents are obtained by the above equations (2) (3):
VR＝VGS1-VGS2＝Vth1-Vth2＝ΔVth(4)
wherein, VRIs the total voltage, Δ V, of all series impedances in the PTC resistive sub-circuit 31thIs the difference in threshold voltages of the first transistor M1 and the second transistor M2.
According to a threshold voltage characteristic formula of the MOS tube:
from equations (5), (6) and (7):
wherein, VthIs the threshold voltage of MOS transistor, phimsIs the work function difference of the gate and the channel of the MOS transistor, phifIs the Fermi level, QbIs the charge density of the depletion region of the MOS transistor, QssIs the gate oxide charge density at the gate interface of MOS transistor, CoxIs a unit area gate oxide capacitance of MOS transistor gateiIs the intrinsic carrier concentration, NBThe hole concentration is Eg, the forbidden band width of silicon, k, the Boltzmann constant, epsilon, the dielectric constant of silicon, q, the charge quantity of electrons, gamma, the threshold voltage parameter of the MOS transistor, and T, the temperature.
From equation (8) we can obtain:
wherein N isB1Is the hole concentration, N, of the first transistor M1B2Is the hole concentration of the second transistor M2; phi is af1Is the Fermi level, phi, of the first transistor M1f2The fermi level of the second transistor M2.
Assuming that the ptc sub-circuit 31 includes the first resistor R1 and the second resistor R2, the first resistor R1 may be a positive temperature coefficient and the second resistor R2 may be a negative temperature coefficient.
The voltage-current formula in formula (1) can be obtained:
wherein, is Δ VthIs the difference between the threshold voltages of the first transistor M1 and the second transistor M2, R1Is the resistance value of the first resistor R1, R2Is the resistance of the second resistor R2.
The current is derived using equation (10):
the condition of 0 temperature coefficient can be obtained according to equation (11):
order to
The resistance value of the first resistor R1 and the second resistor R2 changing along with temperature is expressed as:
R1(T)＝R1[1+k11(T-T0)+k12(T-T0)2]≈R1[1+k11(T-T0)](15)
R2(T)＝R2[1+k21(T-T0)+k22(T-T0)2]≈R2[1+k21(T-T0)](16)
according to the formulas (15) and (16), the resistance value of the total series resistor R in the ptc resistive sub-circuit 31 varying with temperature is:
R(T)＝R1(T)+R2(T)＝(R1-R1k11T0)+(R2-R2k21T0)+(R1k11+R2k12)T (17)
wherein k is11Is the temperature coefficient of the first order of the first resistance R1, k12Is the second order temperature coefficient, k, of the first resistor R121Is the temperature coefficient of the first order of the second resistance R2, k22Is the second order temperature coefficient of the second resistor R2, R1Is the resistance value of the first resistor R1, R2Is the resistance value, T, of the second resistor R20Is the room temperature and T is the temperature.
Substituting equation (17) into equation (14) yields:
as can be seen from the above equations (4), (5), (6) and (7): the difference between the threshold voltages Δ V of the first transistor M1 and the second transistor M2thGreater than 0, so NB1Greater than NB2Then, the difference Δ V between the threshold voltages of the first transistor M1 and the second transistor M2 can be obtained from the formula (9)thProportional to the temperature, the difference between the threshold voltages Δ V of the first transistor M1 and the second transistor M2thHas a positive temperature coefficient.
As can be seen, the total resistance in the PTC-resistor circuit is designed to be different from the threshold voltage by Δ VthThe corresponding positive temperature coefficient can ensure that the modulation circuit modulates the mirror current output by the mirror current circuit, so that the temperature coefficient of the mirror current is zero. As is clear from the relationship among the bias circuit, the mirror current circuit, and the startup circuit, the bias circuit and the modulation circuit are connected in parallel to the output terminal of the startup circuit, and therefore the relationship between the reference current and the mirror current depends on each other. That is, after the modulation circuit modulates the mirror current, the temperature coefficient of the mirror current is zero, and the temperature coefficient of the reference current is also zero.
Illustratively, as shown in fig. 3, the first resistor R1 and the second resistor R2 in the ptc resistor sub-circuit 31 are designed to have a positive temperature coefficient and a negative temperature coefficient, respectively, by designing the resistances of the first resistor R1 and the second resistor R2 such that:
(R1-R1k11T0)+(R2-R2k21T0)＝0 (19)
wherein R is1Is the resistance value of the first resistor R1, R2Is the resistance value, k, of the second resistor R211Is the positive temperature coefficient, k, of the first resistor R121Is the negative temperature coefficient of the second resistor R2. By adjusting the resistance values of the first resistor R1 and the second resistor R2, the formula (19) is satisfied, and the mirror current and the reference current having a temperature coefficient of 0 at room temperature can be obtained. FIG. 4 shows a graph of reference current versus temperature, where the reference current varies from-40 deg.C to 110 deg.CThe current change range is 138.1nA to 139.7nA, the reference current is slightly influenced by temperature change, and the reference current reaches the maximum value of 139.7nA at the room temperature of about 20 ℃, so that the ultralow temperature coefficient is achieved.
In one possible design, as shown in fig. 3, the start-up circuit 1 includes a fifth transistor M5, a sixth transistor M6, and a seventh transistor M7. A control terminal of the fifth transistor M5 is electrically connected to the common terminal GND, an input terminal of the fifth transistor M5 is electrically connected to the power supply terminal VCC, and an output terminal of the fifth transistor M5 is electrically connected to a control terminal of the sixth transistor M6. An input terminal of the sixth transistor M6 is electrically connected to the common terminal GND, and an output terminal of the sixth transistor M6 is electrically connected to the control terminal of the mirror current circuit 2 and the control terminal of the start circuit 1, respectively. A control terminal of the seventh transistor M7 is electrically connected to the control terminal of the modulation circuit 3, an input terminal of the seventh transistor M7 is electrically connected to the common terminal GND, and an output terminal of the seventh transistor M7 is electrically connected to the control terminal of the sixth transistor M6.
It should be understood that a resistor with a suitable value may also be connected between the control terminal of the fifth transistor M5 and the common terminal GND, for example: the third resistor R3 is connected between the control terminal of the fifth transistor M5 and the common terminal GND, and it is only necessary to ensure that the output terminal voltage of the fifth transistor M5 can control the sixth transistor M6 to turn on after the fifth transistor M5 is connected to the power supply voltage at the input terminal.
When the fifth transistor is a PMOS transistor, the sixth transistor and the seventh transistor are NMOS transistors, and the mirror current circuit and the regulating circuit are not started, the control end voltage of the seventh transistor is close to 0, and the seventh transistor is in a cut-off region. The input end of the fifth transistor is electrically connected with the power supply end, the control end of the fifth transistor is electrically connected with the public end through the third resistor, and the control end of the fifth transistor is at a low level, so that the fifth transistor is turned on. The output end of the fifth transistor outputs high level to enable the control end of the sixth transistor to be high level, and the input end of the sixth transistor is electrically connected with the public end, so that the sixth transistor is started, the sixth transistor outputs low level as a control signal, and the mirror current circuit and the bias circuit are controlled to output mirror current and bias current respectively.
On this basis, as shown in fig. 3, when the first transistor M1 and the second transistor M2 are NMOS transistors, the third transistor M3 and the fourth transistor M4 are PMOS transistors, and the output terminal of the sixth transistor M6 outputs a low level, the control terminals of the third transistor M3 and the fourth transistor M4 in the mirror current circuit 2 are pulled low, and the input terminals of the third transistor M3 and the fourth transistor M4 are electrically connected to the power supply terminal, so that the voltage between the input terminals and the control terminals of the third transistor M3 and the fourth transistor M4 is greater than the threshold voltage of the transistors, and the third transistor M3 and the fourth transistor M4 are turned on, thereby starting the mirror current circuit 2. According to the connection relationship between the mirror current circuit 2 and the modulation circuit 3, when the mirror current circuit 2 is started, the first transistor M1 and the second transistor M2 are turned on, and the modulation circuit 3 is started. Since the output terminal of the ptc impedance sub-circuit 31 is electrically connected to the input terminal of the first transistor M1, the control terminal of the second transistor M2, and the control terminal of the seventh transistor M7, respectively, after the modulation circuit 3 is started, the seventh transistor M7 is turned on, so that the control terminal of the sixth transistor M6 becomes low, and the sixth transistor M6 is turned off. After the mirror current circuit 2 and the adjusting circuit 3 are started, the sixth transistor M6 in the starting circuit 1 is turned off, so that the sixth transistor M6 cannot output a low-level control signal, and the starting circuit 1 is disconnected from the electrical connection relationship between the mirror current circuit 2 and the bias circuit 4, so that the starting circuit 1 does not affect the mirror current and the reference current.
Although the sixth transistor M6 is turned off and cannot output a low-level control signal, since the mirror current circuit 2 and the modulation circuit 3 are already enabled, since the output terminal of the second transistor M2 is at a low level, the input terminal of the second transistor M2 is at a low level, and therefore the output terminal and the control terminal of the fourth transistor M4 are at a low level, that is, the control terminals of the third transistor M3, the fourth transistor M4 and the bias circuit 4 are still at a low level. Therefore, after the sixth transistor M6 is turned off, the third transistor M3, the fourth transistor M4 and the start-up circuit 1 are still in the on state, and the mirror current circuit 2 and the bias circuit 4 still output the mirror current and the reference current.
In one possible design, as shown in fig. 3, the bias circuit 4 includes an eighth transistor M8. The eighth transistor M8 may be an NMOS transistor or a PMOS transistor. Illustratively, the eighth transistor M8 is a PMOS transistor. Since the input terminal of the eighth transistor M8 is electrically connected to the input terminals of the third transistor M3 and the fourth transistor M4, respectively, and the control terminal of the eighth transistor M8 is electrically connected to the control terminals of the third transistor M3 and the fourth transistor M4, respectively, a reference current proportional to the mirror current can be output by adjusting the channel width-to-length ratio of the eighth transistor M8.
As shown in fig. 3, the reference current source provided by the above technical solution only includes the starting circuit 1, the mirror current circuit 2, the modulation circuit 3 and the bias circuit 4, and does not need other circuit assistance such as an operational amplifier, thereby reducing the voltage division of other auxiliary circuits in the prior art, and therefore, the reference current source can operate with a low power supply voltage, and reducing the power consumption of the circuit.
Fig. 5 shows a curve of the reference current varying with the power supply voltage provided by the embodiment of the present invention, in a range from 0.45V to 1.8V of the power supply voltage, the reference current value is hardly affected by the power supply voltage, and the minimum power supply voltage can reach 0.45V, which greatly reduces the power consumption of the circuit.
The embodiment of the invention provides a method for generating a reference current, which applies the reference current source described in the above embodiment. Fig. 6 is a flowchart illustrating a method for generating a reference current according to an embodiment of the present invention, the method for generating a reference current includes,
And 102, outputting two paths of mirror currents with the same current magnitude by a mirror current circuit under the control of a control signal.
And 103, modulating the mirror image current by the modulation circuit to suppress the temperature coefficient of the mirror image current.
And 104, outputting a reference current by the bias circuit under the control of the control signal, wherein the ratio of the reference current to the mirror current is greater than 0.
In one possible design, the above-described reference current source solution is applied. After the start-up circuit provides the control signal to the mirror current circuit and the bias circuit, the method for generating the reference current source further comprises the following steps: the modulation circuit controls the starting circuit to stop outputting the control signal.
In one possible design, the proportional relationship between the difference between the threshold voltages of the first transistor and the second transistor and the total resistance of the positive temperature coefficient impedance sub-circuit satisfies the following formula:
wherein I is a mirror current value, Δ VthAnd R is the total resistance of the positive temperature coefficient impedance sub-circuit and is the difference of the threshold voltages of the first transistor and the second transistor.
Compared with the prior art, the beneficial effects of the reference current generation method provided by the embodiment of the invention are the same as those of the reference current source provided by the technical scheme, and are not repeated herein.
The embodiment of the invention provides electronic equipment. The electronic device comprises the reference current source.
Compared with the prior art, the electronic device provided by the embodiment of the invention has the same beneficial effects as the reference current source provided by the technical scheme, and the detailed description is omitted here.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. A reference current source, comprising:
the starting circuit is used for providing control signals for the mirror current circuit and the bias circuit;
the mirror current circuit is used for outputting mirror currents with the same current magnitude under the control of the control signal;
a bias circuit electrically connected to a power supply terminal, the bias circuit for outputting a reference current;
the modulation circuit is used for modulating the mirror current output by the mirror current circuit so as to inhibit the temperature coefficient of the mirror current;
the control end of the starting circuit is electrically connected with the public end, the input end of the starting circuit is respectively electrically connected with the power supply end and the public end, and the output end of the starting circuit is respectively electrically connected with the control end of the mirror current circuit and the control end of the bias circuit; the input end of the mirror current circuit is electrically connected with the power supply end, the output end of the mirror current circuit is respectively electrically connected with the input end of the modulation circuit and the control end of the modulation circuit, and the output end of the modulation circuit is electrically connected with the public end.
2. The reference current source of claim 1, wherein the modulation circuit is further configured to stop the start-up circuit from outputting the control signal; and the control end of the modulation circuit is respectively and electrically connected with the control end of the starting circuit and the input end of the starting circuit.
3. The reference current source of claim 2, wherein the modulation circuit comprises: the circuit comprises a first transistor, a second transistor and a positive temperature coefficient impedance sub-circuit, wherein the difference of threshold voltages of the first transistor and the second transistor is greater than 0;
the mirror current circuit comprises a first output end and a second output end, the first output end of the mirror current circuit is electrically connected with the input end of the positive temperature coefficient impedance sub-circuit and the control end of the first transistor, the output end of the positive temperature coefficient impedance sub-circuit is electrically connected with the input end of the first transistor, the control end of the second transistor and the control end of the starting circuit, and the output end of the first transistor is electrically connected with the common end; the input end of the second transistor is electrically connected with the second output end of the mirror current circuit, and the output end of the second transistor is electrically connected with the public end.
4. The reference current source of claim 3,
the positive temperature coefficient impedance sub-circuit comprises a plurality of positive temperature coefficient resistors which are electrically connected together; or the like, or, alternatively,
the positive temperature coefficient impedance sub-circuit comprises a plurality of positive temperature coefficient resistors and a plurality of negative temperature coefficient resistors which are connected together.
5. The reference current source of claim 3,
the channel width-length ratio of the first transistor is the same as the channel width-length ratio of the second transistor; and/or the presence of a gas in the gas,
the proportional relation between the difference of the threshold voltages of the first transistor and the second transistor and the total resistance of the positive temperature coefficient impedance sub-circuit meets the following formula:
wherein I is a mirror current value, Δ VthAnd R is the total resistance of the positive temperature coefficient impedance sub-circuit and is the difference of the threshold voltages of the first transistor and the second transistor.
6. The reference current source according to any one of claims 1 to 4, wherein the mirror current circuit includes a third transistor and a fourth transistor; wherein the content of the first and second substances,
the control end of the third transistor is electrically connected with the control end of the bias circuit, the input end of the third transistor is electrically connected with the power supply end, and the output end of the third transistor is respectively electrically connected with the input end of the positive temperature coefficient impedance sub-circuit and the control end of the modulation circuit;
the control end of the fourth transistor is electrically connected with the output end of the fourth transistor and the control end of the bias circuit respectively, the input end of the fourth transistor is electrically connected with the power supply end, and the output end of the fourth transistor is electrically connected with the input end of the modulation circuit.
7. The reference current source according to any one of claims 1 to 4, wherein the start-up circuit includes a fifth transistor, a sixth transistor, and a seventh transistor; wherein the content of the first and second substances,
the control end of the fifth transistor is electrically connected with the public end, the input end of the fifth transistor is electrically connected with the power supply end, and the output end of the fifth transistor is electrically connected with the control end of the sixth transistor;
the input end of the sixth transistor is electrically connected with the public end, and the output end of the sixth transistor is respectively electrically connected with the control end of the mirror current circuit and the control end of the starting circuit;
the control end of the seventh transistor is electrically connected with the control end of the modulation circuit, the input end of the seventh transistor is electrically connected with the common end, and the output end of the seventh transistor is electrically connected with the control end of the sixth transistor.
8. A method for generating a reference current, using the reference current source according to any one of claims 1 to 7, the method comprising,
a start-up circuit provides control signals to the mirror current circuit and the bias circuit;
the mirror current circuit outputs two paths of mirror currents with the same current under the control of the control signal;
the modulation circuit modulates the image current to suppress the temperature coefficient of the image current;
the bias circuit outputs a reference current under the control of the control signal, and the ratio of the reference current to the mirror current is greater than 0.
9. The reference current generation method according to claim 8,
the reference current source of claim 2, wherein after the start-up circuit provides the control signals to the mirror circuit and the bias circuit, the method further comprises:
the modulation circuit controls the starting circuit to stop outputting the control signal;
and/or the presence of a gas in the gas,
applying the reference current source of claim 2, the proportional relationship between the difference in threshold voltages of the first transistor and the second transistor and the total resistance of the positive temperature coefficient impedance sub-circuit satisfies the following equation:
wherein I is a mirror current value, Δ VthAnd R is the total resistance of the positive temperature coefficient impedance sub-circuit and is the difference of the threshold voltages of the first transistor and the second transistor.
10. An electronic device comprising a reference current source according to any one of claims 1-7.
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| CN101178610A (en) * | 2007-12-05 | 2008-05-14 | 西安标新电子科技有限责任公司 | Circuit outputting adjustable positive and negative or zero-temperature coefficient electrical current and voltage reference |
| US20100246283A1 (en) * | 2009-03-26 | 2010-09-30 | Oki Semiconductor Co., Ltd. | Reference potential generating circuit of semiconductor memory |
| CN104298298A (en) * | 2013-07-16 | 2015-01-21 | 新唐科技股份有限公司 | Reference voltage generating circuit |
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| CN109240407A (en) * | 2018-09-29 | 2019-01-18 | 北京兆易创新科技股份有限公司 | A kind of a reference source |
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2020
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|---|---|---|---|---|
| CN101178610A (en) * | 2007-12-05 | 2008-05-14 | 西安标新电子科技有限责任公司 | Circuit outputting adjustable positive and negative or zero-temperature coefficient electrical current and voltage reference |
| US20100246283A1 (en) * | 2009-03-26 | 2010-09-30 | Oki Semiconductor Co., Ltd. | Reference potential generating circuit of semiconductor memory |
| CN104298298A (en) * | 2013-07-16 | 2015-01-21 | 新唐科技股份有限公司 | Reference voltage generating circuit |
| CN105468076A (en) * | 2015-12-22 | 2016-04-06 | 嘉兴禾润电子科技有限公司 | Full cmos reference current source |
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