Disclosure of Invention
Accordingly, it is necessary to provide a power signal processing circuit and an electrical system that can simplify the wiring and transmission of power and control signals.
A power signal processing circuit comprising:
The control circuit is electrically connected with the external controller and used for acquiring a control signal output by the external controller and outputting a driving signal according to the control signal;
The inverter circuit is electrically connected with the control circuit and is also used for being electrically connected with a direct current power supply, and outputting a power supply control signal after inverting a power supply signal output by the direct current power supply according to a driving signal output by the control circuit; the power control signal is used for supplying power to the electric equipment and controlling the electric equipment.
In one embodiment, the control circuit includes:
the coding circuit is used for being electrically connected with the external controller, coding the control signal output by the external controller and outputting a coding signal;
The driving circuit is electrically connected with the coding circuit and the inversion circuit and is used for outputting driving signals to the inversion circuit according to the coding signals.
In one embodiment, the inverter circuit includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a fourth NMOS transistor;
the grid electrode of the first NMOS tube is electrically connected with the first output end of the driving circuit, the drain electrode of the first NMOS tube is electrically connected with the positive electrode of the direct current power supply, the source electrode of the first NMOS tube is electrically connected with the drain electrode of the second NMOS tube, and the source electrode of the second NMOS tube is electrically connected with electric equipment and used as the first output end for providing a first potential for the electric equipment;
the grid electrode of the second NMOS tube is electrically connected with the second output end of the driving circuit, the drain electrode of the second NMOS tube is electrically connected with the first input end of the electric equipment, and the source electrode of the second NMOS tube is grounded;
The grid electrode of the third NMOS tube is electrically connected with the third output end of the driving circuit, the drain electrode of the third NMOS tube is electrically connected with the positive electrode of the direct current power supply, the source electrode of the third NMOS tube is electrically connected with the drain electrode of the fourth NMOS tube, the source electrode of the third NMOS tube is electrically connected with electric equipment, and the second NMOS tube is used as a second output end to provide a second potential for the electric equipment;
The grid electrode of the fourth NMOS tube is electrically connected with the fourth output end of the driving circuit, the drain electrode of the fourth NMOS tube is electrically connected with the second input end of the electric equipment, and the source electrode of the fourth NMOS tube is grounded;
the signal output by the first output end of the driving circuit is the same as the signal output by the fourth output end, and the signal output by the second output end of the driving circuit is the same as the signal output by the third output end.
In one embodiment, the inverter circuit further includes a first capacitor;
the first end of the first capacitor is used for being electrically connected with the output end of the direct current power supply, and the second end of the first capacitor is grounded.
In one embodiment, the driving circuit includes a first NOT gate, a second NOT gate, a first buffer gate and a second buffer gate;
The input end of the first NOT gate is electrically connected with the output end of the coding circuit, and the output end of the first NOT gate is electrically connected with the grid electrode of the first NMOS tube;
The input end of the second NOT gate is electrically connected with the output end of the coding circuit, and the output end of the second NOT gate is electrically connected with the grid electrode of the fourth NMOS tube;
The input end of the first buffer gate is electrically connected with the output end of the coding circuit, and the output end of the first buffer gate is electrically connected with the grid electrode of the second NMOS tube;
the input end of the second buffer gate is electrically connected with the output end of the coding circuit, and the output end of the second buffer gate is electrically connected with the grid electrode of the third NMOS tube.
An electrical power consumption system, comprising: the device comprises electric equipment, a signal restoring circuit, a rectifying and filtering circuit and a power supply signal processing circuit;
The rectification filter circuit is electrically connected with the power supply signal processing circuit and the power supply end of the electric equipment and is used for rectifying and filtering the power supply control signal output by the power supply signal processing circuit and then outputting a power supply signal to the electric equipment, wherein the power supply signal is used for supplying power to the electric equipment;
The signal restoring circuit is electrically connected with the power supply signal processing circuit and a control signal end of the electric equipment and is used for restoring the power supply control signal and outputting the control signal to the electric equipment, and the control signal is used for controlling the electric equipment to work.
In one embodiment, the signal recovery circuit includes:
The demodulation circuit is used for demodulating the power supply control signal to obtain a coded signal and outputting the coded signal;
And the decoding circuit is electrically connected with the demodulation circuit and the electric equipment and is used for decoding the coded signals output by the demodulation circuit to obtain control signals and outputting the control signals to the electric equipment.
In one embodiment, the demodulation circuit includes: the first resistor, the second resistor, the third resistor and the comparator;
The first end of the first resistor is electrically connected with the first output end of the power signal processing circuit, and the second end of the first resistor is electrically connected with the positive input end of the comparator;
The first end of the second resistor is electrically connected with the positive input end of the comparator, and the second end of the second resistor is electrically connected with the negative input end of the comparator;
the first end of the third resistor is electrically connected with the second output end of the power signal processing circuit, and the second end of the third resistor is electrically connected with the negative input end of the comparator;
the output end of the comparator is electrically connected with the input end of the decoding circuit.
In one embodiment, the decoding circuit includes a decoder.
In one embodiment, a rectifying and filtering circuit includes: a first diode, a second diode, a third diode, a fourth diode, and a second capacitor;
The anode of the first diode is electrically connected with the second output end of the power signal processing circuit, and the cathode of the first diode is electrically connected with the cathode of the second diode;
The anode of the second diode is electrically connected with the first output end of the power supply signal processing circuit, and the cathode is used as the first direct current output end of the rectifying and filtering circuit and is electrically connected with the electric equipment;
the anode of the third diode is electrically connected with the anode of the fourth diode, and the cathode of the third diode is electrically connected with the second output end of the power supply signal processing circuit;
the anode of the fourth diode is used as a second direct current output end of the rectifying and filtering circuit to be electrically connected with electric equipment, and the cathode is electrically connected with a first output end of the power supply signal processing circuit;
the first end of the second capacitor is electrically connected with the cathode of the second diode, and the second end of the second capacitor is electrically connected with the anode of the fourth diode.
The power supply signal processing circuit and the power utilization system are electrically connected with the external controller through the control circuit to acquire control signals, output driving signals to the inversion circuit according to the control signals, and output power supply control signals after the inversion circuit inverts power supply signals output by the direct-current power supply according to the driving signals, so that power supply and control of electric equipment are realized through the power supply control signals.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to and integrated with the other element or intervening elements may also be present. The terms "mounted," "one end," "the other end," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
In one embodiment, as shown in fig. 1, there is provided a power signal processing circuit 100 comprising:
The control circuit 110 is electrically connected to the external controller 200, and is configured to acquire a control signal output by the external controller 200, and output a driving signal according to the control signal;
The inverter circuit 120 is electrically connected to the control circuit 110, and is further configured to electrically connect to the dc power supply 300, invert the power supply signal Ui output by the dc power supply 300 according to the driving signal output by the control circuit 110, and output a power supply control signal U2; the power control signal U2 is used to power the electric device 400 and control the electric device 400.
The external controller 200 is used for generating a control signal, the control signal is used for controlling the electric equipment 400 to work, the electric equipment 400 is required to be placed in the external controller 200 for communication through wires or wirelessly at present, the electric equipment 400 is required to be powered, the power supply is required to be connected with a power supply through a power line, multiple groups of wiring is required to be arranged, and the electric equipment 400 is troublesome to use. The inverter circuit 120 is configured to invert a power signal of the dc power supply 300 into an ac signal and transmit the ac signal, and the control circuit 110 is configured to drive the inverter circuit 120 to perform signal modulation on the power signal, and output a power control signal U2 loaded with a control signal to the electric device 400, so that the electric device 400 can be powered and the purpose of controlling the electric device 400 to operate can be achieved, and the transmission of the control signal and the power signal can be achieved only by setting a power line. Where signal modulation is a process or treatment that causes certain characteristics of one waveform to change from one waveform or signal to another.
The power signal processing circuit 100 is electrically connected to the external controller 200 through a control circuit to obtain a control signal, and outputs a driving signal to the inverter circuit 120 according to the control signal, and the inverter circuit 120 inverts the power signal output by the dc power supply 300 according to the driving signal and outputs a power control signal U2, so as to supply and control the electric equipment 400 through the power control signal U2.
In one embodiment, as shown in FIG. 2, the control circuit 110 includes:
The encoding circuit 111 is electrically connected to the external controller 200, and is configured to encode a control signal output from the external controller 200 and output an encoded signal U1;
the driving circuit 112 is electrically connected to the encoding circuit 111 and the inverter circuit 120, and is configured to output a driving signal to the inverter circuit 120 according to the encoding signal U1.
Encoding is the compilation, conversion of signals or data into a signal form that can be used for communication, transmission and storage. After the encoding circuit 111 acquires the control signal, the control signal is encoded according to a preset encoding rule, and the encoded signal U1 is output to the driving circuit 112. The driving circuit 112 outputs a driving signal to the inverter circuit 120 according to the encoding signal U1, and drives the inverter circuit 120 to operate, which is equivalent to controlling the on/off of the switching device of the inverter circuit 120 by outputting the PWM control signal, so that the inverter circuit 120 outputs the power control signal U2 loaded with the control signal.
In one embodiment, as shown in fig. 3, the inverter circuit 120 includes a first NMOS transistor Q1, a second NMOS transistor Q2, a third NMOS transistor Q3, and a fourth NMOS transistor Q4;
The grid electrode of the first NMOS tube Q1 is electrically connected with the first output end of the driving circuit 112, the drain electrode is electrically connected with the positive electrode of the direct current power supply, the source electrode is electrically connected with the drain electrode of the second NMOS tube Q2, the source electrode is electrically connected with the electric equipment 400, and the first output end is used for providing a first potential for the electric equipment 400;
the grid electrode of the second NMOS tube Q2 is electrically connected with the second output end of the driving circuit 112, the drain electrode is electrically connected with the first input end of the electric equipment 400, and the source electrode is grounded;
the grid electrode of the third NMOS tube Q3 is electrically connected with the third output end of the driving circuit 112, the drain electrode is electrically connected with the positive electrode of the direct current power supply, the source electrode is electrically connected with the drain electrode of the fourth NMOS tube Q4, the source electrode is electrically connected with the electric equipment 400, and the second output end is used for providing a second potential for the electric equipment 400;
The grid electrode of the fourth NMOS tube Q4 is electrically connected with the fourth output end of the driving circuit 112, the drain electrode is electrically connected with the second input end of the electric equipment 400, and the source electrode is grounded;
the signal output from the first output terminal of the driving circuit 112 is the same as the signal output from the fourth output terminal, and the signal output from the second output terminal of the driving circuit 112 is the same as the signal output from the third output terminal.
The first NMOS transistor Q1, the second NMOS transistor Q2, the third NMOS transistor Q3, and the fourth NMOS transistor Q4 form a full-bridge inverter circuit 120, and when the first output terminal and the fourth output terminal of the driving circuit 112 output high-level signals, the second output terminal and the third output terminal output low-level signals, the first NMOS transistor Q1 and the fourth NMOS transistor Q4 are turned on, and the second NMOS transistor Q2 and the third NMOS transistor Q3 are turned off; when the first output end and the fourth output end of the driving circuit 112 output low-level signals, and the second output end and the third output end output high-level signals, the first NMOS transistor Q1 and the fourth NMOS transistor Q4 are turned off, and the second NMOS transistor Q2 and the third NMOS transistor Q3 are turned on. The driving circuit 112 outputs a corresponding driving signal according to the coding signal U1, performs driving control on each NMOS tube in the inverter circuit 120, realizes PWM control on the inverter circuit 120, and makes the inverter circuit 120 output a power control signal U2 with a target frequency to the electric equipment 400, and controls the electric equipment 400 to work while supplying power to the electric equipment 400 by using the frequency of the power control signal U2 to transfer the control signal.
In one embodiment, as shown in fig. 4, the inverter circuit 120 further includes a first capacitor C1;
the first end of the first capacitor C1 is electrically connected to the output end of the dc power supply 300, and the second end is grounded.
The first capacitor C1 is used for filtering and stabilizing the output of the dc power supply 300.
In one embodiment, as shown in fig. 3 and 4, the driving circuit 112 includes a first not gate, a second not gate, a first buffer gate and a second buffer gate;
the input end of the first NOT gate is electrically connected with the output end of the coding circuit 111, and the output end is electrically connected with the grid electrode of the first NMOS tube Q1;
The input end of the second NOT gate is electrically connected with the output end of the coding circuit 111, and the output end of the second NOT gate is electrically connected with the grid electrode of the fourth NMOS tube Q4;
The input end of the first buffer gate is electrically connected with the output end of the coding circuit 111, and the output end is electrically connected with the grid electrode of the second NMOS tube Q2;
the input end of the second buffer gate is electrically connected to the output end of the encoding circuit 111, and the output end is electrically connected to the gate of the third NMOS transistor Q3.
The first and second NOT gates output first driving signals to the gate of the first NMOS transistor Q1 and the gate of the fourth NMOS transistor Q4 respectively, the first and second buffer gates output second driving signals to the gate of the second NMOS transistor Q2 and the gate of the third NMOS transistor Q3 respectively, the first driving signals are opposite to the second driving signals in level, when the output end of the encoding circuit 111 outputs high level, the first NOT gate and the second NOT gate output low level to the gate of the first NMOS transistor Q1 and the gate of the fourth NMOS transistor Q4 respectively, and the first and second buffer gates output high level to the gate of the second NMOS transistor Q2 and the gate of the third NMOS transistor Q3 respectively, so that the first NMOS transistor Q1 and the fourth NMOS transistor Q4 are turned off and the second NMOS transistor Q2 and the third NMOS transistor Q3 are turned on at this time; when the output end of the encoding circuit 111 outputs a low level, the first not gate and the second not gate output a high level to the gate of the first NMOS transistor Q1 and the gate of the fourth NMOS transistor Q4, respectively, and the first buffer gate and the second buffer gate output a low level to the gate of the second NMOS transistor Q2 and the gate of the third NMOS transistor Q3, respectively, so that the first NMOS transistor Q1 and the fourth NMOS transistor Q4 are turned on, and the second NMOS transistor Q2 and the third NMOS transistor Q3 are turned off at this time, thereby realizing PWM control of the inverter circuit 120 and enabling the inverter circuit 120 to output the power control signal U2 with the target frequency to the electric device 400.
In one embodiment, the driving circuit 112 may also be implemented by a driving transformer or a driving chip, and outputs a corresponding driving signal according to the encoding signal U1, and implements PWM control of the inverter circuit by using the driving signal.
In one embodiment, as shown in fig. 5, there is also provided an electrical system comprising: the power consumption device 400, the signal recovery circuit 600, the rectifying and filtering circuit 500 and the power supply signal processing circuit 100;
The rectifying and filtering circuit 500 is electrically connected to the power signal processing circuit 100 and a power end of the electric device 400, and is configured to rectify and filter a power control signal U2 output by the power signal processing circuit 100, and then output a power supply signal U to the electric device 400, where the power supply signal U is used to supply power to the electric device 400;
The signal restoring circuit 600 is electrically connected to the power signal processing circuit 100 and a control signal end of the electric device 400, and is configured to restore the power control signal U2, output the control signal to the electric device 400, and control the electric device 400 to work.
After the power signal processing circuit 100 is connected to the dc power supply 300, according to the control signal output by the external controller 200, a power control signal U2 is output to the electric equipment 400, where the power control signal U2 is an ac signal, and the power control signal U2 needs to be rectified and filtered by the rectifying and filtering circuit 500 to supply power to the electric equipment 400.
The power control signal U2 is a signal obtained by loading a control signal on the power signal, and the power control signal U2 needs to be restored by the signal restoration circuit 600, so as to extract the control signal, and output the control signal to the electric equipment 400, thereby realizing the control of the electric equipment 400.
In one embodiment, the signal recovery circuit 600 includes:
The demodulation circuit is used for demodulating the power supply control signal U2 to obtain a coded signal U1 and outputting the coded signal U1;
The decoding circuit is electrically connected with the demodulation circuit and the electric equipment 400 and is used for decoding the coded signal U1 output by the demodulation circuit to obtain a control signal and outputting the control signal to the electric equipment 400.
Demodulation is the process of recovering a message from a modulated signal carrying information. In order to realize signal transmission, the control circuit 110 is required to perform encoding processing on the control signal, and therefore, the demodulation circuit is required to extract the encoded signal U1 from the power control signal U2 and output the encoded signal to the decoding circuit for decoding. Decoding is a process of restoring a digital code to what it represents or converting an electric pulse signal, an optical signal, a radio wave, etc. to information, data, etc. that it represents by a specific method. Decoding is a process by which a recipient restores a received symbol or code to information, corresponding to the encoding process. The decoding circuit is utilized to restore the coding signal U1 into a control signal and output the control signal to the electric equipment 400, so that the electric equipment 400 can be controlled.
In one embodiment, as shown in fig. 6, the demodulation circuit includes: the first resistor R1, the second resistor R2, the third resistor R3 and the comparator;
the first end of the first resistor R1 is electrically connected with the first output end of the power signal processing circuit 100, and the second end of the first resistor R1 is electrically connected with the positive input end of the comparator;
the first end of the second resistor R2 is electrically connected with the positive input end of the comparator, and the second end of the second resistor R2 is electrically connected with the negative input end of the comparator;
the first end of the third resistor R3 is electrically connected with the second output end of the power signal processing circuit 100, and the second end is electrically connected with the negative input end of the comparator;
the output end of the comparator is electrically connected with the input end of the decoding circuit.
The first resistor R1 and the second resistor R2 divide the voltage of the signal output by the first output end of the power signal processing circuit 100 and then output the divided voltage to the positive input end of the comparator, the third circuit and the second resistor R2 divide the voltage of the signal output by the second output end of the power signal processing power supply and then output the divided voltage to the negative input end of the comparator, and when the voltage of the positive input end is larger than that of the negative input end, a high level is output; when the voltage of the positive input end is smaller than that of the negative input end, a low level is output, and the coding signal U1 can be restored.
In one embodiment, the comparator in the demodulation circuit may be replaced by an operational amplifier or a transformer according to the signal characteristics, and if the power control signal U2 is a low-voltage high-frequency signal, the comparator may be used; if the power control signal U2 is a low-voltage low-frequency signal, an operational amplifier may be used; if the power control signal U2 is a high voltage signal, a transformer may be used.
In one embodiment, the decoding circuit includes a decoder.
Decoding is the inverse of encoding, and a decoder is a device that restores information from the encoded form to its original form. The encoded signal U1 can be decoded by a decoder to obtain a control signal.
In one embodiment, as shown in fig. 6, the rectifying and filtering circuit 500 includes: a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, and a second capacitor C2;
The anode of the first diode D1 is electrically connected with the second output end of the power signal processing circuit 100, and the cathode is electrically connected with the cathode of the second diode D2;
The anode of the second diode D2 is electrically connected with the first output end of the power signal processing circuit 100, and the cathode is used as the first direct current output end of the rectifying and filtering circuit 500 and is electrically connected with the electric equipment 400;
The anode of the third diode D3 is electrically connected to the anode of the fourth diode D4, and the cathode is electrically connected to the second output end of the power signal processing circuit 100;
the anode of the fourth diode D4 is electrically connected to the electric device 400 as the second dc output end of the rectifying and filtering circuit 500, and the cathode is electrically connected to the first output end of the power signal processing circuit 100;
The first end of the second capacitor C2 is electrically connected to the cathode of the second diode D2, and the second end is electrically connected to the anode of the fourth diode D4.
The first diode D1, the second diode D2, the third diode D3 and the fourth diode D4 form a bridge rectifier circuit, rectify the power control signal U2 output by the power signal processing circuit 100, and the second capacitor C2 is configured to filter the rectified signal and output the power supply signal U to the electric device 400.
In one embodiment, bridge rectification is an improvement over diode half-wave rectification by utilizing unidirectional conduction of diodes to rectify alternating current into direct current. The half-wave rectification utilizes the unidirectional conduction characteristic of a diode, and under the condition that the input is a standard sine wave, the output obtains the positive half part of the sine wave, the negative half part is lost, and the full wave can be reserved by using bridge type rectification, which is equivalent to full wave rectification, but the full wave rectification circuit needs to be provided with a transformer with taps.
In one embodiment, the rectifying part circuit may also adopt a voltage-multiplying rectifying circuit or a current-multiplying rectifying circuit.
In one embodiment, as shown in fig. 7, taking 1010 as an example of a control signal, assuming that a rule of signal transmission 1 with frequency F1 and signal transmission 0 with frequency F2 is adopted to encode the control signal, outputting an encoded signal U1 to a driving circuit 112, wherein a driving level outputs a corresponding driving signal according to the encoded signal U1, if a time t in the encoded signal U1 is a high level, at this time, both the first not gate and the second not gate output a low level, and both the first buffer gate and the second buffer gate output a high level; if the time t in the encoded signal U1 is low, the first not gate and the second not gate both output high level at this time, and the first buffer gate and the second buffer gate both output low level. The driving circuit 112 drives the inverter circuit 120 to output a power control signal U2 (as shown in fig. 8) to the rectifying and filtering circuit 500 by outputting a driving signal corresponding to the encoding signal U1, and the rectifying and filtering circuit 500 rectifies and filters the power control signal U2 to output a power supply signal U to the electric device 400 to supply power to the electric device 400; the demodulation circuit in the signal restoring circuit 600 is used for extracting the coding signal U1 from the power supply control signal U2, the decoding circuit is used for decoding the coding signal U1, and the restored control signal is output to the electric equipment 400 to control the electric equipment 400 to work.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.