CN111262600B

CN111262600B - Real-time searching method and device for broadband digital signal frequency

Info

Publication number: CN111262600B
Application number: CN202010142003.4A
Authority: CN
Inventors: 刘升财; 熊朝廷
Original assignee: Sichuan Jiuzhou Electric Group Co Ltd
Current assignee: Sichuan Jiuzhou Electric Group Co Ltd
Priority date: 2020-03-04
Filing date: 2020-03-04
Publication date: 2021-07-20
Anticipated expiration: 2040-03-04
Also published as: CN111262600A

Abstract

The invention discloses a real-time searching method for broadband digital signal frequency, belonging to the technical field of signal processing, and the method comprises the following steps: running a search algorithm through an FPGA, wherein the search algorithm comprises channelizing a high-speed broadband intermediate-frequency signal to obtain a low-speed baseband signal and performing time domain detection and frequency domain detection on the low-speed baseband signal to obtain time-frequency information; outputting the time-frequency information obtained by detection to a DSP (digital signal processor) in real time through an FPGA (field programmable gate array), and dynamically configuring various parameters in a search algorithm by the DSP according to the change of an external field environment; the time frequency information is compared with the characteristics of the high-speed broadband intermediate frequency signal through the DSP, and the final judgment of the signal frequency point is made, so that the information of time domain amplitude, pulse width, frequency domain amplitude and the like of each narrowband signal can be effectively calibrated, the frequency point value of the signal is obtained, and the purposes of receiving and processing the signal under the condition of unknown frequency point are achieved.

Description

Real-time searching method and device for broadband digital signal frequency

Technical Field

The invention belongs to the technical field of signal processing, and particularly relates to a method and a device for searching frequency of a broadband digital signal in real time.

Background

With the development of chip technology, digital phased array technology, transmission and processing devices becoming faster and faster, the development of high-speed broadband sampling technology is accelerated, so that the use of wide-medium-frequency sampling and radio-frequency sampling technology in radar becomes easier and more common.

In a wide-medium frequency sampling system, a plurality of narrow-band signals may be included in sampled intermediate frequency data, and therefore, signals included in wide-medium frequency digital signals need to be extracted, frequency points of the signals are found, digital down-conversion, filtering and other processing are performed to convert the signals to a baseband, and then subsequent signal processing procedures such as decoding and the like are performed.

The existing digital receiving scheme mainly receives and subsequently processes a single narrow-band signal such as a determined intermediate frequency signal or a zero intermediate frequency signal, has a simple structure and low cost, can be carried out under the condition of a known received signal frequency point, cannot receive a signal or simultaneously receive a plurality of narrow-band signals under an unknown frequency point, and does not meet the development requirement of a digital receiver.

Disclosure of Invention

In view of the above, in order to solve the above problems in the prior art, the present invention aims to provide a method and a device for searching frequency of a wideband digital signal in real time, so as to effectively calibrate information such as time domain amplitude, pulse width, frequency domain amplitude, etc. of each narrowband signal, obtain a frequency point value of the signal, and achieve the purpose of receiving and processing the signal under the condition of unknown frequency point.

The technical scheme adopted by the invention is as follows: a method for real-time searching of a wideband digital signal frequency, the method comprising:

running a search algorithm through an FPGA, wherein the search algorithm comprises channelizing a high-speed broadband intermediate-frequency signal to obtain a low-speed baseband signal and performing time domain detection and frequency domain detection on the low-speed baseband signal to obtain time-frequency information;

outputting the time-frequency information obtained by detection to a DSP (digital signal processor) in real time through an FPGA (field programmable gate array), and dynamically configuring various parameters in a search algorithm by the DSP according to the change of an external field environment;

comparing the time frequency information with the characteristics of the high-speed broadband intermediate frequency signal through the DSP, and making final judgment of the signal frequency point;

the search algorithm in the method has the advantages of novel design thought, concise and efficient flow, reliable processing method, real-time performance and dynamic configurability.

Further, the channelizing includes:

presetting a plurality of NCO according to carrier frequencies of a plurality of narrow-band signals in the high-speed broadband intermediate frequency signal;

carrying out complex multiplication operation on output signals of each NCO to obtain corresponding high-speed baseband signals;

and performing multi-stage extraction speed reduction and anti-aliasing filtering on the high-speed baseband signal to obtain a low-speed baseband signal.

Further, the method of time domain detection includes:

calculating the time domain average amplitude of a frequency point at a certain moment according to partial prior information of a narrow-band signal in a fast broadband intermediate frequency signal;

judging the noise threshold of the frequency point in each T time range around the moment, judging the statistical result through the statistical threshold, if the statistical result is more than A, determining that the frequency point is a signal, and outputting a judgment mark '1' through the statistical threshold;

and screening out the time domain amplitude by counting the threshold discrimination marks.

Further, the frequency point with the judgment mark of '1' is output through counting the threshold, and the arrival time and the pulse width of the pulse are measured by utilizing the rising edge and the falling edge of the pulse, so as to acquire the pulse width.

Furthermore, the threshold parameter of the noise threshold is that M narrow-band signals are selected by the DSP, the complex signal amplitude of each narrow-band signal output by filtering is averaged, the average is set to σ, and 3 σ is used as the threshold parameter, so as to ensure that the decision result of the noise threshold is optimal.

Furthermore, the parameter a in the statistical threshold is dynamically configured by the DSP according to the external field environment change, so as to ensure that the decision result of the statistical threshold is optimal.

Further, the frequency domain detection method comprises:

carrying out demodulation operation on the low-speed baseband signal to obtain a demodulation complex signal;

performing FFT operation on the de-modulated complex signal, and calculating the spectral line position according to the time domain detection result;

and calculating the frequency domain amplitude through the FFT operation result.

Further, during FFT operation, the start time of the data fetch is indicated by the result of the time domain detection, starting from the rising edge of the pulse, and the following instructions are executed: the FFT length is fixed to N to obtain the spectral line position.

The invention also discloses a real-time searching device for the frequency of the broadband digital signal, which comprises an FPGA, a DSP, a peripheral clock and a power supply, wherein the FPGA, the DSP and the peripheral clock are respectively connected with the power supply and supply power to the power supply through the power supply;

the FPGA is loaded with a search algorithm and outputs time-frequency information through the search algorithm;

the DSP interacts with the FPGA data through an EMIF bus, and is used for dynamically configuring a search algorithm and outputting final judgment according to time-frequency information.

The invention has the beneficial effects that:

1. the invention provides a real-time searching method and a device for broadband digital signal frequency, which adopts a cooperative working mode of FPGA and DSP, wherein the FPGA receives and digitally filters in parallel by using multi-channel, narrow-band and fixed carrier frequency according to partial prior information of a target signal to obtain related parameters of a time domain and a frequency domain, and outputs the related parameters to the DSP for final judgment; meanwhile, the DSP needs to dynamically configure the parameters of the algorithm in the FPGA according to the specific environment of the external field, so that the optimization of key indexes such as SNR (signal to noise ratio), sensitivity and the like of the whole machine is effectively ensured; the method is particularly suitable for various application environments such as radar, communication, countermeasure and the like, can realize frequency search of various signal formats in a password-free state, and provides a basis for subsequent signal demodulation, decoding and the like; meanwhile, the device can be self-adaptive to the replacement of the device and the change of the environment, and the performance of the device is ensured to be always automatically in a reliable state.

Drawings

FIG. 1 is a flowchart of the search algorithm in the real-time searching method for the frequency of the wideband digital signal provided by the present invention;

fig. 2 is a flowchart of the time domain detection in the search algorithm of the real-time searching method for the frequency of the wideband digital signal provided by the present invention.

Detailed Description

Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar modules or modules having the same or similar functionality throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application. On the contrary, the embodiments of the application include all changes, modifications and equivalents coming within the spirit and terms of the claims appended hereto.

The noun explains:

(1) channelizing: the channelizing mainly comprises three parts of digital down-conversion, multi-stage extraction and anti-aliasing filtering, and is used for converting a high-speed broadband intermediate-frequency signal into a low-speed baseband signal.

(2) Time domain detection: the time domain detection mainly analyzes and operates signals in a time domain, inputs a low-speed baseband signal, a noise threshold and a statistical threshold, and outputs parameters such as time domain average amplitude, pulse width and the like of a target signal;

(3) and (3) frequency domain detection: the frequency domain detection is used for carrying out frequency domain analysis and operation on the signals detected by the time domain, inputting low-speed baseband signals and time domain average amplitude thereof, and outputting parameters such as spectral line positions, frequency domain average amplitude and the like;

(4) and (4) comprehensive judgment: the DSP synthesizes the specific environment of the external field and partial prior information of the target signal according to various time-frequency parameters calculated by the FPGA to obtain the final judgment of the frequency point of the target signal;

(5) dynamic configuration: the DSP can carry out real-time configuration on parameters such as a noise threshold, a statistical threshold and the like in time-frequency detection according to the specific environment of an external field, so that key indexes such as a signal-to-noise ratio, sensitivity and the like are optimized;

(6) NCO: a digitally controlled oscillator;

(7) FPGA: a field programmable gate array;

(8) and (4) DSP: a digital signal processor;

(9) FFT operation: and (5) performing fast Fourier transform operation.

Example 1

In this embodiment, a method for searching a frequency of a wideband digital signal in real time is specifically provided, where the method includes:

1. running a search algorithm through an FPGA, wherein the search algorithm comprises channelizing a high-speed broadband intermediate-frequency signal to obtain a low-speed baseband signal, performing time domain detection and frequency domain detection on the low-speed baseband signal to obtain time-frequency information, and updating and outputting the time-frequency information in real time, wherein the time-frequency information at least comprises time domain amplitude, pulse width, spectral line position and frequency domain amplitude; in this embodiment, the FPGA undertakes the implementation of a main search algorithm, and obtains time-domain and frequency-domain related parameters by parallel receiving and digital filtering using multiple channels, narrow bands and fixed carrier frequencies according to part of prior information of a high-speed broadband intermediate-frequency signal, mainly including three parts of channelization, time-domain detection and frequency-domain detection; as shown in fig. 1, the following are specific:

a) channelizing a high-speed wideband intermediate frequency signal, the channelizing comprising:

1) and presetting a plurality of NCO according to carrier frequencies of a plurality of narrowband signals in the high-speed broadband intermediate frequency signal.

2) And carrying out complex multiplication operation on the output signals of each NCO, namely multiplying the output signals by AD data respectively to obtain corresponding high-speed baseband signals.

3) And according to the bandwidth of the narrow-band signal, performing multistage extraction speed reduction and anti-aliasing filtering on the high-speed baseband signal to obtain a low-speed baseband signal.

The received high-speed broadband intermediate-frequency signals are channelized through the steps, and in the process, the high-speed baseband signals are subjected to speed reduction processing, so that the power consumption of the FPGA can be greatly reduced, and the time sequence performance is improved.

b) Performing time domain detection on the low-speed baseband signal, wherein the time domain detection comprises:

1) and calculating the time domain average amplitude of the frequency point at a certain moment according to partial prior information of the narrow-band signal in the fast broadband intermediate frequency signal.

2) And (3) carrying out noise threshold judgment on the frequency points in each T time range around the moment, carrying out statistical result judgment on the output result of the noise threshold judgment after the output result is subjected to sliding window statistics, and then carrying out statistical result judgment through a statistical threshold, wherein if the statistical result is greater than A, the frequency point is considered to be a signal, and the statistical threshold outputs a judgment mark '1'.

The threshold parameter of the noise threshold is obtained by selecting M narrow-band signals and averaging the amplitude of the complex signals output by filtering the M narrow-band signals through the DSP when no radio frequency signal is input, the average value is set as sigma, the sigma is related to the gain of the receiver, the higher the gain, the larger the sigma, and 3 sigma is used as the threshold parameter of the noise threshold, because the noise probability exceeding 3 sigma is less than one thousandth, the width is narrower and discontinuous.

And the parameter A in the statistical threshold is dynamically configured by the DSP according to the change of the external field environment.

3) The time domain amplitude is screened out through a noise threshold and a statistical threshold discrimination sign, namely reference amplitude statistics shown in figure 1, the reference amplitude statistics is that the time domain average amplitude of a frequency point at a certain moment is calculated, and the time domain amplitude is obtained after the time domain average amplitude passes the noise threshold and the statistical threshold discrimination screening, and is used as time frequency information; as shown in fig. 2, the primary decision threshold is a background noise threshold, after the background noise is filtered by the primary decision threshold, a secondary threshold decision is performed on the signal or the data after the signal is superimposed with noise glitch, and the secondary threshold decision mainly filters the noise glitch with narrower pulse width by sliding window statistics to obtain the required target signal.

4) And outputting a frequency point with a judgment mark of '1' by counting a threshold, and measuring the arrival time and the pulse width of the pulse by utilizing the rising edge and the falling edge of the pulse so as to obtain the pulse width in the time-frequency information.

_c) Performing frequency domain detection on the low-speed baseband signal, wherein the frequency domain detection comprises:

1) the low-speed baseband signal (also called IQ baseband signal) is subjected to a demodulation operation, and a demodulated real part I is output²-Q²And the imaginary part is 2I multiplied by Q to obtain a de-modulated complex signal; i.e. the real part of the unmodulation is:

cos²(ωt+θ(t))-sin²(ωt+θ(t))＝cos(2ωt+2θ(t))＝cos(2ωt)

the de-modulated imaginary part is:

2×cos(ωt+θ(t))×sin(ωt+θ(t))＝sin(2ωt+2θ(t))＝sin(2ωt)

because the value of theta (t) of BPSK modulation is 0 or pi, and is always 0 after 2 times, after the real part and the imaginary part obtained by modulation are subjected to FFT operation, a peak value should appear at a 2 omega frequency position, and the mechanism provides support for judging the carrier frequency position of a signal.

In the embodiment, the search algorithm combines several single technologies such as digital down-conversion, multi-stage extraction, anti-aliasing filtering, fast fourier transform, data comprehensive processing and the like into a complete search algorithm for searching the signal frequency of the digital phased array, and the search algorithm has the advantages of novel design thought, concise and efficient flow and reliable processing method.

2) Performing FFT operation on the de-modulated complex signal, wherein the de-modulated signal is as follows: (I)²-Q²) + jx2 xIxQ, j represents a complex number, and the spectral line position is calculated according to the result of time domain detection; in FFT operation, the start time of the data fetch is indicated by the result of time domain detection (pipeline delay of detection needs to be compensated, and the detection is performedData alignment, that is, before FFT operation, data needs to be delayed to compensate for pipeline delay caused by the time domain detection and calculation part, so as to ensure that data participating in time domain and frequency domain detection is the same group of data), starting from the rising edge of pulse, order: the FFT length is fixed to be N, so that the spectral line position is obtained, and the resolution is as follows: Fs/N;

3) and calculating the frequency domain amplitude through the FFT operation result, and according to the energy conservation theorem (Pasteval theorem), knowing that the frequency domain amplitude after the FFT operation and the acquired time domain amplitude form a fixed proportional relation so as to verify whether the frequency domain amplitude and the time domain amplitude are correct or not. Wherein, calculating the frequency domain amplitude means: through the FFT operation result, the FFT amplitudes of 3 intervals are compared and determined to be large, and the obtained maximum FFT amplitude is taken as the frequency domain amplitude, in this embodiment, 3 intervals are preferably: f0+ -156 k, F0+1M + -156 k and F0-1M + -156 k.

2. The time-frequency information obtained by detection is output to the DSP in real time through the FPGA, and the DSP dynamically configures various parameters (namely M, sigma and T, A, N in the working flow of the search algorithm) in the search algorithm according to the change of the external field environment, so that the precision of the search algorithm and indexes such as the signal-to-noise ratio, the sensitivity and the like of the whole machine are optimized; the DSP is mainly responsible for controlling and finally judging the search algorithm, and dynamically configuring the noise threshold and the statistical threshold in each search algorithm in the algorithm according to the specific environment of an external field.

3. And comparing the time frequency information with the characteristics of the high-speed broadband intermediate-frequency signal through the DSP, and making a comprehensive judgment, namely synthesizing each item of time frequency information calculated by the DSP according to the FPGA, a specific external field environment and partial prior information of the high-speed broadband intermediate-frequency signal, and obtaining a final judgment of a target signal frequency point.

Example 2

The device adopts a cooperative working mode of FPGA and DSP, and comprises the FPGA, the DSP, a peripheral clock and a power supply, wherein the FPGA, the DSP and the peripheral clock are respectively connected with the power supply and supply power to the power supply through the power supply;

the FPGA is loaded with a search algorithm and outputs time-frequency information through the search algorithm, the FPGA serves as a main realization chip of the search algorithm, the performance of the FPGA has direct influence on the search performance, and the search process comprises a large amount of operations such as NCO, DDC, FIR, FFT and the like, so that certain requirements are required on resources, typical LUT resources are about more than one hundred thousand, and multiplier resources (DSP) are about more than one thousand;

the DSP interacts with the FPGA data through an EMIF bus, and is used for dynamically configuring a search algorithm and outputting final judgment according to time-frequency information. The DSP mainly plays a role in controlling in a search algorithm, and comprises the output of a final judgment result and the issuing of dynamic configuration parameters.

The power supply is used for supplying power to the chip on the board and providing an interface adaptation circuit, a peripheral data storage circuit and the like; the peripheral clock is used for system clock output, reset output and special clock output of the high-speed serial interface.

The broadband digital signal frequency real-time searching device provided by the scheme has the advantages of reliable performance, reasonable cost and easy engineering realization.

It should be noted that, in the description of the present application, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Further, in the description of the present application, the meaning of "a plurality" means at least two unless otherwise specified.

Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and the scope of the preferred embodiments of the present application includes other implementations in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.

It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.

It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.

In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.

The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc.

In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Although embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and that variations, modifications, substitutions and alterations may be made to the above embodiments by those of ordinary skill in the art within the scope of the present application.

Claims

1. A method for searching frequency of broadband digital signal in real time, the method comprising:

outputting the time frequency information obtained by detection to a DSP (digital signal processor) in real time through an FPGA (field programmable gate array), and dynamically configuring a noise threshold and a statistical threshold in a search algorithm by the DSP according to the change of an external field environment;

the time domain detection method comprises the following steps:

calculating the time domain average amplitude of a frequency point at a certain moment according to partial prior information of a narrow-band signal in a high-speed broadband intermediate-frequency signal;

judging the noise threshold of the frequency point in each T time range around the moment, judging the statistical result through the statistical threshold, if the statistical result is more than A, determining that the frequency point is a signal, and outputting a judgment mark '1' through the statistical threshold; the parameter A in the statistical threshold is dynamically configured by the DSP according to the change of the external field environment;

screening out time domain amplitude by counting threshold discrimination marks;

the frequency domain detection method comprises the following steps:

2. The method of real-time wideband digital signal frequency searching according to claim 1, wherein said channelizing comprises:

multiplying the output signals of each NCO by AD data respectively to obtain corresponding high-speed baseband signals;

3. The method for searching the frequency of the broadband digital signal in real time according to claim 1, wherein the frequency point with the discrimination sign of '1' is output through a statistical threshold, and the arrival time and the pulse width of the pulse are measured by using the rising edge and the falling edge of the pulse.

4. The method of claim 1, wherein the threshold parameter of the noise threshold is obtained by selecting M narrow-band signals through the DSP, averaging the amplitudes of the complex signals output by filtering each narrow-band signal, setting the average value as σ, and using 3 σ as the threshold parameter.

5. The method of claim 1, wherein during FFT, the start time of the data acquisition is indicated by the result of the time domain detection, starting from the rising edge of the pulse, and the following steps are performed: the FFT length is fixed to N to obtain the spectral line position.

6. A real-time searching device for the frequency of a broadband digital signal is characterized in that the device applies the real-time searching method for the frequency of the broadband digital signal according to any one of claims 1 to 5, the device comprises an FPGA, a DSP, a peripheral clock and a power supply, and the FPGA, the DSP and the peripheral clock are respectively connected with the power supply and supply power to the power supply through the power supply;