CN111259620B - Method, system, equipment and medium for checking blind buried hole in PCB - Google Patents
Method, system, equipment and medium for checking blind buried hole in PCB Download PDFInfo
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Abstract
The invention discloses a method for inspecting blind buried holes in a PCB (printed circuit board), which comprises the following steps of: acquiring a set of all guide holes in the PCB; filtering the through holes in the set according to the drilling size of the guide hole to obtain a set of blind buried holes; obtaining the order of each blind buried hole according to the starting level and the last level of each blind buried hole in the set of blind buried holes; and checking each blind buried hole according to the order to obtain the blind buried holes which do not accord with the preset rule. The invention also discloses a system, a computer device and a readable storage medium. The scheme provided by the invention can quickly find the HDI through hole violating the HDI order, reduce the Layout reworking time and improve the efficiency of PCB wiring engineers.
Description
Technical Field
The invention relates to the field of PCBs, in particular to a method, a system, equipment and a storage medium for checking blind buried holes in a PCB.
Background
In the PCB wiring design, a server mainboard is provided with tens of thousands of HDI through holes (via), the higher the HDI order (Any Layer), the higher the cost and the lower the PCB yield, therefore, when a Layout of the PCB is required, a Layout engineer needs to manually check whether the HDI through holes (via) meet the order requirement one by one, and the engineer manually searches and compares all the HDI through holes (via) one by one, thereby not only consuming time, but also checking the HDI through holes (via) order one by one, and being incapable of ensuring whether omission exists.
Disclosure of Invention
In view of the above, in order to overcome at least one aspect of the above problems, an embodiment of the present invention provides a method for inspecting a blind buried via in a PCB, including the steps of:
acquiring a set of all guide holes in the PCB;
filtering the through holes in the set according to the drilling size of the guide hole to obtain a set of blind buried holes;
obtaining the order of each blind buried hole according to the starting level and the last level of each blind buried hole in the set of blind buried holes;
and checking each blind buried hole according to the order to obtain the blind buried holes which do not accord with the preset rule.
In some embodiments, checking each blind buried hole according to the order to obtain a blind buried hole that does not meet a preset rule, further includes:
acquiring a preset constraint value;
judging whether the order is not greater than the constraint value;
and responding to the order greater than the constraint value, and judging that the blind buried hole corresponding to the order greater than the constraint value does not conform to a preset rule.
In some embodiments, further comprising:
and acquiring the coordinates of the blind buried holes which do not accord with the preset rule, and generating a report according to the coordinates.
In some embodiments, further comprising:
and establishing a link between the coordinates of each blind buried hole in the report which does not conform to the preset rule and the blind buried holes in the PCB.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention also provides a system for inspecting a blind buried hole in a PCB, including:
an acquisition module configured to acquire a set of all vias in a PCB;
a filtering module configured to filter the through holes in the set according to the drill hole size of the pilot hole to obtain a set of blind buried holes;
the calculation module is configured to obtain the order of each blind buried hole according to the starting level and the last level of each blind buried hole in the set of blind buried holes;
and the checking module is configured to check each blind buried hole according to the order to obtain the blind buried holes which do not accord with a preset rule.
In some embodiments, the inspection module is further configured to:
acquiring a preset constraint value;
judging whether the order is not greater than the constraint value;
and responding to the order greater than the constraint value, and judging that the blind buried hole corresponding to the order greater than the constraint value does not conform to a preset rule.
In some embodiments, further comprising:
the report generation module is configured to acquire the coordinates of the blind buried hole which does not conform to the preset rule, so as to generate a report according to the coordinates.
In some embodiments, the report generation module is further configured to:
and establishing a link between the coordinates of each blind buried hole in the report which does not conform to the preset rule and the blind buried holes in the PCB.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a computer apparatus, including:
at least one processor; and
a memory storing a computer program operable on the processor, wherein the processor when executing the program performs the steps of any of the methods of inspecting blind buried vias in a PCB as described above.
Based on the same inventive concept, according to another aspect of the present invention, there is also provided a computer-readable storage medium storing a computer program which, when executed by a processor, performs the steps of any one of the methods of inspecting blind buried vias in a PCB as described above.
The invention has one of the following beneficial technical effects: the scheme provided by the invention can quickly find the HDI through hole violating the HDI order, reduce the Layout rework time and improve the PCB wiring engineer efficiency.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flow chart of a method for inspecting a blind buried via in a PCB according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a human-computer interaction interface provided by an embodiment of the invention;
FIG. 3 is a Keepout level provided by an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a system for inspecting blind buried vias in a PCB according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a computer device provided in an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a computer-readable storage medium according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
According to an aspect of the present invention, an embodiment of the present invention proposes a method of inspecting a blind buried hole in a PCB, as shown in fig. 1, which may include the steps of: s1, acquiring a set of all guide holes in the PCB; s2, filtering the through holes in the set according to the drilling sizes of the guide holes to obtain a set of blind buried holes; s3, obtaining the order of each blind buried hole according to the starting level and the last level of each blind buried hole in the set of blind buried holes; and S4, checking each blind buried hole according to the order to obtain the blind buried hole which does not accord with the preset rule.
The scheme provided by the invention can quickly find the HDI through hole violating the HDI order, reduce the Layout reworking time and improve the efficiency of PCB wiring engineers.
In some embodiments, in step S1, a set of all VIAs in the PCB is obtained, the VIAs including through holes (VIAs) and HDI VIA (blind buried VIAs).
Specifically, when all the vias are obtained, all the layer displays may be closed, via holes (vias) may be opened, and then all the vias may be obtained and placed in list C.
In some embodiments, in step S2, the through holes in the set are filtered according to the drilling sizes of the vias to obtain a set of blind and buried holes, and since the drilling of the through holes is generally about 10 mils and 8 mils, and the drilling of the blind and buried holes is generally about 4 mils, the through holes in the set can be filtered through the drilling sizes to obtain a set combined by the blind and buried holes.
Specifically, filtering of the through holes can be realized by using a parent syntax, all the guide holes can be assumed as elements, and then the elements of the HDI via holes are screened out based on the drilling size through the parent syntax, for example, the elements of the HDI via holes with the element- > parent- > name equal to HDI via holes are searched out, so that filtering of the through holes in the set can be realized, and the set only including blind buried holes is obtained.
In some embodiments, in step S3, in order of each blind buried hole is obtained according to the starting level and the last level of each blind buried hole in the set of blind buried holes, a value corresponding to the starting level and the last level of each blind buried hole may be obtained by calling an API interface function mxGetPr, and a difference between the values corresponding to the starting level and the last level is calculated by using the mxGetPr function, where the calculated difference is the order of each blind buried hole.
In some embodiments, in step S4, checking each blind buried hole according to the order to obtain a blind buried hole that does not comply with a preset rule, the method may further include:
acquiring a preset constraint value;
judging whether the order is not greater than the constraint value;
and responding to the order greater than the constraint value, and judging that the blind buried hole corresponding to the order greater than the constraint value does not conform to a preset rule.
Specifically, as shown in fig. 2, the preset constraint value may be obtained by a user through a human-computer interface, and the PCB layout engineer may select a constraint value of the HDI order in the Layer step, where the parameter value may be self-defined by the project requirement, and may be 2 orders or 3 orders or more, and of course, the higher the HDI order (Any Layer), the higher the cost, and the lower the yield of the PCB.
It should be noted that, as long as the calculated order of each blind buried hole is not greater than the constraint value input by the user, it is determined that the blind buried hole conforms to the rule.
In some embodiments, the method may further comprise:
and acquiring the coordinates of the blind buried holes which do not accord with the preset rule, and generating a report according to the coordinates.
In some embodiments, the method may further comprise:
and establishing a link between the coordinates of each blind buried hole in the report which does not conform to the preset rule and the blind buried holes in the PCB.
Specifically, if the order of an HDI via is greater than the constraint value, a DRC is generated, and whether to output a DRC Report is selected through a DRC Report button in the interactive interface shown in fig. 2. The report content can comprise coordinate positions of HDI through holes, and each coordinate is linked with a blind buried hole in the PCB, so that a Layout engineer can quickly locate the blind buried hole which does not accord with the rule and correct the blind buried hole by clicking the coordinate directly.
It should be noted that the user can select HDI VIA in type in the interactive interface as shown in fig. 2 to obtain a set containing blind buried VIAs.
In some embodiments, as shown in fig. 3, HDI VIA VIAs violating the constraint values are respectively drawn at the VIA Keepout level according to the input constraint values and the calculated orders.
The technical scheme provided by the invention can automatically draw a Via Keepout Layer by setting the parameter value of the HDI order (Any Layer), quickly search the HDI Via hole (Via) violating the HDI order (Any Layer), reduce the Layout rework time, improve the efficiency of PCB wiring engineers, and avoid the problems that the time is consumed for searching and comparing one by one during manual inspection and whether omission exists or not cannot be ensured.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a system 400 for inspecting blind buried holes in a PCB, as shown in fig. 4, including:
an obtaining module 401, wherein the obtaining module 401 is configured to obtain a set of all vias in a PCB;
a filtering module 402, the filtering module 402 configured to filter the through holes in the set according to the drill hole size of the pilot hole to obtain a set of blind buried holes;
a calculating module 403, where the calculating module 403 is configured to obtain an order of each blind buried hole according to a starting level and a last level of each blind buried hole in the set of blind buried holes;
a checking module 404, wherein the checking module 404 is configured to check each blind buried hole according to the order to obtain a blind buried hole which does not conform to a preset rule.
In some embodiments, the checking module 404 is further configured to:
acquiring a preset constraint value;
judging whether the order is not greater than the constraint value;
and responding to the order greater than the constraint value, and judging that the blind buried hole corresponding to the order greater than the constraint value does not conform to a preset rule.
In some embodiments, further comprising:
the report generation module is configured to acquire the coordinates of the blind buried hole which does not conform to the preset rule, so as to generate a report according to the coordinates.
In some embodiments, the report generation module is further configured to:
and establishing a link between the coordinates of each blind buried hole in the report which does not conform to the preset rule and the blind buried holes in the PCB.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 5, an embodiment of the present invention further provides a computer apparatus 501, comprising:
at least one processor 520; and
a memory 510, the memory 510 storing a computer program 511 executable on the processor, the processor 520 when executing the program performing the steps of any of the above methods of checking for blind buried vias in a PCB.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 6, an embodiment of the present invention further provides a computer-readable storage medium 601, where the computer-readable storage medium 601 stores computer program instructions 610, and the computer program instructions 610, when executed by a processor, perform the steps of any one of the above methods for inspecting blind buried holes in a PCB.
Finally, it should be noted that, as will be understood by those skilled in the art, all or part of the processes of the methods of the above embodiments may be implemented by a computer program to instruct related hardware to implement the methods. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a Random Access Memory (RAM). The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
In addition, the apparatuses, devices, and the like disclosed in the embodiments of the present invention may be various electronic terminal devices, such as a mobile phone, a Personal Digital Assistant (PDA), a tablet computer (PAD), a smart television, and the like, or may be a large terminal device, such as a server, and the like, and therefore the scope of protection disclosed in the embodiments of the present invention should not be limited to a specific type of apparatus, device. The client disclosed by the embodiment of the invention can be applied to any one of the electronic terminal devices in the form of electronic hardware, computer software or a combination of the electronic hardware and the computer software.
Furthermore, the method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, and the computer program may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the functions defined above in the methods disclosed in the embodiments of the present invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Further, it should be appreciated that the computer-readable storage media (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the above embodiments of the present invention are merely for description, and do not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps of implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A method of inspecting a blind buried via in a PCB, comprising the steps of:
acquiring a set of all guide holes in the PCB;
filtering the through holes in the set according to the drilling size of the guide hole to obtain a set of blind buried holes;
obtaining the order of each blind buried hole according to the starting level and the last level of each blind buried hole in the set of blind buried holes;
and checking each blind buried hole according to the order to obtain the blind buried holes which do not accord with the preset rule.
2. The method as claimed in claim 1, wherein each blind buried hole is checked according to the order to obtain a blind buried hole which does not conform to a preset rule, further comprising:
acquiring a preset constraint value;
judging whether the order is not greater than the constraint value;
and responding to the order greater than the constraint value, and judging that the blind buried hole corresponding to the order greater than the constraint value does not conform to a preset rule.
3. The method of claim 1, further comprising:
and acquiring the coordinates of the blind buried holes which do not accord with the preset rule, and generating a report according to the coordinates.
4. The method of claim 3, further comprising:
and establishing a link between the coordinates of each blind buried hole in the report which does not conform to the preset rule and the blind buried holes in the PCB.
5. A system for inspecting blind buried vias in a PCB, comprising:
an acquisition module configured to acquire a set of all vias in a PCB;
a filtering module configured to filter the through holes in the set according to the drill hole size of the pilot hole to obtain a set of blind buried holes;
the calculation module is configured to obtain the order of each blind buried hole according to the starting level and the last level of each blind buried hole in the set of blind buried holes;
and the checking module is configured to check each blind buried hole according to the order to obtain the blind buried holes which do not accord with a preset rule.
6. The system of claim 5, wherein the inspection module is further configured to:
acquiring a preset constraint value;
judging whether the order is not greater than the constraint value;
and responding to the order greater than the constraint value, and judging that the blind buried hole corresponding to the order greater than the constraint value does not conform to a preset rule.
7. The system of claim 5, further comprising:
the report generation module is configured to acquire the coordinates of the blind buried hole which does not conform to the preset rule, so as to generate a report according to the coordinates.
8. The system of claim 7, wherein the report generation module is further configured to:
and establishing a link between the coordinates of each blind buried hole in the report which does not conform to the preset rule and the blind buried holes in the PCB.
9. A computer device, comprising:
at least one processor; and
memory storing a computer program operable on the processor, characterized in that the processor executes the program to perform the steps of the method according to any of claims 1-4.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, is adapted to carry out the steps of the method according to any one of claims 1-4.
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| CN112631655B (en) * | 2020-12-29 | 2024-05-28 | 深圳明阳电路科技股份有限公司 | Drilling band file modification method, device and system |
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| CN108153963A (en) * | 2017-12-21 | 2018-06-12 | 郑州云海信息技术有限公司 | A kind of method that connector connection level number is checked in PCB design |
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| CN108153963A (en) * | 2017-12-21 | 2018-06-12 | 郑州云海信息技术有限公司 | A kind of method that connector connection level number is checked in PCB design |
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