CN111258684B - Control method and device - Google Patents
Control method and device Download PDFInfo
- Publication number
- CN111258684B CN111258684B CN202010073947.0A CN202010073947A CN111258684B CN 111258684 B CN111258684 B CN 111258684B CN 202010073947 A CN202010073947 A CN 202010073947A CN 111258684 B CN111258684 B CN 111258684B
- Authority
- CN
- China
- Prior art keywords
- task
- ipc
- thread
- message
- interface function
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms
- G06F9/4486—Formation of subprogram jump address
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/546—Message passing systems or structures, e.g. queues
Abstract
The invention discloses a control method, which comprises the following steps: receiving an inter-process communication IPC message sent by the called interface function; wherein the IPC message includes a message type; and calling a processing function corresponding to the message type according to the message type, and after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function. The invention also discloses a control device. The method and the device provided by the invention can simplify the development difficulty and the development workload of the PLC controller software.
Description
Technical Field
The present invention relates to the field of control, and in particular, to a control method and apparatus in the field of control.
Background
A high-security microkernel operating system kernel (microkernel for short) is developed based on a Loongson LS2K1000 dual-core processor, and the microkernel runs in the kernel space of a CPU. Based on the microkernel, PLC controller software was also developed that runs in the user space of the CPU.
The microkernel only provides five functions of thread management, inter-process communication (IPC), virtual memory space, handle space and equipment foundation unit (interrupt object), which are very limited and very original, so that the development of the PLC controller software by directly using the functions is difficult in work and heavy in workload.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a control method and a control device, which simplify the development difficulty and the development workload of the PLC controller software.
In order to solve the above technical problems, an embodiment of the present invention provides a control method, including:
receiving an inter-process communication IPC message sent by the called interface function; wherein the IPC message includes a message type;
and calling a processing function corresponding to the message type according to the message type, and after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function.
In an exemplary embodiment, the above method further has the following features:
the message type is created for the task; the called interface function is an interface function for creating a task; the IPC message also comprises the task stack size of the task and the task entry address;
the processing function corresponding to the message type is a processing function for creating a task; after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for creating the task applies for an idle task descriptor; the task descriptor comprises thread key information, a thread notification handle and a thread entry address; the thread key information comprises a thread task control block TCB handle, a thread stack pointer and an IPC memory pointer;
Applying for a task control block TCB memory from the kernel, and giving the returned handle to the thread TCB handle;
applying for the IPC memory to the kernel, and assigning the IPC memory address of the task in the returned kernel to the IPC memory pointer;
applying a stack memory to the kernel according to the size of the task stack, and giving a returned stack address to a thread stack pointer;
recording the task entry address, and assigning the task entry address to a thread entry address;
and returning the generated IPC response message containing the thread TCB handle to the interface function for creating the task.
In an exemplary embodiment, the above method further has the following features:
the message type is an activation task; the called interface function is an interface function for activating a task; the IPC message also comprises a thread TCB handle, a task stack size and a task priority;
the processing function corresponding to the message type is a processing function for activating a task; after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for activating the task obtains a task descriptor corresponding to the thread TCB handle according to the thread TCB handle analyzed from the IPC message;
Writing a thread entry address, a stack address, an IPC memory address and a task priority and a task stack size in the IPC message into corresponding registers;
if the writing is successful, an IPC response message containing the task activation success is generated and returned to the interface function for activating the task;
if the writing fails, an IPC response message containing the task activation failure is generated and returned to the interface function for activating the task.
In an exemplary embodiment, the above method further has the following features:
the message type is task sleep; the called interface function is an interface function for task sleep; the IPC message also comprises sleep time and an IPC memory address;
the processing function corresponding to the message type is a processing function for task sleep, and after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for task sleep searches corresponding task descriptors according to the IPC memory address analyzed from the IPC message; the task descriptor comprises thread sleep time and a thread notification handle;
Assigning the sleep time to the thread sleep time;
acquiring a thread notification handle of a task descriptor;
and generating an IPC response message comprising the thread notification handle, and returning the IPC response message to the interface function for task sleep.
In an exemplary embodiment, the above method further has the following features:
the IPC response message including the thread notification handle is generated and returned to the interface function for task sleep, and the IPC response message further includes:
the interface function for task sleep is used for receiving the IPC response message, acquiring the thread notification handle, waiting for the message sent by the clock interrupt thread to the thread notification handle, and blocking until receiving the message sent by the clock interrupt thread to the thread notification handle;
the clock interrupt thread periodically traverses all task descriptors; for any task descriptor, if the thread sleep time expires, sending a thread notification handle corresponding to the task descriptor corresponding to the expired thread sleep time to an interface function for task sleep;
and after receiving the message sent to the thread notification handle, the interface function for task sleep returns a message indicating the sleep end to a calling party of the interface function.
In an exemplary embodiment, the above method further has the following features:
the message type is page mapping or DMA mapping; the called interface function is an interface function for page mapping or an interface function for DMA mapping; the IPC message also comprises a memory length;
the processing function corresponding to the message type is a processing function for page mapping or a processing function for DMA mapping; after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for page mapping or the interface function for DMA mapping analyzes the memory length from the IPC message;
applying 4KB x n continuous virtual addresses to the kernel according to the page number n of the 4KB memory pages contained in the memory length, wherein n is a positive integer;
applying n physical pages to the kernel;
establishing the mapping relation between virtual addresses of n 4KB pages and n physical pages;
and generating IPC response messages comprising virtual addresses of n 4KB pages, and returning the IPC response messages to the interface function for page mapping or the interface function for DMA mapping.
In order to solve the above problems, the present invention also provides a control device including: a memory and a processor; the memory is used for storing interface functions, processing functions and programs for controlling;
The processor is configured to perform the following operations when the interface function is called: an inter-process communication IPC message is sent, and the IPC message carries a message type;
the processor is further configured to read the program for controlling, and perform the following operations:
receiving an IPC message sent by the called interface function;
invoking a processing function corresponding to the message type according to the message type carried in the IPC message;
the processor is further configured to perform the following operations when the processing function is invoked: and executing corresponding processing, and constructing an IPC response message and returning the IPC response message to the called interface function.
In an exemplary embodiment, the above device further has the following features:
the message type is created for the task, and the interface function is an interface function for creating the task; the IPC message also comprises task priority of the task, task stack size and task entry address;
the processing function corresponding to the message type is a processing function for creating a task;
the executing corresponding processing and constructing an IPC response message to return to the called interface function comprises the following steps:
the processing function for creating the task applies for an idle task descriptor; the task descriptor comprises thread key information, a thread notification handle and a thread entry address; the thread key information comprises a thread task control block TCB handle, a thread stack pointer and an IPC memory pointer;
Applying for a task control block TCB memory from the kernel, and giving the returned handle to the thread TCB handle;
applying for the IPC memory to the kernel, and assigning the IPC memory address of the task in the returned kernel to the IPC memory pointer;
applying a stack memory to the kernel according to the size of the task stack, and giving a returned stack address to a thread stack pointer;
recording the task entry address, and assigning the task entry address to a thread entry address;
and returning the generated IPC response message containing the thread TCB handle to the interface function for creating the task.
In an exemplary embodiment, the above device further has the following features:
the message type is an activation task; the interface function is an interface function for activating a task; the IPC message also comprises a thread TCB handle, a task stack size and a task priority;
the processing function corresponding to the message type is a processing function for activating a task; the processing function executes corresponding processing, and constructing the IPC response message to return to the called interface function comprises the following steps:
the processing function for activating the task obtains a task descriptor corresponding to the thread TCB handle according to the thread TCB handle analyzed from the IPC message;
Writing a thread entry address, a stack address, an IPC memory address and a task priority and a task stack size in the IPC message into corresponding registers;
if the writing is successful, an IPC response message containing the task activation success is generated and returned to the interface function for activating the task;
if the writing fails, an IPC response message containing the task activation failure is generated and returned to the interface function for activating the task.
In an exemplary embodiment, the above device further has the following features:
the message type is task sleep; the interface function is an interface function for task sleep; the IPC message also comprises sleep time and an IPC memory address;
the processing function corresponding to the message type is a processing function for task sleep;
the executing the corresponding processing and constructing the IPC response message to return to the called interface function comprises the following steps:
the processing function for task sleep searches corresponding task descriptors according to the IPC memory address analyzed from the IPC message; the task descriptor comprises thread sleep time and a thread notification handle;
assigning the sleep time to a thread sleep time;
Acquiring a thread notification handle of a task descriptor;
and generating an IPC response message comprising the thread notification handle, and returning the IPC response message to the interface function for task sleep.
In an exemplary embodiment, the above device further has the following features: the processor also performs the following operations when the interface function for task sleep is called:
after receiving the IPC response message, acquiring the thread notification handle, waiting for a message sent by a clock interrupt thread to the thread notification handle, and blocking until receiving the message sent by the clock interrupt thread to the thread notification handle;
after receiving the message sent to the thread notification handle, returning a message indicating the end of sleep to a calling party of an interface function;
the memory is also used for storing a program for performing clock interruption;
the processor is further configured to read and execute the program for clock interrupt, and perform the following operations:
traversing all task descriptors periodically; for any task descriptor, if the thread sleep time expires, sending a thread notification handle corresponding to the task descriptor corresponding to the expired thread sleep time to an interface function for task sleep;
The interface function for task sleep is further configured to receive a message sent to the thread notification handle, and return a message indicating that sleep is completed to a caller of the interface function.
In an exemplary embodiment, the above device further has the following features:
the message type is page mapping or DMA mapping; the interface function is an interface function for page mapping or an interface function for DMA mapping; the IPC message also comprises a memory length;
the processing function corresponding to the message type is a processing function for page mapping or a processing function for DMA mapping;
the executing the corresponding processing and constructing the IPC response message to return to the called interface function comprises the following steps:
the processing function for page mapping or the interface function for DMA mapping analyzes the memory length from the IPC message;
applying 4KB x n continuous virtual addresses to the kernel according to the page number n of the 4KB memory pages contained in the memory length, wherein n is a positive integer;
applying n physical pages to the kernel;
establishing the mapping relation between virtual addresses of n 4KB pages and n physical pages;
and generating an IPC response message comprising virtual addresses of n 4KB pages, and returning the IPC response message to the interface function for page mapping or the processing function for DMA mapping.
In summary, the control method and the control device provided by the embodiment of the application are realized through a group of interface function definitions and a group of interface function bottom layers based on the Loongson processor and the microkernel operating system, so that the development difficulty and the development workload of the PLC controller software are simplified.
Drawings
Fig. 1 is a block diagram of a PLC controller.
Fig. 2 is a schematic diagram of a control method according to a first embodiment of the present application.
Fig. 3 is a flowchart of a control method according to a second embodiment of the present application.
FIG. 4 is a flow chart of a management thread according to a second embodiment of the present application.
Fig. 5 is a task creation flow chart according to a second embodiment of the present application.
Fig. 6 is a sleep flow chart according to a second embodiment of the present application.
Fig. 7 is a memory mapping flow chart according to a second embodiment of the application.
Fig. 8 is a schematic diagram of a control device according to a third embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in detail hereinafter with reference to the accompanying drawings. It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be arbitrarily combined with each other.
Example 1
Fig. 2 is a schematic diagram of a control method according to a first embodiment of the present application, as shown in fig. 2, the control method of the present embodiment includes:
S11, receiving an inter-process communication IPC message sent by the called interface function.
Wherein the IPC message includes a message type.
In an exemplary embodiment, the called interface function is an interface function for creating a task; the IPC message also includes the task stack size of the task, the task entry address.
In an exemplary embodiment, the called interface function is an interface function for activating a task; the IPC message also includes a thread TCB handle, a task stack size, and a task priority.
In an exemplary embodiment, the called interface function is an interface function for task sleep; the IPC message also includes sleep time and IPC memory address.
In an exemplary embodiment, the called interface function is an interface function for page mapping or an interface function for DMA mapping; the IPC message also includes a memory length.
S12, calling a processing function corresponding to the message type according to the message type.
In an exemplary embodiment, the message type is created for a task; the processing function corresponding to the message type is a processing function for creating a task.
In an exemplary embodiment, the message type is an activation task; the processing function corresponding to the message type is a processing function for activating the task.
In an exemplary embodiment, the message type is task sleep; the processing function corresponding to the message type is a processing function for task sleep.
In an exemplary embodiment, the message type is page map or DMA map; the processing function corresponding to the message type is a processing function for page mapping or a processing function for DMA mapping.
S13, after the called processing function executes corresponding processing, an IPC response message is constructed and returned to the called interface function.
In an exemplary embodiment, the processing function for creating tasks applies for an idle task descriptor; the task descriptor comprises thread key information, a thread notification handle and a thread entry address; the thread key information comprises a thread task control block TCB handle, a thread stack pointer and an IPC memory pointer;
applying for a task control block TCB memory from the kernel, and giving the returned handle to the thread TCB handle;
applying for the IPC memory to the kernel, and assigning the IPC memory address of the task in the returned kernel to the IPC memory pointer;
Applying a stack memory to the kernel according to the size of the task stack, and giving a returned stack address to a thread stack pointer;
recording the task entry address, and assigning the task entry address to a thread entry address;
and returning the generated IPC response message containing the thread TCB handle to the interface function for creating the task.
In an exemplary embodiment, the processing function for activating a task obtains a task descriptor corresponding to a thread TCB handle according to the thread TCB handle parsed from the IPC message;
writing a thread entry address, a stack address, an IPC memory address and a task priority and a task stack size in the IPC message into corresponding registers;
if the writing is successful, an IPC response message containing the task activation success is generated and returned to the interface function for activating the task;
if the writing fails, an IPC response message containing the task activation failure is generated and returned to the interface function for activating the task.
In an exemplary embodiment, the processing function for task sleep searches for a corresponding task descriptor according to the IPC memory address parsed from the IPC message; the task descriptor comprises thread sleep time and a thread notification handle;
Assigning the sleep time to the thread sleep time;
acquiring a thread notification handle of a task descriptor;
and generating an IPC response message comprising the thread notification handle, and returning the IPC response message to the interface function for task sleep.
The IPC response message including the thread notification handle is generated and returned to the interface function for task sleep, and the IPC response message further includes:
the interface function for task sleep is used for receiving the IPC response message, acquiring the thread notification handle, waiting for the message sent by the clock interrupt thread to the thread notification handle, and blocking until receiving the message sent by the clock interrupt thread to the thread notification handle;
the clock interrupt thread periodically traverses all task descriptors; for any task descriptor, if the thread sleep time expires, sending a thread notification handle corresponding to the task descriptor corresponding to the expired thread sleep time to an interface function for task sleep;
and after receiving the message sent to the thread notification handle, the interface function for task sleep returns a message indicating the sleep end to a calling party of the interface function.
In an exemplary embodiment, the processing function for page mapping or the interface function for DMA mapping parses the memory length from the IPC message;
applying 4KB x n continuous virtual addresses to the kernel according to the page number n of the 4KB memory pages contained in the memory length, wherein n is a positive integer;
applying n physical pages to the kernel;
establishing the mapping relation between virtual addresses of n 4KB pages and n physical pages;
and generating IPC response messages comprising virtual addresses of n 4KB pages, and returning the IPC response messages to the interface function for page mapping or the interface function for DMA mapping.
Example two
Fig. 3 is a flowchart of a control method according to a third embodiment of the present invention. As shown in fig. 3, the steps are as follows:
step 301: the calling party calls the interface function, generates an IPC message, sends the IPC message to the management thread, and is blocked until an IPC response message is received.
In an exemplary embodiment, a software interface of a PLC controller based on a Loongson processor and a microkernel operating system comprises a set of interface function definitions and a set of interface function bottom layers. The set of interface functions defines a software interface corresponding to the component 22 in fig. 1 (block diagram of PLC controller architecture), and the set of interface functions is implemented at the bottom layer corresponding to the component 18 management thread and the component 16 clock interrupt thread in fig. 1.
The interface function definition to which the present invention refers is located at the component 22 software interface in fig. 1. The software interface provides parameters easy to understand for the upper layer user, and encapsulates the parameters into IPC messages to be sent to the management thread, so that the complexity of the upper layer user is simplified. The software interface is essentially a library of functions, which is not a stand-alone task, but is subordinate to any task that invokes it.
The underlying implementation of the interface functions to which the present invention is directed is located in the component 18 management thread and the component 16 clock interrupt thread in fig. 1. The management thread and the clock interrupt thread are two independent threads, created by the initial thread.
The definition of the interface function in the invention specifically refers to:
(1)int os_api_task_create(char*name,int priority,int options,intstackSize,void*entryPt,void*arg1,void*arg2,void*arg3,void*arg4,void*
arg5,void*arg6,void*arg7,void*arg8,void*arg9,void*arg10);
(2)int os_api_task_activate(int iTaskId);
(3)int os_api_task_sleep(int iMsPeriod);
(4)unsigned int os_api_page_map(unsigned int base_addr,unsigned intlen,unsigned int cacheable,unsigned int writeable);
(5)unsigned int os_api_dma_map(unsigned int len,unsigned intcacheable,unsigned int writeable,unsigned int*dma_paddr)。
the following interfaces may also be included:
(6)os_api_task_resume、os_lib_task_resume
(7)os_api_task_del、os_lib_task_del
(8)os_api_task_suspend、os_lib_task_suspend
(9)os_api_task_priority_set、os_lib_task_priority_set
(10)os_api_task_get_id、os_lib_task_get_id
(11)os_api_task_name_to_id、os_lib_task_name_to_id
(12)os_api_task_delay、os_lib_task_delay
the interface function implementation of the present invention specifically refers to the logic flow of the management thread and the clock interrupt thread, and the logic flow of os_lib_task_create, os_lib_task_active, os_lib_task_sleep, os_lib_page_map, os_lib_dma_map.
Step 302: the management thread receives and analyzes the IPC message, calls different processing functions according to the analyzed different message types, and constructs an IPC response message and sends the IPC response message to the interface function after the called processing functions execute corresponding processing.
The message types may be os_api_ TASKCREATE (=1), os_api_ TASKACTIVATE (=8), os_api_ TASKSLEEP (=11), os_api_page_map (=21), or os_api_dma_map (=22).
In an exemplary embodiment, a managed thread flow diagram is shown in FIG. 4, with the thread main logic:
(1) Blocking and waiting for the IPC message until the IPC message is received;
(2) Analyzing the IPC message;
(3) Calling different processing functions according to the analyzed different message types, including:
os_lib_task_create is called when os_api_ TASKCREATE (=1);
os_lib_task_activate is called when os_api_ TASKACTIVATE (=8);
os_lib_task_sleep is called when os_api_ TASKSLEEP (=11);
os_lib_page_map is called when os_api_page_map (=21);
os_lib_dmamap is called when os_api_dma_map (=22);
other processing functions may also be invoked.
(4) Returning to the step (1).
In an exemplary embodiment, os_api_task_create and os_lib_task_create cooperate to complete the creation of the tasks, and the cooperation process is shown in the task creation flow chart of fig. 5.
An IPC message will be generated when the caller invokes os_api_task_create. The IPC message type is os_api_ TASKCREATE (=1), and the IPC message content is: priority (task priority), jacksize (task stack size), entryPt (task entry), options (task options), arg1 (parameter 1), arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10, name (task name). After that os_api_task_create calls CallWithMRs to send the IPC message to the management thread and is blocked until a reply is received.
After receiving the IPC message, the management thread analyzes the IPC message and calls a corresponding processing function. The processing function corresponding to the os_api_ TASKCREATE (=1) is os_lib_task_create, and the specific steps of the function are as follows:
(1) Parsing all incoming parameters from IPC messages
In this step, the content of the IPC message is entered.
(2) Applying for a task descriptor
It should be noted that, the management thread creates 256 task descriptors statically at the time of initialization, and initializes all to 0. Each task descriptor includes thread critical information, a thread notification handle, a thread entry address, a thread sleep time, a thread name. The thread critical information includes thread TCB handles, thread context handles, thread stack size, thread stack pointers, thread IPC memory pointers, and the like. Applying for a task descriptor is traversing all task descriptors, and if the thread handle of a task descriptor is equal to 0, the descriptor is considered to be free and available, and the task descriptor is returned.
(3) Creating and filling in task configuration constructs
The step creates a structure body, stores the input parameters into the structure body, and facilitates parameter transmission during function call.
(4) Application TCB memory (split 1KB kernel object, at least 1 interaction with kernel)
This step applies for the TCB (task control block) to the kernel, and the detailed procedure is similar to that described in os_lib_page_map. And obtaining a handle after applying for the TCB memory, and assigning the handle to the thread TCB handle of the thread key information of the task descriptor.
(5) IPC memory application (4 KB for each application, at least 1 interaction with the kernel is needed)
This step applies for IPC memory to the kernel, and the detailed procedure is similar to that described in os_lib_page_map.
(6) Setting TCB basic parameters (requiring 1 interaction with the kernel)
The IPC memory address of the task in the kernel is set through the system call function TcbConfiguration.
(7) Setting TCB scheduling parameters (1 interaction with the Kernel is required)
This step sets the priority of the task in the kernel by the system call function TcbSetPriority.
(8) Application stack memory (4 KB each time, multiple interactions with the kernel are needed)
This step applies for stack memory with stack size to the kernel, and the detailed procedure is similar to that described in os_lib_page_map.
(9) Creating semaphores and assigning thread entry addresses
This step creates a semaphore for the task and records the task population address. The semaphore is used for realizing task sleep function in cooperation. Task sleep is actually the task waiting for the semaphore through which the middlethread wakes up the task. The newly created semaphore is assigned to the thread notification handle of the task descriptor for subsequent thread sleep. The parameter entryPt (task entry) is then assigned to the thread entry address of the task descriptor for subsequent thread activation.
(10) Constructing IPC response and sending the IPC response to the os_api_task_create
The thread TCB handle is used as a task id, an IPC message containing the task id is generated, and a Reply is called and sent to the os_api_task_create.
After os_api_task_create receives the IPC response of the management thread, the task id is fetched and returned to the caller.
os_api_task_active and os_lib_task_active cooperate to complete task activation.
An IPC message will be generated when the caller invokes os_api_task_activate. The IPC message type is os_api_ TASKACTIVATE (=8), and the IPC message content is: the iTaskId (task id), which is the thread TCB handle returned when the task was created. After that os_api_task_activate calls CallWithMRs to send the IPC message to the management thread and is blocked until a reply is received.
The processing function corresponding to os_api_ TASKACTIVATE (=8) is os_lib_task_active. The flow of the function is as follows:
(1) Task id is resolved from IPC messages
(2) Finding descriptors of tasks according to task ids
(3) And obtaining the entry address, stack address, IPC memory address, task priority, task entry and task stack size of the task according to the task descriptor and the IPC message.
(4) Setting the above key information of the task (requiring 1 interaction with the kernel)
The step is to fill the entry address, stack address, IPC memory address and task parameter of the task into the context register of the task through the system call function TcbWriteRegister.
If the writing is successful, the activation is successful; otherwise, the activation fails.
(5) Constructing IPC response and sending the IPC response to the os_api_task_active
This step generates an IPC message indicating whether activation was successful and invokes a Reply to send to the software interface.
After the os_api_task_create receives the IPC response of the management thread, the os_api_task_create returns to the caller.
os_api_task_sleep, os_lib_task_sleep, and clock interrupt thread cooperate to complete task sleep, and the cooperation process is shown in the sleep flow chart of fig. 6.
An IPC message will be generated when the caller invokes os_api_task_sleep. The IPC message type is os_api_ TASKSLEEP (=11), and the IPC message content is: iMsPeriod (sleep time) and ipcBufAddr (IPC memory address). After that os_api_task_sleep calls CallWithMRs to send the IPC message to the management thread and is blocked until a reply is received.
The processing function corresponding to os_api_ TASKSLEEP (=11) is os_lib_task_sleep. The flow of the function is as follows:
(1) Resolving iMsperiod (sleep time) and ipcBufAddr (IPC memory address) from the IPC message
(2) Finding task descriptors according to the ipcBufAddr of the task
This step traverses 256 task descriptors and returns a task descriptor if the IPC memory address of that descriptor is the same as that of the ipcBufAddr.
(3) And setting the sleep time of the task descriptor, namely giving the sleep time in the IPC message to the thread sleep time of the task descriptor.
(4) Constructing IPC response and sending the IPC response to the os_api_task_sleep
The step obtains the thread notification handle from the task descriptor, generates an IPC message containing the thread notification handle, and calls the Reply to send to the software interface. The thread notification handle contains a semaphore.
After os_api_task_sleep receives the IPC response from the management thread, the thread handle is parsed out Cheng Tongzhi, and the message sent to the semaphore by the interrupt thread (part 16 of fig. 1) is started to wait and blocked.
The interrupt thread (element 16 of fig. 1) periodically checks the sleep task queue and sends a message to the task's corresponding semaphore (i.e., corresponding thread notification handler) for an expired task to trigger re-execution of the task (i.e., trigger the task to enter a ready state, if the task has the highest priority, the task will execute immediately).
os_api_task_sleep receives the semaphore of the clock interrupt thread, indicating that the set sleep time is over, and then returns directly to the caller.
The os_api_page_map and os_lib_page_map cooperate to complete the memory application, and the cooperation process is shown in the memory mapping flow chart of fig. 7.
An IPC message will be generated when the caller invokes the os_api_page_map. The IPC message flag is os_api_page_map (=21), and the IPC message content is: base_addr (physical address), len (memory length), cacheable (whether cache or not), writeable (whether writable or not). After that, os_api_page_map calls CallWithMRs to send the IPC message to the management thread and is blocked until a reply is received.
The processing function corresponding to os_api_page_map (=21) is os_lib_page_map. The flow of the function is as follows:
(1) The parameters base_addr (physical address), len (memory length), cacheable (whether cache) and writeable (whether writeable) are analyzed from the IPC message, and the number n of 4KB pages is calculated according to len.
The memory length len is the byte number, 4KB is the size of a memory page, n is the calculated memory page number, only the whole page of the allocated memory can be allocated when the memory is allocated, and the whole page is automatically rounded up when the memory is not full.
(2) A contiguous piece of virtual address space is applied, which can hold n 4KB pages.
This step checks if the consecutive virtual addresses xxx to xxx +4k x n are not used, if not, xxx is the returned virtual address and the virtual address space is the virtual address of n consecutive 4KB pages.
(3) Applying for physical memory. Each time a physical page is applied by the microkernel, it is repeated n times. The physical addresses of the n pages may be discontinuous.
(4) And establishing a mapping relation between the virtual address and the physical page. One page at a time, n times, through the microkernel.
It should be noted that, the virtual address of 1 4KB page corresponds to 1 physical page, all that is used by the program is the virtual address, and the memory management unit MMU finds the corresponding physical address according to the above correspondence, and then directly accesses the page (physical page) corresponding to the DDR memory through the physical address.
(5) Constructing IPC response and sending the IPC response to the os_api_page_map
This step generates an IPC message containing the virtual address and invokes the Reply to send to the software interface.
The collaboration of os_api_dma_map and os_lib_dma_map completes the dma memory application, and the collaboration process is similar to the memory mapping flow chart of fig. 7.
Step 303: the interface function receives the IPC reply message and returns to the caller.
The software interface implemented by the present invention cannot be used for an initial thread (part 15 of fig. 1), a clock interrupt thread (part 16 of fig. 1), a debug thread (part 17 of fig. 1), and a management thread (part 18 of fig. 1), but can be used for other threads.
Example III
Fig. 8 is a schematic diagram of a control device according to an embodiment of the present invention, as shown in fig. 8, the control device of the present embodiment includes: a memory and a processor;
the memory is used for storing interface functions, processing functions and programs for controlling;
the processor is configured to perform the following operations when the interface function is called: an inter-process communication IPC message is sent, and the IPC message carries a message type;
the processor is further configured to read the program for controlling, and perform the following operations:
receiving an IPC message sent by the called interface function;
invoking a processing function corresponding to the message type according to the message type carried in the IPC message;
the processor is further configured to perform the following operations when the processing function is invoked: and executing corresponding processing, and constructing an IPC response message and returning the IPC response message to the called interface function.
In an exemplary embodiment, the message type is task creation, and the interface function is an interface function for creating a task; the IPC message also comprises task priority of the task, task stack size and task entry address;
the processing function corresponding to the message type is a processing function for creating a task;
the executing corresponding processing and constructing an IPC response message to return to the called interface function comprises the following steps:
the processing function for creating the task applies for an idle task descriptor; the task descriptor comprises thread key information, a thread notification handle and a thread entry address; the thread key information comprises a thread task control block TCB handle, a thread stack pointer and an IPC memory pointer;
applying for a task control block TCB memory from the kernel, and giving the returned handle to the thread TCB handle;
applying for the IPC memory to the kernel, and assigning the IPC memory address of the task in the returned kernel to the IPC memory pointer;
applying a stack memory to the kernel according to the size of the task stack, and giving a returned stack address to a thread stack pointer;
recording the task entry address, and assigning the task entry address to a thread entry address;
And returning the generated IPC response message containing the thread TCB handle to the interface function for creating the task.
In an exemplary embodiment, the message type is an activation task; the interface function is an interface function for activating a task; the IPC message also comprises a thread TCB handle, a task stack size and a task priority;
the processing function corresponding to the message type is a processing function for activating a task; the processing function executes corresponding processing, and constructing the IPC response message to return to the called interface function comprises the following steps:
the processing function for activating the task obtains a task descriptor corresponding to the thread TCB handle according to the thread TCB handle analyzed from the IPC message;
writing a thread entry address, a stack address, an IPC memory address and a task priority and a task stack size in the IPC message into corresponding registers;
if the writing is successful, an IPC response message containing the task activation success is generated and returned to the interface function for activating the task;
if the writing fails, an IPC response message containing the task activation failure is generated and returned to the interface function for activating the task.
In an exemplary embodiment, the message type is task sleep; the interface function is an interface function for task sleep; the IPC message also comprises sleep time and an IPC memory address;
the processing function corresponding to the message type is a processing function for task sleep;
the executing the corresponding processing and constructing the IPC response message to return to the called interface function comprises the following steps:
the processing function for task sleep searches corresponding task descriptors according to the IPC memory address analyzed from the IPC message; the task descriptor comprises thread sleep time and a thread notification handle;
assigning the sleep time to a thread sleep time;
acquiring a thread notification handle of a task descriptor;
and generating an IPC response message comprising the thread notification handle, and returning the IPC response message to the interface function for task sleep.
In an exemplary embodiment, the processor further performs the following operations when the interface function for task sleep is invoked:
after receiving the IPC response message, acquiring the thread notification handle, waiting for a message sent by a clock interrupt thread to the thread notification handle, and blocking until receiving the message sent by the clock interrupt thread to the thread notification handle;
After receiving the message sent to the thread notification handle, returning a message indicating the end of sleep to a calling party of an interface function;
the memory is also used for storing a program for performing clock interruption;
the processor is further configured to read and execute the program for clock interrupt, and perform the following operations:
traversing all task descriptors periodically; for any task descriptor, if the thread sleep time expires, sending a thread notification handle corresponding to the task descriptor corresponding to the expired thread sleep time to an interface function for task sleep;
the interface function for task sleep is further configured to receive a message sent to the thread notification handle, and return a message indicating that sleep is completed to a caller of the interface function.
In an exemplary embodiment, the message type is page map or DMA map; the interface function is an interface function for page mapping or an interface function for DMA mapping; the IPC message also comprises a memory length;
the processing function corresponding to the message type is a processing function for page mapping or a processing function for DMA mapping;
the executing the corresponding processing and constructing the IPC response message to return to the called interface function comprises the following steps:
The processing function for page mapping or the interface function for DMA mapping analyzes the memory length from the IPC message;
applying 4KB x n continuous virtual addresses to the kernel according to the page number n of the 4KB memory pages contained in the memory length, wherein n is a positive integer;
applying n physical pages to the kernel;
establishing the mapping relation between virtual addresses of n 4KB pages and n physical pages;
and generating an IPC response message comprising virtual addresses of n 4KB pages, and returning the IPC response message to the interface function for page mapping or the processing function for DMA mapping.
Those of ordinary skill in the art will appreciate that all or a portion of the steps of the methods described above may be implemented by a program that instructs associated hardware, and the program may be stored on a computer readable storage medium such as a read-only memory, a magnetic or optical disk, etc. Alternatively, all or part of the steps of the above embodiments may be implemented using one or more integrated circuits. Accordingly, each module/unit in the above embodiment may be implemented in the form of hardware, or may be implemented in the form of a software functional module. The present invention is not limited to any specific form of combination of hardware and software.
The foregoing is merely a preferred embodiment of the present invention, and of course, various other embodiments of the invention may be made by those skilled in the art without departing from the spirit and scope of the invention, and it is intended that all such modifications and variations be considered as falling within the scope of the appended claims.
Claims (12)
1. A control method, characterized by comprising:
receiving an inter-process communication IPC message sent by the called interface function; wherein the IPC message includes a message type;
calling a processing function corresponding to the message type according to the message type, and after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function;
wherein the message type is task creation; the called interface function is an interface function for creating a task; the processing function corresponding to the message type is a processing function for creating a task;
the message type is an activation task; the called interface function is an interface function for activating a task; the processing function corresponding to the message type is a processing function for activating a task;
The message type is task sleep; the called interface function is an interface function for task sleep; the processing function corresponding to the message type is a processing function for task sleep;
the message type is page mapping or DMA mapping; the called interface function is an interface function for page mapping or an interface function for DMA mapping; the processing function corresponding to the message type is a processing function for page mapping or a processing function for DMA mapping;
the interface function refers to an interface function of a software interface of a PLC controller based on a Loongson processor and a microkernel operating system.
2. The method as claimed in claim 1, comprising:
the IPC message also comprises the task stack size of the task and the task entry address;
after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for creating the task applies for an idle task descriptor; the task descriptor comprises thread key information, a thread notification handle and a thread entry address; the thread key information comprises a thread task control block TCB handle, a thread stack pointer and an IPC memory pointer;
Applying for a task control block TCB memory from the kernel, and giving the returned handle to the thread TCB handle;
applying for the IPC memory to the kernel, and assigning the IPC memory address of the task in the returned kernel to the IPC memory pointer;
applying a stack memory to the kernel according to the size of the task stack, and giving a returned stack address to a thread stack pointer;
recording the task entry address, and assigning the task entry address to a thread entry address;
and returning the generated IPC response message containing the thread TCB handle to the interface function for creating the task.
3. The method as claimed in claim 1, comprising:
the IPC message also comprises a thread TCB handle, a task stack size and a task priority;
after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for activating the task obtains a task descriptor corresponding to the thread TCB handle according to the thread TCB handle analyzed from the IPC message;
writing a thread entry address, a stack address, an IPC memory address and a task priority and a task stack size in the IPC message into corresponding registers;
If the writing is successful, an IPC response message containing the task activation success is generated and returned to the interface function for activating the task;
if the writing fails, an IPC response message containing the task activation failure is generated and returned to the interface function for activating the task.
4. The method as claimed in claim 1, comprising:
the IPC message also comprises sleep time and an IPC memory address;
after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for task sleep searches corresponding task descriptors according to the IPC memory address analyzed from the IPC message; the task descriptor comprises thread sleep time and a thread notification handle;
assigning the sleep time to the thread sleep time;
acquiring a thread notification handle of a task descriptor;
and generating an IPC response message comprising the thread notification handle, and returning the IPC response message to the interface function for task sleep.
5. The method of claim 4, wherein generating an IPC reply message including the thread notification handle, returning to the interface function for task sleep further comprises:
The interface function for task sleep is used for receiving the IPC response message, acquiring the thread notification handle, waiting for the message sent by the clock interrupt thread to the thread notification handle, and blocking until receiving the message sent by the clock interrupt thread to the thread notification handle;
the clock interrupt thread periodically traverses all task descriptors; for any task descriptor, if the thread sleep time expires, sending a thread notification handle corresponding to the task descriptor corresponding to the expired thread sleep time to an interface function for task sleep;
and after receiving the message sent to the thread notification handle, the interface function for task sleep returns a message indicating the sleep end to a calling party of the interface function.
6. The method as claimed in claim 1, comprising:
the IPC message also comprises a memory length;
after the called processing function executes corresponding processing, constructing an IPC response message and returning the IPC response message to the called interface function comprises the following steps:
the processing function for page mapping or the interface function for DMA mapping analyzes the memory length from the IPC message;
Applying 4KB x n continuous virtual addresses to the kernel according to the page number n of the 4KB memory pages contained in the memory length, wherein n is a positive integer;
applying n physical pages to the kernel;
establishing the mapping relation between virtual addresses of n 4KB pages and n physical pages;
and generating IPC response messages comprising virtual addresses of n 4KB pages, and returning the IPC response messages to the interface function for page mapping or the interface function for DMA mapping.
7. A control apparatus comprising: a memory and a processor; the method is characterized in that:
the memory is used for storing interface functions, processing functions and programs for controlling;
the processor is configured to perform the following operations when the interface function is called: an inter-process communication IPC message is sent, and the IPC message carries a message type;
the processor is further configured to read the program for controlling, and perform the following operations:
receiving an IPC message sent by the called interface function;
invoking a processing function corresponding to the message type according to the message type carried in the IPC message;
the processor is further configured to perform the following operations when the processing function is invoked: executing corresponding processing, and constructing an IPC response message and returning the IPC response message to the called interface function;
Wherein the message type is task creation; the called interface function is an interface function for creating a task; the processing function corresponding to the message type is a processing function for creating a task;
the message type is an activation task; the called interface function is an interface function for activating a task; the processing function corresponding to the message type is a processing function for activating a task;
the message type is task sleep; the called interface function is an interface function for task sleep; the processing function corresponding to the message type is a processing function for task sleep;
the message type is page mapping or DMA mapping; the called interface function is an interface function for page mapping or an interface function for DMA mapping; the processing function corresponding to the message type is a processing function for page mapping or a processing function for DMA mapping;
the interface function refers to an interface function of a software interface of a PLC controller based on a Loongson processor and a microkernel operating system.
8. The apparatus of claim 7, wherein:
the IPC message also comprises task priority of the task, task stack size and task entry address;
The executing corresponding processing and constructing an IPC response message to return to the called interface function comprises the following steps:
the processing function for creating the task applies for an idle task descriptor; the task descriptor comprises thread key information, a thread notification handle and a thread entry address; the thread key information comprises a thread task control block TCB handle, a thread stack pointer and an IPC memory pointer;
applying for a task control block TCB memory from the kernel, and giving the returned handle to the thread TCB handle;
applying for the IPC memory to the kernel, and assigning the IPC memory address of the task in the returned kernel to the IPC memory pointer;
applying a stack memory to the kernel according to the size of the task stack, and giving a returned stack address to a thread stack pointer;
recording the task entry address, and assigning the task entry address to a thread entry address;
and returning the generated IPC response message containing the thread TCB handle to the interface function for creating the task.
9. The apparatus as claimed in claim 7, comprising:
the IPC message also comprises a thread TCB handle, a task stack size and a task priority;
the processing function executes corresponding processing, and constructing the IPC response message to return to the called interface function comprises the following steps:
The processing function for activating the task obtains a task descriptor corresponding to the thread TCB handle according to the thread TCB handle analyzed from the IPC message;
writing a thread entry address, a stack address, an IPC memory address and a task priority and a task stack size in the IPC message into corresponding registers;
if the writing is successful, an IPC response message containing the task activation success is generated and returned to the interface function for activating the task;
if the writing fails, an IPC response message containing the task activation failure is generated and returned to the interface function for activating the task.
10. The apparatus as claimed in claim 7, comprising:
the IPC message also comprises sleep time and an IPC memory address;
the executing the corresponding processing and constructing the IPC response message to return to the called interface function comprises the following steps:
the processing function for task sleep searches corresponding task descriptors according to the IPC memory address analyzed from the IPC message; the task descriptor comprises thread sleep time and a thread notification handle;
assigning the sleep time to a thread sleep time;
acquiring a thread notification handle of a task descriptor;
And generating an IPC response message comprising the thread notification handle, and returning the IPC response message to the interface function for task sleep.
11. The apparatus of claim 10, wherein the processor when the interface function for task sleep is invoked further performs the following:
after receiving the IPC response message, acquiring the thread notification handle, waiting for a message sent by a clock interrupt thread to the thread notification handle, and blocking until receiving the message sent by the clock interrupt thread to the thread notification handle;
after receiving the message sent to the thread notification handle, returning a message indicating the end of sleep to a calling party of an interface function;
the memory is also used for storing a program for performing clock interruption;
the processor is further configured to read and execute the program for clock interrupt, and perform the following operations:
traversing all task descriptors periodically; for any task descriptor, if the thread sleep time expires, sending a thread notification handle corresponding to the task descriptor corresponding to the expired thread sleep time to an interface function for task sleep;
the interface function for task sleep is further configured to receive a message sent to the thread notification handle, and return a message indicating that sleep is completed to a caller of the interface function.
12. The apparatus as claimed in claim 7, comprising:
the IPC message also comprises a memory length;
the executing the corresponding processing and constructing the IPC response message to return to the called interface function comprises the following steps:
the processing function for page mapping or the interface function for DMA mapping analyzes the memory length from the IPC message;
applying 4KB x n continuous virtual addresses to the kernel according to the page number n of the 4KB memory pages contained in the memory length, wherein n is a positive integer;
applying n physical pages to the kernel;
establishing the mapping relation between virtual addresses of n 4KB pages and n physical pages;
and generating an IPC response message comprising virtual addresses of n 4KB pages, and returning the IPC response message to the interface function for page mapping or the processing function for DMA mapping.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010073947.0A CN111258684B (en) | 2020-01-22 | 2020-01-22 | Control method and device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010073947.0A CN111258684B (en) | 2020-01-22 | 2020-01-22 | Control method and device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN111258684A CN111258684A (en) | 2020-06-09 |
CN111258684B true CN111258684B (en) | 2023-09-29 |
Family
ID=70952689
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010073947.0A Active CN111258684B (en) | 2020-01-22 | 2020-01-22 | Control method and device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111258684B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112612581B (en) * | 2020-12-02 | 2024-02-13 | 北京和利时系统工程有限公司 | Thread active exit method and device |
CN112612582A (en) * | 2020-12-14 | 2021-04-06 | 北京和利时系统工程有限公司 | Semaphore function implementation method and semaphore function implementation device |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02156336A (en) * | 1988-12-08 | 1990-06-15 | Nec Corp | Clock processing system |
US5771383A (en) * | 1994-12-27 | 1998-06-23 | International Business Machines Corp. | Shared memory support method and apparatus for a microkernel data processing system |
CN106293970A (en) * | 2016-08-09 | 2017-01-04 | 浪潮(北京)电子信息产业有限公司 | Asynchronous processing method and system between a kind of process based on IPC |
CN106815086A (en) * | 2017-01-13 | 2017-06-09 | 邦彦技术股份有限公司 | Communication control framework based on Loongson platform |
CN108958904A (en) * | 2017-05-25 | 2018-12-07 | 北京忆恒创源科技有限公司 | The driver frame of the lightweight operating system of embedded multi-core central processing unit |
CN109582379A (en) * | 2018-12-05 | 2019-04-05 | 北京和利时系统工程有限公司 | Programmable logic controller system, control method based on Mach |
CN109756490A (en) * | 2018-12-26 | 2019-05-14 | 新华三技术有限公司 | A kind of MDC implementation method and device |
-
2020
- 2020-01-22 CN CN202010073947.0A patent/CN111258684B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02156336A (en) * | 1988-12-08 | 1990-06-15 | Nec Corp | Clock processing system |
US5771383A (en) * | 1994-12-27 | 1998-06-23 | International Business Machines Corp. | Shared memory support method and apparatus for a microkernel data processing system |
CN106293970A (en) * | 2016-08-09 | 2017-01-04 | 浪潮(北京)电子信息产业有限公司 | Asynchronous processing method and system between a kind of process based on IPC |
CN106815086A (en) * | 2017-01-13 | 2017-06-09 | 邦彦技术股份有限公司 | Communication control framework based on Loongson platform |
CN108958904A (en) * | 2017-05-25 | 2018-12-07 | 北京忆恒创源科技有限公司 | The driver frame of the lightweight operating system of embedded multi-core central processing unit |
CN109582379A (en) * | 2018-12-05 | 2019-04-05 | 北京和利时系统工程有限公司 | Programmable logic controller system, control method based on Mach |
CN109756490A (en) * | 2018-12-26 | 2019-05-14 | 新华三技术有限公司 | A kind of MDC implementation method and device |
Non-Patent Citations (1)
Title |
---|
杨永杰 许鹏.嵌入式系统原理及应用.北京理工大学出版社,2018,(第2018年8月第一版),75. * |
Also Published As
Publication number | Publication date |
---|---|
CN111258684A (en) | 2020-06-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10353725B2 (en) | Request processing techniques | |
US20190332368A1 (en) | Per request computer system instances | |
US10509665B2 (en) | Fast-booting application image | |
US10187479B2 (en) | Cloud-scale heterogeneous datacenter management infrastructure | |
CN111258684B (en) | Control method and device | |
US11321090B2 (en) | Serializing and/or deserializing programs with serializable state | |
CN110865868B (en) | Low-delay control method, device and equipment thereof | |
WO2019085811A1 (en) | System and method for implementing driving | |
CN113703862A (en) | Configuration-based interface calling method, device, equipment and storage medium | |
CN113867979A (en) | Data communication method, device, equipment and medium for heterogeneous multi-core processor | |
US20060256797A1 (en) | Cancellation mechanism for cooperative systems | |
US20200371827A1 (en) | Method, Apparatus, Device and Medium for Processing Data | |
Bertolotti et al. | Modular design of an open-source, networked embedded system | |
US11249760B2 (en) | Parameter management between programs | |
CN114610381A (en) | Method, device, equipment and storage medium for calling method service | |
CN114327404A (en) | File processing method and device, electronic equipment and computer readable medium | |
Qu et al. | Design of Mini Multi-Process Micro-Kernel Embedded OS on ARM | |
CN113032468A (en) | Data writing method, device and computer readable storage medium | |
CN113760767B (en) | Debugging method and device of operating system, electronic equipment and computer readable storage medium | |
Aigner | Communication in Microkernel-Based Operating Systems | |
Nasirifar | Black box migration of data structures over RDMA | |
CN115357192A (en) | Microkernel architecture-oriented virtual file construction method and system | |
CN113721852A (en) | Framework for shielding interface difference and method and system thereof | |
CN114491374A (en) | Method and system for loading and using Python script from database | |
CN116644081A (en) | Data operation method, device, electronic equipment and storage medium |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20211129 Address after: Room 1613, 6 / F, building 1, yard 2, Desheng Middle Road, Beijing Economic and Technological Development Zone, Daxing District, Beijing 100176 Applicant after: Beijing Helishi Control Technology Co.,Ltd. Address before: 100176 No.2, Disheng Middle Road, Yizhuang Economic and Technological Development Zone, Daxing District, Beijing Applicant before: BEIJING HOLLYSYS Co.,Ltd. |
|
GR01 | Patent grant | ||
GR01 | Patent grant |