CN111257691A - Single-phase high-resistance earth fault detection method and device for distribution network line - Google Patents
Single-phase high-resistance earth fault detection method and device for distribution network line Download PDFInfo
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Abstract
The invention provides a method and a device for detecting a single-phase high-resistance earth fault of a distribution network line, wherein the fault detection method comprises the following steps of; s101: respectively acquiring a zero-sequence voltage signal and a zero-sequence current signal according to the three-phase voltage signal and the three-phase current signal; s102: performing wavelet transformation on the zero-sequence voltage signal and the zero-sequence current signal, and respectively obtaining the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage signal and zero-sequence current signal in a first preset time period at a first preset frequency; s103: acquiring and recording the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal, and processing the pre-warning sign according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal; s104: judging whether the pre-warning mark meets a preset condition, if so, executing S105, and if not, executing S101; s105: and outputting alarm information of the occurrence of the ground fault. The invention improves the accuracy of ground fault detection, provides help for rapidly eliminating ground faults and ensures the safe operation of the system.
Description
Technical Field
The invention relates to the field of power system fault detection, in particular to a method and a device for detecting a single-phase high-resistance earth fault of a distribution network line.
Background
At present, most of power distribution networks in China adopt a neutral ungrounded system or an arc suppression coil grounding system, which is also called a low-current grounding system, and in the low-current grounding system, the probability of single-phase grounding faults is high and accounts for more than 80% of the total number of faults. For single-phase earth faults, because the power distribution network line in China adopts a low-current earth operation mode, and the operation condition state of the power distribution network system is complex and changeable, when the single-phase earth fault occurs in the system, the fault needs to be judged according to the information of a plurality of collectors, and the plurality of collectors are difficult to keep consistent signals due to the sequence of signal transmission, often have judgment errors, and are difficult to quickly and accurately detect the earth fault. If the single-phase earth fault cannot be detected and removed quickly, the single-phase earth fault is easily changed into a multipoint earth short circuit, overvoltage of the system can be caused, equipment can be damaged, and the safe operation of the system can be damaged.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a method and a device for detecting a single-phase high-resistance earth fault of a distribution network line, which can detect whether the earth fault occurs or not according to the ratio of a zero-sequence voltage signal to a zero-sequence current signal, do not need to use a plurality of collectors to collect multipoint electrical information of a power transmission line, are not easy to judge the fault, improve the accuracy of the earth fault detection, provide help for quickly eliminating the earth fault and ensure the safe operation of a system.
In order to solve the above problems, the present invention adopts a technical solution as follows: a single-phase high-resistance earth fault detection method for a distribution network line comprises the following steps of; s101: acquiring three-phase voltage signals and three-phase current signals of a power transmission line, and respectively acquiring zero-sequence voltage signals and zero-sequence current signals according to the three-phase voltage signals and the three-phase current signals; s102: performing wavelet transformation on the zero-sequence voltage signal and the zero-sequence current signal, and respectively obtaining the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage signal and the wavelet-transformed zero-sequence current signal in a first preset time period at a first preset frequency; s103: acquiring and recording the ratio of the maximum value to the minimum value of the zero-sequence voltage signal and the ratio of the maximum value to the minimum value of the zero-sequence current signal, and processing a pre-warning sign according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal; s104: judging whether the pre-warning mark meets a preset condition, if so, executing S105, and if not, executing S101; s105: and outputting alarm information of the occurrence of the ground fault.
Further, the step of acquiring three-phase voltage signals and three-phase current signals of the power transmission line specifically includes: the three-phase voltage and the three-phase current of the power transmission line are respectively induced through a voltage transformer and a current transformer, and signals transmitted by the voltage transformer and the current transformer are respectively converted into a three-phase voltage signal and a three-phase current signal through an analog-to-digital conversion chip.
Further, the step of respectively obtaining a zero-sequence voltage signal and a zero-sequence current signal according to the three-phase voltage signal and the three-phase current signal specifically includes:
and receiving the three-phase voltage signals and the three-phase current signals through the FPGA, and synthesizing the three-phase voltage signals and the three-phase current signals into zero-sequence voltage signals and zero-sequence current signals.
Further, the step of processing the pre-warning flag according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal specifically includes: detecting whether the ratio of the zero sequence voltage signals is greater than a preset value or not through an MCU (microprogrammed control Unit), if so, setting a warning sign 1; and detecting whether the ratio of the zero sequence current signals is greater than a preset value or not through the MCU, and if so, setting a warning sign 2.
Further, the step of determining whether the warning flag satisfies a preset condition specifically includes: and synchronously judging whether the pre-warning mark 1 and the pre-warning mark 2 are both set through the MCU, if so, determining that the pre-warning mark meets the preset condition.
Based on the same inventive concept, the invention also provides a distribution network line single-phase high-resistance ground fault detection device, which comprises a voltage transformer, an analog-to-digital conversion chip, a current transformer, an FPGA and an MCU, and is used for realizing the distribution network line single-phase high-resistance ground fault detection method as follows: s201: acquiring three-phase voltage signals and three-phase current signals of a power transmission line, and respectively acquiring zero-sequence voltage signals and zero-sequence current signals according to the three-phase voltage signals and the three-phase current signals; s202: performing wavelet transformation on the zero-sequence voltage signal and the zero-sequence current signal, and respectively obtaining the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage signal and the wavelet-transformed zero-sequence current signal in a first preset time period at a first preset frequency; s203: acquiring and recording the ratio of the maximum value to the minimum value of the zero-sequence voltage signal and the ratio of the maximum value to the minimum value of the zero-sequence current signal, and processing a pre-warning sign according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal; s204: judging whether the pre-warning mark meets a preset condition, if so, executing S205, and if not, executing S201; s205: and outputting alarm information of the occurrence of the ground fault.
Further, the step of acquiring three-phase voltage signals and three-phase current signals of the power transmission line specifically includes: the three-phase voltage and the three-phase current of the power transmission line are respectively induced through a voltage transformer and a current transformer, and signals transmitted by the voltage transformer and the current transformer are respectively converted into a three-phase voltage signal and a three-phase current signal through an analog-to-digital conversion chip.
Further, the step of respectively obtaining a zero-sequence voltage signal and a zero-sequence current signal according to the three-phase voltage signal and the three-phase current signal specifically includes: and receiving the three-phase voltage signals and the three-phase current signals through the FPGA, and synthesizing the three-phase voltage signals and the three-phase current signals into zero-sequence voltage signals and zero-sequence current signals.
Further, the step of processing the pre-warning flag according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal specifically includes: detecting whether the ratio of the zero sequence voltage signals is greater than a preset value or not through an MCU (microprogrammed control Unit), if so, setting a warning sign 1; and detecting whether the ratio of the zero sequence current signals is greater than a preset value or not through the MCU, and if so, setting a warning sign 2.
Further, the step of determining whether the warning flag satisfies a preset condition specifically includes: and synchronously judging whether the pre-warning mark 1 and the pre-warning mark 2 are both set through the MCU, if so, determining that the pre-warning mark meets the preset condition.
Compared with the prior art, the invention has the beneficial effects that: whether ground fault happens or not can be detected according to the ratio of the zero sequence voltage signal to the zero sequence current signal, multiple collectors are not needed to collect multipoint electrical information of the power transmission line, errors are not easy to judge, ground fault detection accuracy is improved, help is provided for quick elimination of ground fault, and safe operation of the system is guaranteed.
Drawings
Fig. 1 is a flowchart of an embodiment of a method for detecting a single-phase high-resistance ground fault of a distribution network line according to the present invention;
fig. 2 is a flowchart of fault detection in the method for detecting a single-phase high-resistance ground fault of a distribution network line according to another embodiment of the present invention;
fig. 3 is a structural diagram of an embodiment of the distribution network line single-phase high-resistance ground fault detection device of the present invention;
fig. 4 is a flowchart of an embodiment of a distribution network line single-phase high-resistance ground fault detection method implemented by the distribution network line single-phase high-resistance ground fault detection device of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and the detailed description, and it should be noted that any combination of the embodiments or technical features described below can be used to form a new embodiment without conflict.
Referring to fig. 1-2, fig. 1 is a flow chart of an embodiment of a method for detecting a single-phase high-resistance ground fault of a distribution network line according to the present invention; fig. 2 is a flowchart of fault detection in the distribution network line single-phase high-resistance ground fault detection method according to another embodiment of the present invention. The method for detecting the single-phase high-resistance grounding fault of the distribution network line is described in detail with reference to the attached drawings 1-2.
In this embodiment, the method for detecting the single-phase high-resistance ground fault of the distribution network line includes:
s101: the method comprises the steps of collecting three-phase voltage signals and three-phase current signals of a power transmission line, and respectively obtaining zero-sequence voltage signals and zero-sequence current signals according to the three-phase voltage signals and the three-phase current signals.
In this embodiment, the step of acquiring the three-phase voltage signal and the three-phase current signal of the power transmission line specifically includes: the voltage transformer and the current transformer are used for respectively inducing three-phase voltage and three-phase current at the same position of the power transmission line, and signals transmitted by the voltage transformer and the current transformer are respectively converted into three-phase voltage signals and three-phase current signals by the aid of the analog-to-digital conversion chip.
In one specific embodiment, the analog-to-digital conversion chip is a 16-bit analog-to-digital conversion chip.
In this embodiment, the step of respectively obtaining the zero-sequence voltage signal and the zero-sequence current signal according to the three-phase voltage signal and the three-phase current signal specifically includes: and receiving the three-phase voltage signals and the three-phase current signals through the FPGA, and synthesizing the three-phase voltage signals and the three-phase current signals into zero-sequence voltage signals and zero-sequence current signals.
S102: and performing wavelet transformation on the zero-sequence voltage signal and the zero-sequence current signal, and respectively acquiring the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage signal and zero-sequence current signal in a first preset time period at a first preset frequency.
In this embodiment, the synthesized zero-sequence voltage signal and zero-sequence current signal are subjected to DB10 wavelet transform by the FPGA to obtain a zero-sequence voltage digital waveform sequence and a zero-sequence current digital waveform sequence after wavelet transform, and the FPGA obtains a maximum value and a minimum value of the zero-sequence voltage digital waveform sequence and the zero-sequence current digital waveform sequence within a first preset time period at a first preset frequency.
In this embodiment, the first preset frequency is 10 ms/time, and the first preset time period is 10ms when the current time point is the cut-off point. In other embodiments, the first preset frequency and the first preset time period may also be other values, and only the FPGA needs to be able to detect and process the zero-sequence voltage signal and the zero-sequence current signal in each time period of the power transmission line, and obtain the maximum value and the minimum value in each time period, which is not limited herein.
In this embodiment, the maximum value and the minimum value of the zero-sequence voltage signal and the maximum value and the minimum value of the zero-sequence current signal are both a module maximum value and a module minimum value of the zero-sequence voltage signal and the zero-sequence current signal within a first preset time period.
S103: and acquiring and recording the ratio of the maximum value to the minimum value of the zero-sequence voltage signal and the ratio of the maximum value to the minimum value of the zero-sequence current signal, and processing the pre-warning sign according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal.
In this embodiment, the step of processing the pre-warning flag according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal specifically includes: detecting whether the ratio of the zero sequence voltage signals is greater than a preset value or not through the MCU, if so, setting a pre-warning sign 1; and detecting whether the ratio of the zero sequence current signals is greater than a preset value or not through the MCU, and if so, setting the warning sign 2.
In this embodiment, the MCU is connected to the FPGA, and the FPGA is connected to the voltage transformer and the current transformer through the analog-to-digital conversion chip.
In this embodiment, the FPGA sends the maximum value and the minimum value of the obtained zero-sequence voltage signal and the maximum value and the minimum value of the zero-sequence current signal to the MCU at a first preset frequency. And the MCU acquires and records the ratio of the maximum value to the minimum value, detects whether the ratio of the zero-sequence voltage signal is greater than a preset value and the ratio of the zero-sequence current signal is greater than the preset value in a second preset time period by using a second preset frequency, and processes the warning flag bit according to the judgment result.
In this embodiment, the ratio is 1.5, and in other embodiments, the ratio may be set according to an actual condition of the power transmission line, which is not limited herein.
In this embodiment, the first preset frequency is the same as the second preset frequency, and the first preset time period is the same as the second preset time period.
In the present embodiment, the warning flag includes warning flag 1 and warning flag 2. In other embodiments, the MCU may also record the detection result by setting only one warning flag and setting when the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal are both greater than a preset value.
S104: and judging whether the pre-warning mark meets a preset condition, if so, executing S105, and if not, executing S101.
In this embodiment, the step of determining whether the warning flag satisfies the preset condition specifically includes: and synchronously judging whether the warning sign 1 and the warning sign 2 are both set through the MCU, and if so, determining that the warning sign meets the preset condition.
S105: and outputting alarm information of the occurrence of the ground fault.
In this embodiment, after determining whether the warning flag 1 and the warning flag 2 are both set, the MCU sends the warning information of the occurrence of the ground fault to the control background or the intelligent terminal of the distribution network manager.
In this embodiment, the warning information may be a short message, an email, a message sent through instant messaging software, or other manners that enable a manager to quickly obtain the warning information.
In other embodiments, the MCU may also transmit the position information of the voltage transformer and the current transformer while transmitting the alarm information, so that the manager can quickly determine the position of the ground fault.
The fault detection method is further explained by a specific technical implementation mode of the distribution network line single-phase high-resistance ground fault detection method.
Three-phase voltage on a line is sensed in real time through three voltage transformers, and the three-phase voltage is input to a 16-bit analog-to-digital conversion chip and converted into a digital waveform sequence of the three-phase voltage.
And automatically synthesizing the digital waveform sequence of the three-phase voltage to obtain the digital waveform sequence of the zero-sequence voltage.
And inputting the digital waveform sequence of the zero sequence voltage into the FPGA, and performing DB10 wavelet transformation on the array waveform sequence by the FPGA to obtain the wavelet-transformed zero sequence voltage digital waveform sequence.
And the FPGA takes the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage digital waveform sequence every 10 mS.
And the FPGA transmits the maximum value and the minimum value to the MCU every 10mS, and the MCU takes and records the ratio of the maximum value to the minimum value.
The MCU checks whether the ratio of the maximum value to the minimum value of the zero sequence voltage exceeds a threshold every 10mS, and once the ratio exceeds the threshold, a pre-warning flag bit 1 is set.
Three-phase current on a line is induced in real time through three current transformers, and the three-phase current is input to a 16-bit analog-to-digital conversion chip and converted into a digital waveform sequence of the three-phase current.
And automatically synthesizing the digital waveform sequence of the three-phase current to obtain the digital waveform sequence of the zero-sequence current.
And inputting the digital waveform sequence of the zero-sequence current into the FPGA, and performing DB10 wavelet transformation on the array waveform sequence by the FPGA to obtain the wavelet-transformed zero-sequence current digital waveform sequence.
And the FPGA takes the maximum value and the minimum value of the wavelet-transformed zero-sequence current digital waveform sequence every 10 mS.
And the FPGA transmits the maximum value and the minimum value to the MCU every 10mS, and the MCU takes and records the ratio of the maximum value to the minimum value.
And the MCU checks whether the maximum value and the minimum value of the zero sequence current exceed preset values every 10mS, and once the maximum value and the minimum value exceed the preset values, a pre-warning flag bit 2 is set.
The MCU synchronously checks the warning mark 1 and the warning mark 2, and if the warning marks are simultaneously effective, the ground fault occurs to the upper warning.
Has the advantages that: the method for detecting the single-phase high-resistance ground fault of the distribution network line can detect whether the ground fault occurs according to the ratio of the zero-sequence voltage signal to the zero-sequence current signal, does not need to use a plurality of collectors to collect multipoint electrical information of the power transmission line, is not easy to judge errors, improves the accuracy of ground fault detection, provides help for quick elimination of the ground fault, and ensures the safe operation of the system.
Based on the same inventive concept, the invention further provides a distribution network line single-phase high-resistance ground fault detection device, please refer to fig. 3 and 4, fig. 3 is a structural diagram of an embodiment of the distribution network line single-phase high-resistance ground fault detection device of the invention; fig. 4 is a flowchart of an embodiment of a method for detecting a single-phase high-resistance ground fault of a distribution network line, which is implemented by the device for detecting a single-phase high-resistance ground fault of a distribution network line according to the present invention, and the device for detecting a single-phase high-resistance ground fault of a distribution network line according to the present invention is specifically described with reference to fig. 3 and 4.
In this embodiment, the distribution network line single-phase high-resistance ground fault detection device includes a voltage transformer, an analog-to-digital conversion chip, a current transformer, an FPGA, and an MCU, and is configured to implement the following distribution network line single-phase high-resistance ground fault detection method:
s201: the method comprises the steps of collecting three-phase voltage signals and three-phase current signals of a power transmission line, and respectively obtaining zero-sequence voltage signals and zero-sequence current signals according to the three-phase voltage signals and the three-phase current signals.
In this embodiment, the step of acquiring the three-phase voltage signal and the three-phase current signal of the power transmission line specifically includes: the voltage transformer and the current transformer are used for respectively inducing three-phase voltage and three-phase current at the same position of the power transmission line, and signals transmitted by the voltage transformer and the current transformer are respectively converted into three-phase voltage signals and three-phase current signals by the aid of the analog-to-digital conversion chip.
In one specific embodiment, the analog-to-digital conversion chip is a 16-bit analog-to-digital conversion chip.
In this embodiment, the step of respectively obtaining the zero-sequence voltage signal and the zero-sequence current signal according to the three-phase voltage signal and the three-phase current signal specifically includes: and receiving the three-phase voltage signals and the three-phase current signals through the FPGA, and synthesizing the three-phase voltage signals and the three-phase current signals into zero-sequence voltage signals and zero-sequence current signals.
S202: and performing wavelet transformation on the zero-sequence voltage signal and the zero-sequence current signal, and respectively acquiring the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage signal and zero-sequence current signal in a first preset time period at a first preset frequency.
In this embodiment, the synthesized zero-sequence voltage signal and zero-sequence current signal are subjected to DB10 wavelet transform by the FPGA to obtain a zero-sequence voltage digital waveform sequence and a zero-sequence current digital waveform sequence after wavelet transform, and the FPGA obtains a maximum value and a minimum value of the zero-sequence voltage digital waveform sequence and the zero-sequence current digital waveform sequence within a first preset time period at a first preset frequency.
In this embodiment, the first preset frequency is 10 ms/time, and the first preset time period is 10ms when the current time point is the cut-off point. In other embodiments, the first preset frequency and the first preset time period may also be other values, and only the FPGA needs to be able to detect and process the zero-sequence voltage signal and the zero-sequence current signal in each time period of the power transmission line, and obtain the maximum value and the minimum value in each time period, which is not limited herein.
In this embodiment, the maximum value and the minimum value of the zero-sequence voltage signal and the maximum value and the minimum value of the zero-sequence current signal are both a module maximum value and a module minimum value of the zero-sequence voltage signal and the zero-sequence current signal within a first preset time period.
S203: and acquiring and recording the ratio of the maximum value to the minimum value of the zero-sequence voltage signal and the ratio of the maximum value to the minimum value of the zero-sequence current signal, and processing the pre-warning sign according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal.
In this embodiment, the step of processing the pre-warning flag according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal specifically includes: detecting whether the ratio of the zero sequence voltage signals is greater than a preset value or not through the MCU, if so, setting a pre-warning sign 1; and detecting whether the ratio of the zero sequence current signals is greater than a preset value or not through the MCU, and if so, setting the warning sign 2.
In this embodiment, the MCU is connected to the FPGA, and the FPGA is connected to the voltage transformer and the current transformer through the analog-to-digital conversion chip.
In this embodiment, the FPGA sends the maximum value and the minimum value of the obtained zero-sequence voltage signal and the maximum value and the minimum value of the zero-sequence current signal to the MCU at a first preset frequency. And the MCU acquires and records the ratio of the maximum value to the minimum value, detects whether the ratio of the zero-sequence voltage signal is greater than a preset value and the ratio of the zero-sequence current signal is greater than the preset value in a second preset time period by using a second preset frequency, and processes the warning flag bit according to the judgment result.
In this embodiment, the ratio is 1.5, and in other embodiments, the ratio may be set according to an actual condition of the power transmission line, which is not limited herein.
In this embodiment, the first preset frequency is the same as the second preset frequency, and the first preset time period is the same as the second preset time period.
In the present embodiment, the warning flag includes warning flag 1 and warning flag 2. In other embodiments, the MCU may also record the detection result by setting only one warning flag and setting when the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal are both greater than a preset value.
S204: and judging whether the pre-warning mark meets a preset condition, if so, executing S205, and if not, executing S201.
In this embodiment, the step of determining whether the warning flag satisfies the preset condition specifically includes: and synchronously judging whether the warning sign 1 and the warning sign 2 are both set through the MCU, and if so, determining that the warning sign meets the preset condition.
S205: and outputting alarm information of the occurrence of the ground fault.
In this embodiment, after determining whether the warning flag 1 and the warning flag 2 are both set, the MCU sends the warning information of the occurrence of the ground fault to the control background or the intelligent terminal of the distribution network manager.
In this embodiment, the warning information may be a short message, an email, a message sent through instant messaging software, or other manners that enable a manager to quickly obtain the warning information.
In other embodiments, the MCU may also transmit the position information of the voltage transformer and the current transformer while transmitting the alarm information, so that the manager can quickly determine the position of the ground fault.
The fault detection method is further explained by a specific technical implementation mode of the distribution network line single-phase high-resistance ground fault detection method.
Three-phase voltage on a line is sensed in real time through three voltage transformers, and the three-phase voltage is input to a 16-bit analog-to-digital conversion chip and converted into a digital waveform sequence of the three-phase voltage.
And automatically synthesizing the digital waveform sequence of the three-phase voltage to obtain the digital waveform sequence of the zero-sequence voltage.
And inputting the digital waveform sequence of the zero sequence voltage into the FPGA, and performing DB10 wavelet transformation on the array waveform sequence by the FPGA to obtain the wavelet-transformed zero sequence voltage digital waveform sequence.
And the FPGA takes the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage digital waveform sequence every 10 mS.
And the FPGA transmits the maximum value and the minimum value to the MCU every 10mS, and the MCU takes and records the ratio of the maximum value to the minimum value.
The MCU checks whether the ratio of the maximum value to the minimum value of the zero sequence voltage exceeds a threshold every 10mS, and once the ratio exceeds the threshold, a pre-warning flag bit 1 is set.
Three-phase current on a line is induced in real time through three current transformers, and the three-phase current is input to a 16-bit analog-to-digital conversion chip and converted into a digital waveform sequence of the three-phase current.
And automatically synthesizing the digital waveform sequence of the three-phase current to obtain the digital waveform sequence of the zero-sequence current.
And inputting the digital waveform sequence of the zero-sequence current into the FPGA, and performing DB10 wavelet transformation on the array waveform sequence by the FPGA to obtain the wavelet-transformed zero-sequence current digital waveform sequence.
And the FPGA takes the maximum value and the minimum value of the wavelet-transformed zero-sequence current digital waveform sequence every 10 mS.
And the FPGA transmits the maximum value and the minimum value to the MCU every 10mS, and the MCU takes and records the ratio of the maximum value to the minimum value.
And the MCU checks whether the maximum value and the minimum value of the zero sequence current exceed preset values every 10mS, and once the maximum value and the minimum value exceed the preset values, a pre-warning flag bit 2 is set.
The MCU synchronously checks the warning mark 1 and the warning mark 2, and if the warning marks are simultaneously effective, the ground fault occurs to the upper warning.
Has the advantages that: the distribution network line single-phase high-resistance ground fault detection device can detect whether ground fault occurs according to the ratio of the zero-sequence voltage signal to the zero-sequence current signal, does not need to use a plurality of collectors to collect multipoint electrical information of the power transmission line, is not easy to judge errors, improves the ground fault detection accuracy, provides help for quick elimination of the ground fault, and ensures the safe operation of the system.
In the embodiments provided in the present invention, it should be understood that the disclosed devices, modules and circuits may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules or structural devices into only one logical division may be implemented in practice in another way, e.g., multiple modules or modules may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, devices or indirect coupling or communication connection, and may be in an electrical, mechanical or other form.
The components described as separate parts may or may not be physically separate, and the components shown may or may not be physically separate, may be located in one place, or may be distributed in a plurality of places. Some or all of them can be selected according to actual needs to achieve the purpose of the embodiment.
The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are within the protection scope of the present invention.
Claims (10)
1. A single-phase high-resistance earth fault detection method for a distribution network line is characterized by comprising the following steps of;
s101: acquiring three-phase voltage signals and three-phase current signals of a power transmission line, and respectively acquiring zero-sequence voltage signals and zero-sequence current signals according to the three-phase voltage signals and the three-phase current signals;
s102: performing wavelet transformation on the zero-sequence voltage signal and the zero-sequence current signal, and respectively obtaining the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage signal and the wavelet-transformed zero-sequence current signal in a first preset time period at a first preset frequency;
s103: acquiring and recording the ratio of the maximum value to the minimum value of the zero-sequence voltage signal and the ratio of the maximum value to the minimum value of the zero-sequence current signal, and processing a pre-warning sign according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal;
s104: judging whether the pre-warning mark meets a preset condition, if so, executing S105, and if not, executing S101;
s105: and outputting alarm information of the occurrence of the ground fault.
2. The method for detecting the single-phase high-resistance ground fault of the distribution network line according to claim 1, wherein the step of collecting three-phase voltage signals and three-phase current signals of the power transmission line specifically comprises the steps of:
the three-phase voltage and the three-phase current of the power transmission line are respectively induced through a voltage transformer and a current transformer, and signals transmitted by the voltage transformer and the current transformer are respectively converted into a three-phase voltage signal and a three-phase current signal through an analog-to-digital conversion chip.
3. The method for detecting the single-phase high-resistance ground fault of the distribution network line according to claim 1, wherein the step of respectively acquiring the zero-sequence voltage signal and the zero-sequence current signal according to the three-phase voltage signal and the three-phase current signal specifically comprises the steps of:
and receiving the three-phase voltage signals and the three-phase current signals through the FPGA, and synthesizing the three-phase voltage signals and the three-phase current signals into zero-sequence voltage signals and zero-sequence current signals.
4. The method for detecting the single-phase high-resistance ground fault of the distribution network line according to claim 1, wherein the step of processing the pre-warning flag according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal specifically comprises the steps of:
detecting whether the ratio of the zero sequence voltage signals is greater than a preset value or not through an MCU (microprogrammed control Unit), if so, setting a warning sign 1;
and detecting whether the ratio of the zero sequence current signals is greater than a preset value or not through the MCU, and if so, setting a warning sign 2.
5. The method for detecting the single-phase high-resistance ground fault of the distribution network line according to claim 4, wherein the step of judging whether the pre-warning sign meets the preset condition specifically comprises the steps of:
and synchronously judging whether the pre-warning mark 1 and the pre-warning mark 2 are both set through the MCU, if so, determining that the pre-warning mark meets the preset condition.
6. The utility model provides a join in marriage single-phase high resistance earth fault detection device of net twine way which characterized in that, join in marriage net twine way single-phase high resistance earth fault detection device and include voltage transformer, analog-to-digital conversion chip, current transformer, FPGA and MCU, join in marriage net twine way single-phase high resistance earth fault detection device and be used for realizing as follows join in marriage net twine way single-phase high resistance earth fault detection method:
s201: acquiring three-phase voltage signals and three-phase current signals of a power transmission line, and respectively acquiring zero-sequence voltage signals and zero-sequence current signals according to the three-phase voltage signals and the three-phase current signals;
s202: performing wavelet transformation on the zero-sequence voltage signal and the zero-sequence current signal, and respectively obtaining the maximum value and the minimum value of the wavelet-transformed zero-sequence voltage signal and the wavelet-transformed zero-sequence current signal in a first preset time period at a first preset frequency;
s203: acquiring and recording the ratio of the maximum value to the minimum value of the zero-sequence voltage signal and the ratio of the maximum value to the minimum value of the zero-sequence current signal, and processing a pre-warning sign according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal;
s204: judging whether the pre-warning mark meets a preset condition, if so, executing S205, and if not, executing S201;
s205: and outputting alarm information of the occurrence of the ground fault.
7. The distribution network line single-phase high-resistance ground fault detection device of claim 6, wherein the step of collecting three-phase voltage signals and three-phase current signals of the power transmission line specifically comprises:
the three-phase voltage and the three-phase current of the power transmission line are respectively induced through a voltage transformer and a current transformer, and signals transmitted by the voltage transformer and the current transformer are respectively converted into a three-phase voltage signal and a three-phase current signal through an analog-to-digital conversion chip.
8. The distribution network line single-phase high-resistance ground fault detection device of claim 6, wherein the step of respectively obtaining the zero-sequence voltage signal and the zero-sequence current signal according to the three-phase voltage signal and the three-phase current signal specifically comprises:
and receiving the three-phase voltage signals and the three-phase current signals through the FPGA, and synthesizing the three-phase voltage signals and the three-phase current signals into zero-sequence voltage signals and zero-sequence current signals.
9. The distribution network line single-phase high-resistance ground fault detection device of claim 6, wherein the step of processing the pre-warning flag according to the ratio of the zero-sequence voltage signal and the ratio of the zero-sequence current signal specifically comprises:
detecting whether the ratio of the zero sequence voltage signals is greater than a preset value or not through an MCU (microprogrammed control Unit), if so, setting a warning sign 1;
and detecting whether the ratio of the zero sequence current signals is greater than a preset value or not through the MCU, and if so, setting a warning sign 2.
10. The distribution network line single-phase high-resistance ground fault detection device of claim 9, wherein the step of judging whether the pre-warning flag satisfies a preset condition specifically comprises:
and synchronously judging whether the pre-warning mark 1 and the pre-warning mark 2 are both set through the MCU, if so, determining that the pre-warning mark meets the preset condition.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112858837A (en) * | 2021-01-13 | 2021-05-28 | 清华大学 | Method and device for judging high-resistance fault direction of power transmission line |
| CN113533904A (en) * | 2021-07-21 | 2021-10-22 | 南方电网科学研究院有限责任公司 | Method, device, equipment and medium for detecting high-resistance grounding fault of power distribution network |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104764971A (en) * | 2015-03-18 | 2015-07-08 | 广东电网有限责任公司电力科学研究院 | Power distribution network overhead line single-phase grounding fault recognition positioning method and fault indicator |
| CN106526415A (en) * | 2016-10-17 | 2017-03-22 | 国网福建省电力有限公司 | High-resistance ground fault line selection method for small-current grounding system |
| CN108267671A (en) * | 2017-12-29 | 2018-07-10 | 华中科技大学 | A kind of power grid high resistance earthing fault detection method and system |
| CN108548986A (en) * | 2018-06-01 | 2018-09-18 | 南京南瑞继保电气有限公司 | A kind of high resistance ground detecting system of small current neutral grounding system, device and method |
| CN108594071A (en) * | 2018-04-18 | 2018-09-28 | 广东电网有限责任公司 | A kind of single-phase earth fault detecting method of neutral grounding by small resistance distribution |
| US20190137556A1 (en) * | 2015-09-09 | 2019-05-09 | Beijing Inhand Networks Technology Co., Ltd. | Method and system for detecting and locating single-phase ground fault on low current grounded power-distribution network |
| CN110231543A (en) * | 2019-06-26 | 2019-09-13 | 国网山东省电力公司临沂供电公司 | Power distribution network abnormality recognition method |
| CN110286297A (en) * | 2019-06-12 | 2019-09-27 | 北京中电泰瑞科技有限公司 | A kind of single-phase grounded malfunction in grounded system of low current line selection apparatus and method |
| CN110632463A (en) * | 2019-10-30 | 2019-12-31 | 中国南方电网有限责任公司 | Small current grounding system fault line selection method based on wavelet analysis |
-
2020
- 2020-02-25 CN CN202010114623.7A patent/CN111257691A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104764971A (en) * | 2015-03-18 | 2015-07-08 | 广东电网有限责任公司电力科学研究院 | Power distribution network overhead line single-phase grounding fault recognition positioning method and fault indicator |
| US20190137556A1 (en) * | 2015-09-09 | 2019-05-09 | Beijing Inhand Networks Technology Co., Ltd. | Method and system for detecting and locating single-phase ground fault on low current grounded power-distribution network |
| CN106526415A (en) * | 2016-10-17 | 2017-03-22 | 国网福建省电力有限公司 | High-resistance ground fault line selection method for small-current grounding system |
| CN108267671A (en) * | 2017-12-29 | 2018-07-10 | 华中科技大学 | A kind of power grid high resistance earthing fault detection method and system |
| CN108594071A (en) * | 2018-04-18 | 2018-09-28 | 广东电网有限责任公司 | A kind of single-phase earth fault detecting method of neutral grounding by small resistance distribution |
| CN108548986A (en) * | 2018-06-01 | 2018-09-18 | 南京南瑞继保电气有限公司 | A kind of high resistance ground detecting system of small current neutral grounding system, device and method |
| CN110286297A (en) * | 2019-06-12 | 2019-09-27 | 北京中电泰瑞科技有限公司 | A kind of single-phase grounded malfunction in grounded system of low current line selection apparatus and method |
| CN110231543A (en) * | 2019-06-26 | 2019-09-13 | 国网山东省电力公司临沂供电公司 | Power distribution network abnormality recognition method |
| CN110632463A (en) * | 2019-10-30 | 2019-12-31 | 中国南方电网有限责任公司 | Small current grounding system fault line selection method based on wavelet analysis |
Non-Patent Citations (1)
| Title |
|---|
| 陈凯等: "改进暂态特征突变量的小电流接地系统选线仿真研究", 《电气开关》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112858837A (en) * | 2021-01-13 | 2021-05-28 | 清华大学 | Method and device for judging high-resistance fault direction of power transmission line |
| CN113533904A (en) * | 2021-07-21 | 2021-10-22 | 南方电网科学研究院有限责任公司 | Method, device, equipment and medium for detecting high-resistance grounding fault of power distribution network |
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