CN111245794A - Data transmission method and device - Google Patents

Data transmission method and device Download PDF

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Publication number
CN111245794A
CN111245794A CN201911418109.6A CN201911418109A CN111245794A CN 111245794 A CN111245794 A CN 111245794A CN 201911418109 A CN201911418109 A CN 201911418109A CN 111245794 A CN111245794 A CN 111245794A
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China
Prior art keywords
tcp
identification number
handle identification
data transmission
address
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CN201911418109.6A
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Chinese (zh)
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CN111245794B (en
Inventor
鄢贵海
张凯硕
龚施俊
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Yusur Technology Co ltd
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Yusur Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/16Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
    • H04L69/161Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00Network arrangements, protocols or services for addressing or naming
    • H04L61/50Address allocation
    • H04L61/5007Internet protocol [IP] addresses
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications
    • H04L67/14Session management
    • H04L67/146Markers for unambiguous identification of a particular session, e.g. session cookie or URL-encoding

Abstract

The invention provides a data transmission method and a data transmission device, wherein the method comprises the following steps: acquiring a destination IP address and a port number; configuring a handle identification number for the destination IP address and the port number, and sending the handle identification number to a TCP/IP accelerator board card; and carrying out data transmission through the handle identification number and the TCP/IP accelerator board card. By the method, the possibility of congestion in the data transmission process is avoided, hardware resources are saved, and the processing performance of the TCP/IP accelerator is improved.

Description

Data transmission method and device
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a data transmission method and apparatus.
Background
According to Thumb's law, transmitting 1bit data requires approximately 1Hertz of CPU (central processing unit) performance. Therefore, with the advent of gigabit ethernet and gigabit ethernet, CPU resources are increasingly consumed. In addition, since most operating systems are not real-time operating systems, and a CPU is used as a main processing platform of a protocol stack, the scheduling and buffering delay is not applicable any more as the network bandwidth increases. Therefore, researchers have proposed a TCP/IP offload engine TOE (TCP offload engine) technology, that is, the processing of the TCP/IP protocol stack is transferred to a hardware accelerator for implementation, so as to reduce the utilization rate of the host CPU and improve the transmission efficiency. However, the hardware accelerator has low transmission efficiency and data processing speed.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The embodiment of the invention provides a data transmission method and a data transmission device, which are used for improving the transmission efficiency and the data processing speed of an accelerator.
In one aspect, a data transmission method is provided, including:
acquiring a destination IP address and a port number;
configuring a handle identification number for the destination IP address and the port number, and sending the handle identification number to a TCP/IP accelerator board card;
and carrying out data transmission through the handle identification number and the TCP/IP accelerator board card.
In one embodiment, before performing data transmission with the TCP/IP accelerator board card by using the handle identification number, the method further includes:
and the TCP/IP accelerator board card establishes TCP connection with the destination IP address through the handle identification number.
In one embodiment, after the TCP/IP accelerator board establishes a TCP connection with the destination IP address through the handle identification number, the method further includes:
carrying out data transmission through the established TCP connection;
and after the data transmission is determined to be completed, disconnecting the TCP connection and releasing the handle identification number.
In one embodiment, the handle identification number is an 8-bit data packet.
In one embodiment, sending the handle identification number to a TCP/IP accelerator board includes:
and transmitting the destination IP address, the port number and the handle identification number to the TCP/IP accelerator board card through the PCIE.
In another aspect, a data transmission apparatus is provided, including:
the acquisition module is used for acquiring a destination IP address and a port number;
the configuration module is used for configuring a handle identification number for the destination IP address and the port number and sending the handle identification number to the TCP/IP accelerator board card;
and the transmission module is used for transmitting data with the TCP/IP accelerator board card through the handle identification number.
In one embodiment, the above apparatus further comprises:
and the control module is used for controlling the TCP/IP accelerator board card to establish TCP connection with the destination IP address through the handle identification number before data transmission is carried out between the handle identification number and the TCP/IP accelerator board card.
In one embodiment, the above apparatus further comprises:
the disconnection module is used for carrying out data transmission through the established TCP connection after the TCP/IP accelerator board card establishes the TCP connection with the destination IP address through the handle identification number; and after the data transmission is determined to be completed, disconnecting the TCP connection and releasing the handle identification number.
In one embodiment, the handle identification number is an 8-bit data packet.
In one embodiment, the configuration module is specifically configured to transmit the destination IP address, the port number, and the handle identification number to the TCP/IP accelerator board via PCIE.
In yet another aspect, a network device is provided, including: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the method described above when executing the computer program.
In a further aspect, a non-transitory computer-readable storage medium is provided, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the above-mentioned method.
In the above example, a handle identification number is configured for the destination IP address and the port number, and the handle identification number is sent to the TCP/IP accelerator board, and data transmission is performed through the handle identification number and the TCP/IP accelerator board. That is, each port that establishes a connection is assigned a handle identification number to reduce the interaction steps between the host and the TCP/IP accelerator. By the method, the possibility of congestion in the data transmission process is avoided, hardware resources are saved, and the processing performance of the TCP/IP accelerator is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
FIG. 1 is a method flow diagram of a data transmission method according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a principle according to an embodiment of the invention;
FIG. 3 is another method flow diagram of a method of data transmission according to an embodiment of the present invention;
FIG. 4 is a diagram of a handle identification number assignment routine, according to an embodiment of the present invention;
fig. 5 is a block diagram of a data transmission apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the following embodiments and accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.
The TCP protocol is link oriented and is handled in the TOE system. Before data transmission begins, connection needs to be established first, and when data is received and sent, the protocol processing module responds to the last data. The connection is disconnected at the end of the transmission. Because the speed of the hardware processing protocol is far higher than that of software, data accumulation at the interface between the software and the hardware can exist, and the congestion problem is caused. Especially when multiple ports establish a TCP connection simultaneously, the hardware cannot process data in order, which may result in connection interruption or failure to respond.
The connection is simultaneously established for a plurality of ports in the software protocol stack, the serial processing can only be realized on hardware, the requirement on hardware resources is high, the host and the accelerator are required to carry out interaction for many times, and the transmission efficiency and the data processing speed are low.
In order to improve transmission efficiency and data processing speed, the embodiment of the application provides a data transmission method.
Fig. 1 is a flow chart of a method of an embodiment of a data transmission method described herein. Although the present application provides method operational steps or apparatus configurations as illustrated in the following examples or figures, more or fewer operational steps or modular units may be included in the methods or apparatus based on conventional or non-inventive efforts. In the case of steps or structures which do not logically have the necessary cause and effect relationship, the execution sequence of the steps or the module structure of the apparatus is not limited to the execution sequence or the module structure described in the embodiments and shown in the drawings of the present application. When the described method or module structure is applied in an actual device or end product, the method or module structure according to the embodiments or shown in the drawings can be executed sequentially or executed in parallel (for example, in a parallel processor or multi-thread processing environment, or even in a distributed processing environment).
Specifically, as shown in fig. 1, a data transmission method provided in an embodiment of the present application may include:
step 101: acquiring a destination IP address and a port number;
step 102: configuring a handle identification number for the destination IP address and the port number, and sending the handle identification number to a TCP/IP accelerator board card;
step 103: and carrying out data transmission through the handle identification number and the TCP/IP accelerator board card.
In the above example, a handle identification number is configured for the destination IP address and the port number, and the handle identification number is sent to the TCP/IP accelerator board, and data transmission is performed through the handle identification number and the TCP/IP accelerator board. That is, each port that establishes a connection is assigned a handle identification number to reduce the interaction steps between the host and the TCP/IP accelerator. By the method, the possibility of congestion in the data transmission process is avoided, hardware resources are saved, and the processing performance of the TCP/IP accelerator is improved.
The execution main body for allocating the handle identification number may be an upper computer, that is, the upper computer may allocate the handle identification number to the destination IP address through software, so that data can be received and transmitted in order based on the handle identification number. In implementation, after the handle identification number is allocated, the resume TVP connection can be identified based on the allocated handle to perform data transmission. That is, before data transmission is performed between the handle identification number and the TCP/IP accelerator board, the TCP/IP accelerator board may establish a TCP connection with a destination IP address through the handle identification number.
In order to enable the handle identification number to be effectively utilized, after the TCP/IP accelerator board card establishes the TCP connection with the destination IP address through the handle identification number, data transmission can be carried out through the established TCP connection; and after the data transmission is determined to be completed, the TCP connection is disconnected, and the handle identification number is released, so that the utilization rate of the handle identification number can be improved, and the effective reuse of the handle identification number is realized.
The handle identification number may be an 8-bit packet.
In practical implementation, the handle identification number is sent to the TCP/IP accelerator board, and the destination IP address, the port number, and the handle identification number may be transmitted to the TCP/IP accelerator board by PCIE.
The above method is described below with reference to a specific example, however, it should be noted that the specific example is only for better describing the present application and is not to be construed as limiting the present application.
In this example, a method for managing IP addresses of a TCP/IP accelerator is provided, which reallocates TCP links from a client, and sets appropriate software in the accelerator to process the TCP/IP links and data transmission of the client, thereby saving hardware resources, and reducing interaction between a host and the accelerator, so as to improve transmission efficiency and data processing speed.
Specifically, the IP addresses of the clients are managed, an 8-bit length handle identification number is automatically allocated to the IP address of each linked client, and the hardware identifies and processes different clients and different data packets through the handle identification numbers. By the method, the problem of connection interruption or no response caused by the fact that the hardware end cannot process data in order can be effectively solved, interaction steps between the host and the TCP/IP accelerator are reduced, hardware resources are saved, and the IP address management method of the TCP/IP accelerator can be managed through software.
The above method may comprise the steps of:
s1: the upper computer configures a destination IP address and a port number to be connected, and configures a handle number for the destination IP address;
s2: transmitting the IP information and the handle number to a TCP/IP accelerator board card through PCIE, and establishing TCP connection;
s3: after S2 is finished, the upper computer can directly transmit data to the board card through the handle identification number, and the board card can also establish connection with a destination address or transmit data to the destination address through the handle identification number of the destination ip;
s4: and a software interface is defined, and the upper computer can select to receive different data packets through a handle number.
In the above example, a method is provided that improves the efficiency of a TCP/IP accelerator processing multilink links while avoiding the problem of data stacking due to hardware processing protocols being faster than software. Before the port establishes TCP connection with the accelerator board card, the software end automatically allocates a handle identification number with 8 bits to the IP, and the hardware distinguishes TCP links from different ports through the handle identification, so that the problem that the connection is interrupted or the response cannot be performed due to the fact that the hardware cannot process data in order is solved. Meanwhile, when data are transmitted between the upper computer and the destination address, the data are transmitted only according to the handle identification, so that the interaction process with hardware is reduced, and hardware resources are saved.
The invention provides an IP address management method for a TCP/IP accelerator, and provides an implementation method for improving the efficiency of the TCP/IP accelerator in processing multi-client links and reducing data processing accumulation. Specifically, as shown in fig. 2, management is performed through software, according to the method, an 8-bit handle identification number is allocated to each port where a TCP connection is established, and hardware processes connections established from different ports and transmits data through the handle identification numbers given by the software. As shown in fig. 3, the method comprises the following steps:
s1: as shown in fig. 4, the software end assigns a handle identification number of 8 bits to the destination IP address and port number.
S2: and the software transmits the information configured in the step S1 to the TCP/IP accelerator board via the PCIE, and the TCP/IP accelerator board establishes or processes a TCP connection via the configuration information.
S3: after the TCP connection is established, the upper computer can directly perform data transmission with the TCP/IP accelerator board card according to the handle identification number without declaring IP and ports again. The accelerator board card can process different port connections and data information according to different handle identification numbers.
S4: the upper computer can select the number of the packets to be received according to the handle identification number.
S5: and when the connection is finished, after all the data of the storage channel are transmitted, the software processing module controls to release the handle, and the handle is used for establishing new connection next time.
Namely, each IP TCP/IP request corresponds to an 8-bit handle identifier, and the accelerator can concurrently respond to each connection request only according to the handle identifier, so that the problem of connection interruption or no response caused by the fact that the hardware accelerator cannot process connections in order is effectively avoided, and the upper computer and the accelerator only need process according to the handle number in the data transmission process. By the method, interaction between the host and the TCP/IP accelerator is effectively reduced, the possibility of congestion in the data transmission process is avoided, hardware resources are saved, and the processing performance of the TCP/IP accelerator is improved.
The above example provides an IP address management method for a TCP/IP accelerator, which avoids the problem of connection interruption or no response caused by the fact that the TCP/IP accelerator cannot process connections of multiple clients in order through the IP address management method, and can effectively reduce data accumulation caused by the fact that hardware processes data too fast. Specifically, a handle identification number is allocated to each port for establishing connection so as to reduce interaction steps between the host and the TCP/IP accelerator, and save hardware resources. Configuring each host IP address and handle number, establishing connection between the host and the accelerator, and identifying through the handle number; furthermore, the host sends data to the accelerator, stores different positions according to the handle number, and responds to TCP connection and data transmission by the hardware according to the handle number. By the method, the response speed of the accelerator when the accelerator is connected with multiple clients can be effectively increased, the congestion of transmitted data is avoided, hardware resources are saved, and the processing performance of the TCP/IP accelerator is improved.
Based on the same inventive concept, the embodiment of the present invention further provides a data transmission apparatus, as described in the following embodiments. Because the principle of the data transmission device for solving the problem is similar to the data transmission method, the implementation of the data transmission device can refer to the implementation of the data transmission method, and repeated details are not repeated. As used hereinafter, the term "unit" or "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated. Fig. 5 is a block diagram of a data transmission apparatus according to an embodiment of the present invention, and as shown in fig. 5, the data transmission apparatus may include: an acquisition module 501, a configuration module 502, and a transmission module 503, the structure of which is described below.
An obtaining module 501, configured to obtain a destination IP address and a port number;
a configuration module 502, configured to configure a handle identification number for the destination IP address and the port number, and send the handle identification number to the TCP/IP accelerator board;
and the transmission module 503 is configured to perform data transmission with the TCP/IP accelerator board card through the handle identification number.
In one embodiment, the data transmission apparatus may further include: and the control module is used for controlling the TCP/IP accelerator board card to establish TCP connection with the destination IP address through the handle identification number before data transmission is carried out between the handle identification number and the TCP/IP accelerator board card.
In one embodiment, the data transmission apparatus may further include: the disconnection module is used for carrying out data transmission through the established TCP connection after the TCP/IP accelerator board card establishes the TCP connection with the destination IP address through the handle identification number; and after the data transmission is determined to be completed, disconnecting the TCP connection and releasing the handle identification number.
In one embodiment, the handle identification number may be an 8-bit packet.
In an embodiment, the configuration module 502 may be specifically configured to transmit the destination IP address, the port number, and the handle identification number to the TCP/IP accelerator board via PCIE.
An embodiment of the present application further provides a specific implementation manner of an electronic device, which is capable of implementing all steps in the data transmission method in the foregoing embodiment, where the electronic device specifically includes the following contents: a processor (processor), a memory (memory), a communication Interface (Communications Interface), and a bus; the processor, the memory and the communication interface complete mutual communication through the bus; the communication interface is used for realizing information transmission among the server, the client terminal and other participating mechanisms; the processor is configured to call a computer program in the memory, and when the processor executes the computer program, the processor implements all the steps in the data transmission method in the foregoing embodiment, for example, when the processor executes the computer program, the processor implements the following steps:
step 1: acquiring a destination IP address and a port number;
step 2: configuring a handle identification number for the destination IP address and the port number, and sending the handle identification number to a TCP/IP accelerator board card;
and step 3: and carrying out data transmission through the handle identification number and the TCP/IP accelerator board card.
As can be seen from the above description, in the embodiment of the present application, a handle identification number is configured for the destination IP address and the port number, and the handle identification number is sent to the TCP/IP accelerator board, and data transmission is performed through the handle identification number and the TCP/IP accelerator board. That is, each port that establishes a connection is assigned a handle identification number to reduce the interaction steps between the host and the TCP/IP accelerator. By the method, the possibility of congestion in the data transmission process is avoided, hardware resources are saved, and the processing performance of the TCP/IP accelerator is improved.
Embodiments of the present application further provide a computer-readable storage medium capable of implementing all steps in the data transmission method in the foregoing embodiments, where the computer-readable storage medium stores thereon a computer program, and when the computer program is executed by a processor, the computer program implements all steps of the data transmission method in the foregoing embodiments, for example, when the processor executes the computer program, the processor implements the following steps:
step 1: acquiring a destination IP address and a port number;
step 2: configuring a handle identification number for the destination IP address and the port number, and sending the handle identification number to a TCP/IP accelerator board card;
and step 3: and carrying out data transmission through the handle identification number and the TCP/IP accelerator board card.
As can be seen from the above description, in the embodiment of the present application, a handle identification number is configured for the destination IP address and the port number, and the handle identification number is sent to the TCP/IP accelerator board, and data transmission is performed through the handle identification number and the TCP/IP accelerator board. That is, each port that establishes a connection is assigned a handle identification number to reduce the interaction steps between the host and the TCP/IP accelerator. By the method, the possibility of congestion in the data transmission process is avoided, hardware resources are saved, and the processing performance of the TCP/IP accelerator is improved.
In this specification, adjectives such as first and second may only be used to distinguish one element or action from another, without necessarily requiring or implying any actual such relationship or order. References to an element or component or step (etc.) should not be construed as limited to only one of the element, component, or step, but rather to one or more of the element, component, or step, etc., where the context permits.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the hardware + program class embodiment, since it is substantially similar to the method embodiment, the description is simple, and the relevant points can be referred to the partial description of the method embodiment.
The foregoing description has been directed to specific embodiments of this disclosure. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
Although the present application provides method steps as described in an embodiment or flowchart, additional or fewer steps may be included based on conventional or non-inventive efforts. The order of steps recited in the embodiments is merely one manner of performing the steps in a multitude of orders and does not represent the only order of execution. When an actual apparatus or client product executes, it may execute sequentially or in parallel (e.g., in the context of parallel processors or multi-threaded processing) according to the embodiments or methods shown in the figures.
The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. One typical implementation device is a computer. In particular, the computer may be, for example, a personal computer, a laptop computer, a vehicle-mounted human-computer interaction device, a cellular telephone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
Although embodiments of the present description provide method steps as described in embodiments or flowcharts, more or fewer steps may be included based on conventional or non-inventive means. The order of steps recited in the embodiments is merely one manner of performing the steps in a multitude of orders and does not represent the only order of execution. When an actual apparatus or end product executes, it may execute sequentially or in parallel (e.g., parallel processors or multi-threaded environments, or even distributed data processing environments) according to the method shown in the embodiment or the figures. The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the presence of additional identical or equivalent elements in a process, method, article, or apparatus that comprises the recited elements is not excluded.
For convenience of description, the above devices are described as being divided into various modules by functions, and are described separately. Of course, in implementing the embodiments of the present description, the functions of each module may be implemented in one or more software and/or hardware, or a module implementing the same function may be implemented by a combination of multiple sub-modules or sub-units, and the like. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Those skilled in the art will also appreciate that, in addition to implementing the controller as pure computer readable program code, the same functionality can be implemented by logically programming method steps such that the controller is in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Such a controller may therefore be considered as a hardware component, and the means included therein for performing the various functions may also be considered as a structure within the hardware component. Or even means for performing the functions may be regarded as being both a software module for performing the method and a structure within a hardware component.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
As will be appreciated by one skilled in the art, embodiments of the present description may be provided as a method, system, or computer program product. Accordingly, embodiments of the present description may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present description may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and so forth) having computer-usable program code embodied therein.
The embodiments of this specification may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The described embodiments may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment. In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of an embodiment of the specification. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
The above description is only an example of the embodiments of the present disclosure, and is not intended to limit the embodiments of the present disclosure. Various modifications and variations to the embodiments described herein will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present specification should be included in the scope of the claims of the embodiments of the present specification.

Claims (12)

1. A method of data transmission, comprising:
acquiring a destination IP address and a port number;
configuring a handle identification number for the destination IP address and the port number, and sending the handle identification number to a TCP/IP accelerator board card;
and carrying out data transmission through the handle identification number and the TCP/IP accelerator board card.
2. The method of claim 1, further comprising, prior to data transfer with the TCP/IP accelerator board via the handle identification number:
and the TCP/IP accelerator board card establishes TCP connection with the destination IP address through the handle identification number.
3. The method of claim 2, after the TCP/IP accelerator board establishes a TCP connection with the destination IP address through the handle identification number, further comprising:
carrying out data transmission through the established TCP connection;
and after the data transmission is determined to be completed, disconnecting the TCP connection and releasing the handle identification number.
4. The method of claim 1, wherein the handle identification number is an 8-bit packet.
5. The method of claim 1, wherein sending the handle identification number to a TCP/IP accelerator board comprises:
and transmitting the destination IP address, the port number and the handle identification number to the TCP/IP accelerator board card through the PCIE.
6. A data transmission apparatus, comprising:
the acquisition module is used for acquiring a destination IP address and a port number;
the configuration module is used for configuring a handle identification number for the destination IP address and the port number and sending the handle identification number to the TCP/IP accelerator board card;
and the transmission module is used for transmitting data with the TCP/IP accelerator board card through the handle identification number.
7. The apparatus of claim 6, further comprising:
and the control module is used for controlling the TCP/IP accelerator board card to establish TCP connection with the destination IP address through the handle identification number before data transmission is carried out between the handle identification number and the TCP/IP accelerator board card.
8. The apparatus of claim 7, further comprising:
the disconnection module is used for carrying out data transmission through the established TCP connection after the TCP/IP accelerator board card establishes the TCP connection with the destination IP address through the handle identification number; and after the data transmission is determined to be completed, disconnecting the TCP connection and releasing the handle identification number.
9. The apparatus of claim 6, wherein the handle identification number is an 8-bit packet.
10. The apparatus according to claim 6, wherein the configuration module is specifically configured to transmit the destination IP address, the port number, and the handle identification number to the TCP/IP accelerator board via PCIE.
11. A network device, comprising: memory, processor and computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 5 when executing the computer program.
12. A non-transitory computer-readable storage medium, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the steps of the method of any one of claims 1 to 5.
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