CN111244261A - Junction-field-effect-free transistor type pressure sensor and preparation method thereof - Google Patents
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 24
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/87—Electrodes or interconnections, e.g. leads or terminals
- H10N30/877—Conductive materials
- H10N30/878—Conductive materials the principal material being non-metallic, e.g. oxide or carbon based
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/16—Measuring force or stress, in general using properties of piezoelectric devices
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L9/00—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
- G01L9/08—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of piezoelectric devices, i.e. electric circuits therefor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/06—Forming electrodes or interconnections, e.g. leads or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/30—Piezoelectric or electrostrictive devices with mechanical input and electrical output, e.g. functioning as generators or sensors
- H10N30/302—Sensors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/85—Piezoelectric or electrostrictive active materials
Abstract
The invention provides a junction-free field effect transistor type pressure sensor and a preparation method thereof, wherein the junction-free field effect transistor type pressure sensor comprises a source region and a drain region which are symmetrically arranged at the left end and the right end of a substrate, a plurality of nanowires are vertically arranged between the source region and the drain region, and the doping types and the concentrations of the source region and the drain region and the nanowires are consistent; the nanowire is provided with a dielectric wrapping layer, a piezoelectric grid bar is arranged between the source region and the drain region along the direction perpendicular to the nanowire, the piezoelectric grid bar is isolated from the nanowire through the dielectric wrapping layer, the piezoelectric grid bar is made of doped zinc oxide, the doping type of the doped zinc oxide is opposite to that of the source region, the drain region and the nanowire, and a gate electrode is arranged on the piezoelectric grid bar. The silicon nanowire is used as a transistor channel, the zinc oxide is used as a piezoelectric grid bar, and based on the good compatibility of the zinc oxide and the silicon dioxide, the obtained pressure sensor has the advantages of small size and high integration level.
Description
Technical Field
The invention relates to the technical field of semiconductor micro-nano device manufacturing, in particular to a junction-field-effect-free transistor type pressure sensor and a preparation method thereof.
Background
Zinc oxide is a ii-vi semiconductor with hexagonal wurtzite and has been widely used in the field of piezoelectric conversion for many years due to its wide band gap, low dielectric constant and its excellent piezoelectric properties. Piezoelectric sensors generally use a piezoelectric element as a core member, and operate by utilizing the piezoelectric effect or the inverse piezoelectric effect of a piezoelectric body. When the zinc oxide crystal is acted by an external force in a certain fixed direction, an electric polarization phenomenon is generated inside the zinc oxide crystal, equivalent bound charges with opposite electric properties appear on the surfaces of two ends of the crystal substance, and the charge surface density is in direct proportion to the external force; when the external force is removed, the crystal returns to an uncharged state; when the direction of the external force is changed, the polarity of the charges is changed, and the charge quantity generated by the crystal stress is in direct proportion to the magnitude of the external force. The zinc oxide has good piezoelectric property due to the characteristics, and can be used for preparing a piezoelectric sensor with good performance.
The existing zinc oxide transistor type pressure sensor mostly adopts zinc oxide materials to manufacture a channel of a transistor, and when a grid is stressed, a zinc oxide nanowire used as the channel of the transistor can convert mechanical energy into an electric signal through a piezoelectric effect, so that the aim of detecting pressure is fulfilled. However, the method has the disadvantages that the zinc oxide nanowire is prepared by a vapor deposition method and then transferred to a substrate to prepare a transistor, so that the accurate positioning is difficult, the size of the prepared sensor is relatively large, and the increasing high integration requirement of an integrated circuit is difficult to meet.
Disclosure of Invention
Aiming at the defects of the transistor type pressure sensor in the prior art, the invention provides the junction-free field effect transistor type pressure sensor and the preparation method thereof.
The invention adopts the following technical scheme:
a junction-free field effect transistor type pressure sensor comprises a source region and a drain region which are symmetrically arranged at the left end and the right end of a substrate, wherein a plurality of nanowires are vertically arranged between the source region and the drain region, the left ends of the nanowires are connected with the source region, the right ends of the nanowires are connected with the drain region, and the doping types and the concentrations of the source region and the drain region and the nanowires are consistent; the nanowire is provided with a dielectric wrapping layer, a piezoelectric grid bar is arranged between a source region and a drain region along the direction perpendicular to the nanowire, the piezoelectric grid bar is pressed on the nanowire and embedded in the bottom of the piezoelectric grid bar, the piezoelectric grid bar is isolated from the nanowire through the dielectric wrapping layer, an interval exists between the piezoelectric grid bar and the source region and the drain region, the piezoelectric grid bar is made of doped zinc oxide, the doping type of the doped zinc oxide is opposite to that of the source region and the drain region and that of the nanowire, and a gate electrode is arranged on the piezoelectric grid bar.
Preferably, the doping types of the source region, the drain region and the nanowire are both n-type heavy doping, and the doping material is selected from phosphorus, arsenic or antimony.
Preferably, the doping material of the doped zinc oxide is selected from nitrogen or silver.
Preferably, the source region, the drain region and the nanowire are obtained by doping top layer silicon on the SOI substrate and then etching.
Preferably, the material of the media pack is silica.
Preferably, the source region is composed of a source region conductive mesa located at a lower portion and a source electrode located at an upper portion, and the drain region is composed of a drain region conductive mesa located at a lower portion and a drain electrode located at an upper portion.
The preparation method of the junction-free field effect transistor type pressure sensor comprises the following steps:
step 1: heavily doping the top silicon of the SOI substrate in an ion implantation mode;
step 2: carrying out rapid thermal annealing on the SOI substrate doped in the step 1 to activate doping atoms;
and step 3: manufacturing a source region conductive table-board, a drain region conductive table-board and the nano-wire on the SOI substrate obtained in the step 2 by adopting an electron beam etching mode;
and 4, step 4: growing a medium wrapping layer on the surfaces of the prepared source region conductive table top, the prepared drain region conductive table top and the prepared nanowires;
and 5: depositing the piezoelectric grid bars on the medium wrapping layer of the nano wires prepared in the step 4 along the direction vertical to the nano wires, and simultaneously doping in the deposition growth process of the piezoelectric grid bars;
step 6: and respectively preparing a source electrode, a drain electrode and a gate electrode on the medium wrapping layer corresponding to the source region conductive table top, the medium wrapping layer corresponding to the drain region conductive table top and the piezoelectric grid bar, thus finishing the preparation of the junction-free field effect transistor type pressure sensor.
Preferably, before the step 4, sacrificial oxidation is performed on the source region conductive mesa, the drain region conductive mesa and the nanowire prepared in the step 3, and the sacrificial oxidation specifically includes: and (3) carrying out dry oxidation on the source region conductive table top, the drain region conductive table top and the nanowire prepared in the step (3) at 900-1000 ℃, generating a silicon dioxide oxidation layer on the whole surface, and then removing the silicon dioxide oxidation layer by using hydrofluoric acid.
Preferably, the width of the nanowire prepared in the step 3 is 20-50 nm, and the height of the nanowire is 20-50 nm.
Preferably, in the step 4, the thickness of the medium wrapping layer is 5-10 nm.
The invention has the following beneficial effects:
considering that zinc oxide and silicon dioxide can form good interface contact, the grid electrode of the junction-free field effect transistor is replaced by zinc oxide, and the charge generated by the piezoelectric effect of the zinc oxide is in direct proportion to the pressure, so that the change of the current in a sub-threshold region in a logarithmic coordinate and the pressure also present a linear relation, the pressure can be detected, when the pressure is tested, the transistor works in the sub-threshold region, and the current in the logarithmic coordinate and the grid electrode charge form a linear relation. The junction-free field effect transistor type pressure sensor and the preparation method thereof have the advantages of simple device preparation process, small size, good contact between zinc oxide and silicon dioxide interface and good compatibility with a plane silicon process. In addition, self-isolation can be realized between devices, and high integration is easy to realize. In addition, the pressure sensor based on the junction-free transistor can be used as a junction-free field effect transistor and can also be used as a pressure sensor.
Drawings
FIG. 1 is a schematic structural view of a junction-free field effect transistor type pressure sensor according to example 1;
FIG. 2 is a cross-sectional view of a junction-free field effect transistor-type pressure sensor along a piezoelectric gate in example 1;
FIG. 3 is a flow chart of the preparation process of example 1.
Detailed Description
In order to make the technical purpose, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention are further described below with reference to the accompanying drawings and specific embodiments.
Example 1
As shown in fig. 1 and 2, a junction-free field effect transistor-type pressure sensor includes: the SOI substrate 1 is characterized in that a source region and a drain region are symmetrically arranged at the left end and the right end of the SOI substrate 1, the source region is composed of a source region conductive table top 2 positioned at the lower part and a source electrode 4 positioned at the upper part, and the drain region is composed of a drain region conductive table top 3 positioned at the lower part and a drain electrode 5 positioned at the upper part. A plurality of nanowires 7 are vertically arranged between the source region conductive table top 2 and the drain region conductive table top 3, the left end of each nanowire 7 is connected with the source region conductive table top 2, the right end of each nanowire 7 is connected with the drain region conductive table top 3, and the source region conductive table top 2, the drain region conductive table top 3 and the nanowires 7 are obtained by etching after being doped with top silicon on the SOI substrate 1, wherein the doped material is phosphorus; a medium wrapping layer 9 grows on the nanowire 7, a piezoelectric grid 8 is arranged between the source region conductive table top 2 and the drain region conductive table top 3 in a direction perpendicular to the nanowire 7, the piezoelectric grid 8 is arranged on the nanowire 7 in a pressing mode, the nanowire 7 is embedded in the bottom of the piezoelectric grid 8, the piezoelectric grid 8 is isolated from the nanowire 7 through the medium wrapping layer 9, the piezoelectric grid 8 is spaced from the source region conductive table top 2 and the drain region conductive table top 3, the piezoelectric grid 8 is made of doped zinc oxide, the doping type of the doped zinc oxide is opposite to that of the source region conductive table top and the drain region and the doping type of the nanowire, and the doped material of the doped zinc oxide is nitrogen. The piezoelectric grid bars 8 are provided with the grid electrodes 6, the piezoelectric grid bars 8 can grow through vapor deposition, the thickness is 100-300 nm, doping elements are directly doped in the growing process, and high doping concentration is achieved.
The dielectric wrapping layer is made of silicon dioxide and is formed through thermal oxidation or vapor deposition, and the thickness of the dielectric wrapping layer is 5-10 nm. The source electrode 4, the drain electrode 5 and the gate electrode 6 are respectively made by adding electrode materials on the source region conductive table top 2, the drain region conductive table top 3 and the piezoelectric grid bars 8, and the electrode materials are Ni/Al alloy.
Regarding the above method for manufacturing a junction-free field effect transistor-type pressure sensor, it should be noted that the main improvement point of the present invention lies in the device design of the transistor-type pressure sensor and the manufacturing process of the device, and for the specific parameter design, those skilled in the art can make routine adjustments according to the required device size, equipment conditions, etc., and the following manufacturing process is only an example, as shown in fig. 3, and includes the following steps:
step 1: heavily doping the top silicon of the SOI substrate 1 in an ion implantation mode;
specifically, the top silicon surface of the SOI substrate 1 was thermally oxidized at 1000 ℃ for 30 minutes to form a thermal oxide layer having a thickness of about 10 nm. Then, N-type or P-type doping is carried out through ion implantation, the implantation energy is 30-35 KeV, and the doping concentration is 1 multiplied by 1018cm-3~1×1019cm-3。
In this embodiment, the top silicon of the SOI substrate 1 is used with a thickness of 50nm, and when ion implantation is performed, phosphorus is specifically selected as a doping element, the implantation energy is 30keV, and the doping concentration is 5 × 1018cm-3;
Step 2: rapidly annealing to activate the doping atoms;
the specific operation is as follows: after the injection is finished, rapid thermal annealing treatment is carried out for 10 to 60 seconds at the temperature of 900 to 1100 ℃, and impurity atoms are activated;
in this example, rapid thermal annealing at 1100 ℃ was selected for 20 seconds;
and step 3: manufacturing a source region conductive table top 2, a drain region conductive table top 3 and a plurality of nanowires 7 above the top silicon of the SOI substrate 1 by adopting an electron beam exposure and etching method;
specifically, a negative photoresist may be used in consideration of exposure efficiency using an electron beam exposure technique that is conventional in the art. After exposure is finished, dry etching can be adopted to obtain the patterned source region conductive table top 2, the patterned drain region conductive table top 3 and the plurality of nanowires 7, and finally, the residual photoresist is removed through acetone soaking. In the present embodiment, the width of the plurality of nanowires 7 is 30 nm.
And 4, step 4: sacrificial oxidation of the plurality of nanowires 7;
the specific operation is as follows: dry-oxidizing the graph formed by the source region conductive table top 2, the drain region conductive table top 3 and the plurality of nanowires 7 obtained in the step 3 at 900-1000 ℃, generating silicon dioxide on the surface of the whole graph, and removing the silicon dioxide by using hydrofluoric acid, so that the nanowires 7 can be effectively refined; the oxidation time is controlled within 30min, and the specific time is determined according to the refined scale.
In the embodiment, the dry oxidation is carried out for 10min at the temperature of 1000 ℃, and the height and the width of the thinned nanowire 7 are 40nm and 20nm respectively;
and 5: forming a medium wrapping layer 9 on the surfaces of the refined source region conductive table top 2, the refined drain region conductive table top 3 and the plurality of nanowires 7;
the growth medium wrapping layer 9 can adopt a thermal oxidation or vapor deposition method, and the thickness is 5-10 nm;
in this embodiment, the thickness of the growth medium cladding layer 9 is selected to be 5nm by using a low pressure vapor deposition method.
Step 6: depositing a piezoelectric grid bar 8 above the medium wrapping layer 9 in a direction perpendicular to the extending direction of the nanowires, and covering the areas corresponding to the nanowires 7;
the preferred material of the piezoelectric grid 7 is zinc oxide, which can be grown by vapor deposition, and P-type doping is directly carried out during the growth process, in this embodiment, the doping element is nitrogen, and the doping concentration is 1020cm-3~1021cm-3The polarity of the piezoelectric grating is opposite to the doping polarity of the top silicon layer of the SOI substrate 1, and the thickness of the piezoelectric grating is 100-300 nm;
and 7: and respectively preparing a source electrode 4, a drain electrode 5 and a gate electrode 6 on the medium wrapping layer corresponding to the source region conductive table top 2, the medium wrapping layer corresponding to the drain region conductive table top 3 and the piezoelectric grid bar 8, and finishing the preparation of the junction-free field effect transistor type pressure sensor.
The specific operation is as follows: firstly, opening an ohmic contact window on a medium wrapping layer corresponding to a source region conductive table top 2 and a drain region conductive table top 3 by adopting a photoetching and etching method, wherein the position of the ohmic contact window is in the center of the corresponding conductive table top; ohmic contact windows are then opened at the positions of the piezoelectric bars 8 as shown by the positions of the gate electrodes 6 in fig. 1. Uniformly depositing metal Ni at the positions of three ohmic contact windows, carrying out rapid thermal annealing to form Ni/Si alloy, soaking with 5% dilute hydrochloric acid to remove redundant Ni, growing metal Al above the corresponding windows with the thickness of 100-300 nm, and forming a source electrode 4, a drain electrode 5 and a gate electrode 6.
Finally, it should be noted that: the above embodiments are merely illustrative and not restrictive of the technical solutions of the present invention, and any equivalent substitutions and modifications or partial substitutions made without departing from the spirit and scope of the present invention should be included in the scope of the claims of the present invention.
Claims (10)
1. The utility model provides a no junction field effect transistor formula pressure sensor, includes source region and drain region that symmetry located both ends about the substrate, its characterized in that: a plurality of nanowires are vertically arranged between the source region and the drain region, the left end of each nanowire is connected with the source region, the right end of each nanowire is connected with the drain region, and the doping types and the concentrations of the source region and the drain region are consistent with those of the nanowires; the nanowire is provided with a dielectric wrapping layer, a piezoelectric grid bar is arranged between a source region and a drain region along the direction perpendicular to the nanowire, the piezoelectric grid bar is pressed on the nanowire and embedded in the bottom of the piezoelectric grid bar, the piezoelectric grid bar is isolated from the nanowire through the dielectric wrapping layer, an interval exists between the piezoelectric grid bar and the source region and the drain region, the piezoelectric grid bar is made of doped zinc oxide, the doping type of the doped zinc oxide is opposite to that of the source region and the drain region and that of the nanowire, and a gate electrode is arranged on the piezoelectric grid bar.
2. The junction-free field effect transistor-based pressure sensor of claim 1, wherein: the doping types of the source region, the drain region and the nanowire are n-type heavy doping, and the doping material is selected from phosphorus, arsenic or antimony.
3. The junction-free field effect transistor-based pressure sensor of claim 1, wherein: the doping material of the doped zinc oxide is selected from nitrogen or silver.
4. The junction-free field effect transistor-based pressure sensor of claim 1, wherein: and the source region, the drain region and the nanowire are obtained by etching after doping top silicon on the SOI substrate.
5. The junction-free field effect transistor-based pressure sensor of claim 1, wherein: the material of the medium wrapping layer is silicon dioxide.
6. The junction-free field effect transistor-based pressure sensor of any one of claims 1 to 5, wherein: the source region is composed of a source region conductive table top positioned at the lower part and a source electrode positioned at the upper part, and the drain region is composed of a drain region conductive table top positioned at the lower part and a drain electrode positioned at the upper part.
7. The method of making a junction-free field effect transistor pressure sensor of claim 6, comprising the steps of:
step 1: heavily doping the top silicon of the SOI substrate in an ion implantation mode;
step 2: carrying out rapid thermal annealing on the SOI substrate doped in the step 1 to activate doping atoms;
and step 3: manufacturing a source region conductive table-board, a drain region conductive table-board and the nano-wire on the SOI substrate obtained in the step 2 by adopting an electron beam etching mode;
and 4, step 4: growing a medium wrapping layer on the surfaces of the prepared source region conductive table top, the prepared drain region conductive table top and the prepared nanowires;
and 5: depositing the piezoelectric grid bars on the medium wrapping layer of the nano wires prepared in the step 4 along the direction vertical to the nano wires, and simultaneously doping in the deposition growth process of the piezoelectric grid bars;
step 6: and respectively preparing a source electrode, a drain electrode and a gate electrode on the medium wrapping layer corresponding to the source region conductive table top, the medium wrapping layer corresponding to the drain region conductive table top and the piezoelectric grid bar, thus finishing the preparation of the junction-free field effect transistor type pressure sensor.
8. The method for preparing the junction-free field effect transistor type pressure sensor according to claim 7, wherein before the step 4, the sacrificial oxidation is performed on the source region conductive mesa, the drain region conductive mesa and the nanowire prepared in the step 3, and the sacrificial oxidation specifically comprises the following operations: and (3) carrying out dry oxidation on the source region conductive table top, the drain region conductive table top and the nanowire prepared in the step (3) at 900-1000 ℃, generating a silicon dioxide oxidation layer on the whole surface, and then removing the silicon dioxide oxidation layer by using hydrofluoric acid.
9. The method for preparing the junction-free field effect transistor type pressure sensor according to claim 7, wherein the width of the nanowire prepared in the step 3 is 30-50 nm, and the height of the nanowire is 10-20 nm.
10. The method for preparing the junction-free field effect transistor pressure sensor according to claim 7, wherein in the step 4, the thickness of the medium wrapping layer is 5-10 nm.
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