Disclosure of Invention
The invention aims to provide a semiconductor device and a manufacturing method thereof, which can reduce the thickness of a wafer to a required thickness and avoid the abnormality of the process of the patterning treatment of the back surface of the wafer.
To achieve the above object, the present invention provides a method of manufacturing a semiconductor device, comprising: providing a wafer, wherein the wafer comprises a front surface and a back surface which are oppositely arranged, and the front surface of the wafer is provided with a film layer structure;
first thinning, namely grinding the back surface of the wafer to thin the wafer to a first thickness;
patterning the back surface of the wafer to form a patterned structure on the back surface of the wafer; and the number of the first and second groups,
and thinning for the second time, and integrally grinding the back surface of the wafer so as to thin the wafer to the second thickness.
Optionally, after the second thinning, cleaning the back side of the wafer.
Optionally, the first thickness is 300 μm to 450 μm, and the second thickness is 200 μm to 250 μm.
Optionally, the back surface of the wafer includes a chip region, and the chip region includes a plurality of chip unit regions; the patterning structure comprises a groove formed in the chip unit area.
Optionally, the groove penetrates through the wafer.
Optionally, the back side of the wafer further includes a support region.
Optionally, the step of patterning the back surface of the wafer includes: forming a patterned mask layer on the back surface of the wafer, wherein the patterned mask layer covers the support area to form a support structure in the support area; and etching the chip area to form the groove in the chip unit area of the chip area.
Optionally, the support structure includes at least two crossed support bars, and each support bar passes through the center of the wafer and two ends of the support bar face the edge of the wafer.
Optionally, the supporting strips are uniformly distributed on the back surface of the wafer.
Optionally, the support structure further includes a ring structure located at the peripheral edge of the wafer, and the ring structure includes at least one support ring intersecting with all the support bars.
Optionally, the width of the supporting strip is 1 mm-5 mm.
The invention also provides a semiconductor device manufactured by the manufacturing method of the semiconductor device, and the semiconductor device comprises a wafer part, wherein the wafer part is provided with a front surface and a back surface which are oppositely arranged, and the back surface of the wafer part is provided with a patterned structure.
Optionally, the semiconductor device is a MEMS microphone, and the patterned structure includes a back cavity of the MEMS microphone.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
1. according to the manufacturing method of the semiconductor device, the back surface of the wafer is ground, so that the wafer is thinned to a first thickness; patterning the back surface of the wafer to form a patterned structure on the back surface of the wafer; and integrally grinding the back of the wafer to enable the wafer to be thinned to a second thickness, and enabling the two-section thinning of the back of the wafer to enable the wafer to be thinned to the required thickness and simultaneously avoiding causing the abnormality of the process of the graphical processing of the back of the wafer.
2. According to the semiconductor device, due to the adoption of the manufacturing method of the semiconductor device, the wafer is thinned to the required thickness, and meanwhile, the yield of the semiconductor device is improved.
Detailed Description
To make the objects, advantages and features of the present invention more clear, the semiconductor device and the method for manufacturing the same proposed by the present invention are further described in detail with reference to fig. 1 to 9. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
An embodiment of the present invention provides a method for manufacturing a semiconductor device, and referring to fig. 1, fig. 1 is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention, the method for manufacturing a semiconductor device including: step S1, providing a wafer, wherein the wafer comprises a front side and a back side which are oppositely arranged, and the front side of the wafer is provided with a film layer structure;
step S2, thinning for the first time, grinding the back of the wafer to make the wafer thin to a first thickness;
step S3, the back of the wafer is processed in a graphical mode so as to form a graphical structure on the back of the wafer;
and step S4, thinning for the second time, and integrally grinding the back surface of the wafer to enable the wafer to be thinned to a second thickness.
The method for manufacturing the semiconductor device according to the present embodiment is described in more detail with reference to fig. 2 to 9, fig. 2 to 6 are schematic device diagrams in the method for manufacturing the semiconductor device shown in fig. 1, and fig. 2 to 6 are schematic cross-sectional views of a single chip on a wafer; fig. 7-9 are schematic top views of a supporting region on the back surface of a wafer according to an embodiment of the invention.
According to step S1, a wafer is provided, the wafer includes a front side and a back side opposite to each other, and the front side of the wafer has a film structure. As shown in fig. 2, the film structure 12 is located on the front side of the wafer 11, and the wafer 11 has an initial thickness h 0. The wafer may include device structures required by semiconductor devices, and the film layer structure may include a vibrating film or the like.
According to the step S2, the back surface of the wafer is ground for the first thinning, so that the wafer is thinned to the first thickness.
As shown in fig. 3, the back side of the wafer 11 is ground so that the wafer 11 is thinned from the initial thickness h0 to a first thickness h 1. The first thickness may be 300 μm to 450 μm (for example, 350 μm, 400 μm, etc.), and other suitable ranges may be selected according to the type and performance requirements of the manufactured semiconductor device. Compared with the wafer which is not thinned, after the wafer is thinned to the first thickness, the warpage of the wafer is increased, for example, to 150 to 250 μm, and at this time, the warpage of the wafer does not influence the subsequent manufacturing process, that is, the warpage of the wafer is within the acceptable specification of the subsequent process of performing the patterning process on the back surface of the wafer.
In addition, the method for grinding the back side of the wafer can comprise chemical mechanical grinding or physical grinding, or a method combining chemical mechanical grinding and physical grinding. The chemical mechanical polishing adopts the combined action of a polishing solution and a polishing head, so that the back surface of the polished wafer has good flatness, and the damage degree to the back surface of the wafer is low; the physical grinding can be carried out by adopting a grinding wheel, and the grinding speed is high. A suitable grinding method may be selected according to the process requirements for manufacturing the semiconductor device.
The back side of the wafer is patterned to form a patterned structure on the back side of the wafer, as per step S3.
The back side of the wafer comprises a chip area, and the chip area comprises a plurality of chip unit areas. After the back side of the wafer is subjected to patterning processing, the formed patterning structure comprises a groove formed in each chip unit area. As shown in fig. 4, the groove 14 penetrates through the wafer 11 to expose the back surface of the film layer structure 12, which is also a single chip unit area shown in fig. 4. In addition, the groove may not penetrate through the wafer, and whether the groove penetrates through the wafer may be selected according to the type of the semiconductor device to be manufactured; if the manufactured semiconductor device is an MEMS microphone, the groove penetrates through the wafer, and the groove is a back cavity of the MEMS microphone.
In addition, since the warpage of the wafer is increased after the groove is formed by patterning the back surface of the wafer, it is necessary to improve the patterning structure of the back surface of the wafer. Wherein the back side of the wafer may be configured to include a support region. The back surface of the wafer is provided with the supporting area, so that after the back surface of the wafer is subjected to graphical processing, the stress of the area where the supporting area is located is concentrated to support the wafer, the strength of the wafer is increased, the warping degree of the wafer is not increased, and the influence of the warping degree of the wafer on subsequent processes is avoided.
The support area is formed with a support structure, the support structure may include at least two crossed support bars, each support bar passing through the center of the wafer and both ends facing the edge of the wafer. The supporting strips can be uniformly distributed on the back of the wafer, so that the stress distribution of the region where the supporting strips are located is more uniform, and the warping direction of the wafer is more regular, thereby being more beneficial to subsequent processes. For example many the support bars constitute cross or meter font etc. as shown in fig. 7, two the support bars 16 evenly distributed in the back of wafer 11 is in order to constitute the cross, as shown in fig. 8, four the support bars 16 evenly distributed in the back of wafer 11 is in order to constitute meter font, and, meter font the bearing structure simulation umbrella skeleton makes the warpage of wafer is followed the center of wafer is along the direction of radius towards the edge of wafer is regular arc.
The support structure may further include a ring structure at a peripheral edge of the wafer, the ring structure including at least one support ring intersecting all of the support bars. As shown in fig. 9, the ring structure includes a support ring 17, and the support ring 17 is located at the edge of the wafer and intersects with all the support bars 16. Through setting up support ring in the annular structure couples together all support bars, makes the support district is right the supporting role of wafer further obtains improving, the intensity of wafer further obtains the increase, and then makes to the improvement effect of the angularity of wafer is more obvious.
The width of support bar can be 1mm ~5mm (for example be 2 mm, 3 mm, 4 mm etc.), the width that supports the ring also can be 1mm ~5mm (for example be 2 mm, 3 mm, 4 mm etc.), the support bar with support the width of ring is big more, then the support region is to the support effect that the wafer played is more obvious, then, to the improvement of the angularity of wafer is also more obvious. It should be noted that the widths of the supporting bars and the supporting rings are not limited to the above ranges, and an appropriate range may be selected according to the warp requirement of the wafer.
In addition, the step of patterning the back surface of the wafer comprises: forming a patterned mask layer on the back surface of the wafer, wherein the patterned mask layer covers the support area and part of the chip area so as to form the support structure in the support area; etching the chip area which is not covered by the mask layer to form the groove in each chip unit area of the chip area; and finally, removing the patterned mask layer. As shown in fig. 7 to 9, each chip unit region in the chip region 13 is etched to form the groove, and the supporting regions (i.e., the regions where the supporting bars 16 and the supporting rings 17 are located) are not etched. The material of the patterned mask layer can be photoresist or silicon nitride and the like. When the groove penetrates through the wafer, the wafer with the whole thickness is etched, the etching depth is deep, and the chip area can be etched by adopting a dry etching process; when the groove does not penetrate through the wafer, dry etching or wet etching can be selected according to the depth of the groove.
And according to the step S4, thinning for the second time, and grinding the back surface of the wafer integrally so as to thin the wafer to the second thickness, thereby forming the required semiconductor device. And integrally grinding the back surface of the wafer, namely grinding the region where the supporting region and the chip region are not provided with the grooves, so that the overall thickness of the wafer is reduced. As shown in fig. 5, the back side of the wafer 11 is entirely ground so that the wafer 11 is thinned from a first thickness h1 to a second thickness h 2. The second thickness may be 200 μm to 250 μm (e.g., 210 μm, 240 μm, etc.), and other suitable ranges may be selected according to the type and performance requirements of the manufactured semiconductor device.
The method for integrally polishing the back surface of the wafer may also include chemical mechanical polishing or physical polishing, or a method combining chemical mechanical polishing and physical polishing, which is referred to the step S2 and is not described herein again.
In addition, after the back surface of the wafer is entirely polished, there are many impurity particles (e.g., silicon dust) generated by polishing on the back surface of the wafer, and as shown in fig. 5, especially many impurity particles 15 are collected in the grooves 14, so that it is necessary to clean the back surface of the wafer to remove the impurity particles 15, thereby obtaining the semiconductor device shown in fig. 6. The back surface of the wafer may be cleaned by using a mixed acid solution, and the mixed acid solution may include hydrofluoric acid, a combination of nitric acid and acetic acid, a combination of hydrofluoric acid and hydrochloric acid, or the like.
As can be seen from the foregoing steps S1 to S4, the thinning process of the back surface of the wafer is divided into two-stage thinning, that is, the first thinning before the patterning process is performed on the back surface of the wafer and the second thinning after the patterning process is performed on the back surface of the wafer, so that when the wafer is thinned to a required thickness and the patterning process is performed on the back surface of the wafer, the warp of the wafer is within an acceptable specification of the patterning process, thereby avoiding causing an abnormality of the patterning process on the back surface of the wafer (for example, a large difference in CD between chips of the wafer and grooves).
In summary, the method for manufacturing a semiconductor device provided by the present invention includes: providing a wafer, wherein the wafer comprises a front surface and a back surface which are oppositely arranged, and the front surface of the wafer is provided with a film layer structure; first thinning, namely grinding the back surface of the wafer to thin the wafer to a first thickness; patterning the back surface of the wafer to form a patterned structure on the back surface of the wafer; and thinning for the second time, and integrally grinding the back surface of the wafer so as to thin the wafer to the second thickness. The manufacturing method of the semiconductor device can reduce the thickness of the wafer to the required thickness and avoid the abnormality of the process of the patterning treatment of the back surface of the wafer.
An embodiment of the invention provides a semiconductor device manufactured by the manufacturing method of the semiconductor device, and the semiconductor device comprises a wafer part, wherein the wafer part is provided with a front surface and a back surface which are oppositely arranged, the front surface of the wafer part is provided with a film layer structure, and the back surface of the wafer part is provided with a patterned structure. The manufacturing method of the semiconductor device provided by the invention is adopted for manufacturing, and specifically, the thinning process of the back surface of the wafer part is divided into two-stage thinning, namely, the first thinning before the patterning processing is carried out on the back surface of the wafer part and the second thinning after the patterning processing is carried out on the back surface of the wafer part, so that the warping degree of the wafer part can be within the acceptable specification of the patterning processing while the wafer part is thinned to the required thickness, the abnormity of the patterning processing process of the back surface of the wafer part (such as the large difference between the chips of the wafer and the CD of the groove) is avoided, and the yield of the semiconductor device is improved.
Wherein the semiconductor device may be a MEMS microphone. The membrane layer structure can comprise a vibrating membrane and a back plate of the MEMS microphone, a gap exists between the vibrating membrane and the back plate, and the vibrating membrane and the back plate are provided with sound holes of the MEMS microphone; the graphical structure comprises a back cavity of the MEMS microphone, the back cavity is communicated with the sound hole, and the back cavity and a gap between the vibrating membrane and the back polar plate provide a vibrating space for the vibrating membrane. The patterning structure can realize a back cavity of the MEMS microphone and can enable the wafer part to be thinned to the required thickness of the MEMS microphone. And, the film layer structure may further include other structures than the diaphragm and the back plate.
The backplate of the MEMS microphone may comprise a single backplate or a dual backplate. Compared with the wafer part with a single back plate, the wafer part with the double back plates is more brittle and has larger warpage, and after the back surface of the wafer part is subjected to patterning processing, the warpage is further increased to exceed the acceptable specification of the subsequent process, so that the problems of fragments and the like are caused. For the wafer part with the single back plate, if the warping degree is not increased to exceed the acceptable specification of the subsequent process after the back surface of the wafer part is subjected to the patterning treatment, a support area does not need to be arranged in the patterning structure, so that the cost is saved. For the specific description of the support region, refer to step S3, which is not described herein again.
In a MEMS microphone, the diaphragm and the backplate may constitute a parallel plate capacitor. When external sound pressure acts on the vibrating membrane through the back cavity, the vibration of the vibrating membrane can be caused, so that the distance between the vibrating membrane and the back pole plate is changed, the change of capacitance is generated, and operation and work are performed by utilizing the capacitance change quantity to finish the conversion of sound signals and electric signals.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.