CN111224867A - Intelligent gateway method based on multi-core heterogeneous hardware virtualization - Google Patents

Intelligent gateway method based on multi-core heterogeneous hardware virtualization Download PDF

Info

Publication number
CN111224867A
CN111224867A CN202010005255.2A CN202010005255A CN111224867A CN 111224867 A CN111224867 A CN 111224867A CN 202010005255 A CN202010005255 A CN 202010005255A CN 111224867 A CN111224867 A CN 111224867A
Authority
CN
China
Prior art keywords
operating system
partition
cpu
hardware
core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010005255.2A
Other languages
Chinese (zh)
Other versions
CN111224867B (en
Inventor
何照丹
耿杨
朱别明
崔博
赵章金
张凯
倪子豪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Adan Energy Information Technology Co Ltd
Shenzhen International Graduate School of Tsinghua University
Original Assignee
Shenzhen Adan Energy Information Technology Co Ltd
Shenzhen International Graduate School of Tsinghua University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Adan Energy Information Technology Co Ltd, Shenzhen International Graduate School of Tsinghua University filed Critical Shenzhen Adan Energy Information Technology Co Ltd
Priority to CN202010005255.2A priority Critical patent/CN111224867B/en
Publication of CN111224867A publication Critical patent/CN111224867A/en
Application granted granted Critical
Publication of CN111224867B publication Critical patent/CN111224867B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/66Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00Network architectures or network communication protocols for network security
    • H04L63/02Network architectures or network communication protocols for network security for separating internal from external traffic, e.g. firewalls

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention relates to the technical field of intelligent gateways, in particular to an intelligent gateway method based on multi-core heterogeneous hardware virtualization, which is characterized in that based on an imx8 multi-core heterogeneous processor, hardware partitions are carried out, a CPU core and peripheral equipment are distributed, the CPU is divided into a first partition and a second partition, an operating system is further arranged in the two partitions for virtualization, an intelligent gateway system based on hardware virtualization physically divides the multi-core heterogeneous CPU and the peripheral equipment into two hardware partitions by the hardware virtualization method, an intranet operating system and an extranet operating system are respectively arranged on the two hardware partitions, the intranet operating system and the extranet operating system carry out information interaction through a message hardware unit, thus ensuring that a wired gateway in a vehicle cannot be paralyzed due to external attack of a wireless gateway outside the vehicle, ensuring the driving safety, and simultaneously preventing hackers from obtaining physical signals of the message hardware unit, therefore, the information between the two systems can not be cracked, and the information exchange safety of the two systems is ensured.

Description

Intelligent gateway method based on multi-core heterogeneous hardware virtualization
Technical Field
The invention relates to the technical field of intelligent gateways, in particular to an intelligent gateway method based on multi-core heterogeneous hardware virtualization.
Background
The existing intelligent gateway has three types at present, wherein one type is that a single operating system runs on a CPU and belongs to a single system; the other type is that a plurality of operating systems run on a CPU through a software virtualization technology; still another type is a multi-CPU multi-os system that uses multiple CPUs to run multiple os. The existing intelligent gateway system is more and more complex, has more and more powerful functions, has higher and more requirements on the performance of a CPU, is safe and reliable, and can prevent the system from being disabled due to external invasion, so that the first type of single-CPU single-operation system can obviously not meet the requirements of the intelligent gateway with complex and powerful functions, and the system can not be used after being disabled; the second type is single-CPU software virtualization, and in the software virtualization solution, the position of the virtualization system software in the software suite is the position where the operating system is located in the traditional sense, and the position of the operating system is the position where the application program is located in the traditional sense; this additional layer of communication requires binary translation to simulate a hardware environment by providing an interface to physical resources such as processors, memory, storage, video and network cards, etc. Such a conversion necessarily increases the complexity of the system. Furthermore, the support of guest operating systems is limited by the capabilities of the virtual machine environment, which may prevent the deployment of certain technologies, such as 64-bit guest operating systems. In a pure software solution, the increased complexity of the software stack means that these environments are difficult to manage, thus adding to the difficulty of ensuring system reliability and security; in the third type of multi-CPU and multi-system intelligent gateway, because of the adoption of multiple CPUs, additional memories, hard disks, peripherals and the like are required outside the CPUs, so that the cost of the system is greatly increased, and meanwhile, the peripherals are communicated through the peripherals, so that information leakage is easily caused by hackers who monitor and crack through the board peripherals and physical signals, and the gateway is unsafe.
Disclosure of Invention
The invention aims to overcome the defects and shortcomings of the prior art and provides a multi-core heterogeneous hardware virtualization intelligent gateway system for virtualizing a CPU into two physically isolated hardware partitions.
The purpose of the invention is realized by the following technical scheme:
an intelligent gateway method based on multi-core heterogeneous hardware virtualization divides a multi-core heterogeneous CPU and a peripheral into two hardware subareas through a hardware virtualization method, an internal network operating system and an external network operating system are respectively installed on the two hardware subareas, the operating systems of the two hardware subareas are mutually independent and do not interfere with each other, the internal network operating system and the external network operating system carry out information interaction through a message hardware unit, the information interaction is that the internal network operating system and the external network operating system CAN be restarted to each other according to needs, the internal network operating system runs a wired gateway which is respectively in communication connection with a CAN/LIN module and an Ethernet module, the external network operating system runs a wireless gateway which is respectively in communication connection with a mobile network communication module and a V2X module, two physically isolated systems are virtualized through the multi-core heterogeneous hardware, and the communication safety between networks inside and outside a vehicle is ensured, the wired gateway in the vehicle can not be paralyzed due to external attack of the wireless gateway outside the vehicle, thereby ensuring the driving safety.
The hardware virtualization method operates as follows:
step 1) allocating a CPU core and a memory in an imx8 processor, dividing the CPU into a first partition and a second partition, wherein the CPU of the first partition performs instruction from a memory address 0x80000000, and the CPU of the second partition jumps to a memory address 0xC0000000 for instruction after instruction from 0x 80000000;
step 2) an outer network operating system and an inner network operating system are respectively installed in a first partition and a second partition, the inner network operating system and the outer network operating system are stored by adopting different EMCC modules, the inner network operating system and the outer network operating system both comprise uboot, kernel and a file system, and a bootloader bootstrap program is installed in the first partition, wherein the bootloader bootstrap program comprises two ARM trust firmware files which are respectively used for peripheral distribution when the first partition and the second partition are started;
step 3) powering on the intelligent gateway system, reading a bootloader bootstrap program from an EMMC module in a first partition by the intelligent gateway system, copying two ARM trust firmware files and uboot to memory addresses 0x80000000 and 0xC0000000 respectively, firstly operating a first CPU core of the first partition, then starting a first CPU core of a second partition, judging which partition is the core in the ARM trust firmware files, if the partition is the first CPU core, jumping to the first ARM trust firmware file address 0x80000000, operating the ARM trust firmware files for peripheral distribution, then jumping to the first uboot, and loading kenerl and a file system of an external network operating system; if the CPU core is the second CPU core, jumping to the address 0xC0000000 of the second ATF to run the second ATF, performing peripheral distribution, then jumping to the second uboot, and loading the kernel and the file system of the second linux system;
step 4), the extranet operating system of the first partition operates a mobile network communication module and a V2X module communication module;
and 5) operating the CAN/LIN module and the Ethernet module by the extranet operating system of the second partition.
Specifically, the intranet operating system and the extranet operating system are linux operating systems.
Specifically, the mobile network communication module is a 5G communication module.
Compared with the prior art, the invention has the following advantages and beneficial effects: the invention virtualizes two physically isolated systems by adopting multi-core heterogeneous hardware, one system runs the function of the in-vehicle wired gateway, and the other system is responsible for the function of the out-vehicle wireless gateway, thus ensuring that the in-vehicle wired gateway is not paralyzed due to the out-vehicle wireless gateway being attacked by the outside, ensuring the driving safety, simultaneously, the whole system only adopts a multi-core heterogeneous CPU, effectively reducing the cost and the complexity of the system, two hardware partitions virtualized by one CPU communicate through an internal message hardware unit, a hacker cannot acquire the physical signal of the message hardware unit, thereby failing to crack the message between the two systems, and ensuring the information exchange safety of the two systems.
Drawings
FIG. 1 is a flowchart of a hardware virtualization step according to the present invention.
Fig. 2 is a schematic diagram of an intelligent gateway method based on multi-core heterogeneous hardware virtualization according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited thereto.
The specific implementation process of the invention is as follows: as shown in fig. 1 to 2, an intelligent gateway method based on multi-core heterogeneous hardware virtualization physically divides a multi-core heterogeneous CPU and its peripheral into two hardware partitions by a hardware virtualization method, an intranet operating system and an extranet operating system are respectively installed on the two hardware partitions, the intranet operating system operates an in-vehicle wired gateway function, the extranet operating system operates an out-vehicle wireless gateway function, the operating systems of the two hardware partitions are independent and do not interfere with each other, it can be ensured that the in-vehicle wired gateway is not paralyzed by external attack received by the out-vehicle wireless gateway, driving safety is ensured, the intranet operating system and the extranet operating system perform information interaction through a message hardware unit, a hacker cannot acquire a physical signal of the message hardware unit, thus a message between the two systems cannot be cracked, and information exchange safety of the two systems is ensured, the information interaction is that an intranet operating system and an extranet operating system CAN mutually restart each other as required, the intranet operating system runs a wired gateway which is in communication connection with a CAN/LIN module and an Ethernet module respectively, the extranet operating system runs a wireless gateway which is in communication connection with a mobile network communication module and a V2X module respectively, two physically isolated systems of multi-core heterogeneous hardware virtualization are adopted, the communication safety between networks inside and outside the vehicle is ensured, the wired gateway inside the vehicle cannot be paralyzed due to external attack of the wireless gateway outside the vehicle, and the driving safety is ensured.
The hardware virtualization method operates as follows:
step 1) allocating a CPU core and a memory in an imx8 processor, dividing the CPU into a first partition and a second partition, wherein the CPU of the first partition performs instruction from a memory address 0x80000000, and the CPU of the second partition jumps to a memory address 0xC0000000 for instruction after instruction from 0x80000000, so that a system of the second partition can be operated through the steps; the multi-core heterogeneous processor is based on an NXPimx 8 processor, is provided with a plurality of CPU cores, can divide a part of CPU cores and CPU peripherals into a first partition by a hardware virtualization method, and divide the rest CPU cores and CPU peripherals into a second partition, wherein typical CPU peripherals comprise DDR, EMMC, UART, SPI, USB and the like;
step 2) an outer network operating system and an inner network operating system are respectively installed in a first partition and a second partition, the inner network operating system and the outer network operating system are stored by adopting different EMCC modules, the inner network operating system and the outer network operating system both comprise uboot, kernel and a file system, and a bootloader bootstrap program is installed in the first partition, wherein the bootloader bootstrap program comprises two ARM trust firmware files which are respectively allocated to the first partition and the second partition when the first partition and the second partition are started, so that the system safety is ensured; the bootloader bootstrap program consists of two ARM trust firmware bin files, two uboot bin files and a scu bin file, when the power is on, the bin file in the bootloader is split through the ROM firmware built in the CPU, the first ARM trust firmware and the first uboot are copied to the position of 0x80000000, the second ARM trust firmware and the second uboot are copied to the position of 0xC0000000, the scu bin file is copied to the memory built in the CPU,
step 3) powering on the intelligent gateway system, reading a bootloader bootstrap program from an EMMC module in a first partition by the intelligent gateway system, copying two ARM trust firmware files and uboot to memory addresses 0x80000000 and 0xC0000000 respectively, firstly operating a first CPU core of the first partition, then starting a first CPU core of a second partition, judging which partition is the core in the ARM trust firmware files, if the partition is the first CPU core, jumping to the first ARM trust firmware file address 0x80000000, operating the ARM trust firmware files for peripheral distribution, then jumping to the first uboot, and loading kenerl and a file system of an external network operating system; if the CPU core is the second CPU core, jumping to the address 0xC0000000 of the second ATF to run the second ATF, performing peripheral distribution, then jumping to the second uboot, and loading the kernel and the file system of the second linux system;
step 4), the extranet operating system of the first partition operates a mobile network communication module and a V2X module communication module; the mobile communication module is preferably a 5G communication module, and can realize remote firmware upgrading, remote fault diagnosis and information interaction functions by communicating with an external mobile network through the 5G communication module, and the V2X module can realize information interaction in multiple modes such as vehicle-to-vehicle, man-to-vehicle and vehicle-to-road and realize an auxiliary driving function, which is also an important technology called automatic driving.
Step 5) the external network operating system of the second partition runs the CAN/LIN module and the Ethernet module; the information interaction and routing between different CAN/LIN networks and the information interaction routing between the CAN/LIN and the Ethernet network are realized, the in-vehicle network and the out-vehicle wireless network are physically isolated, and the driving safety is ensured.
Specifically, the intranet operating system and the extranet operating system are linux operating systems.
Specifically, the mobile network communication module is a 5G communication module. The 5G communication module has the characteristics of high information transmission speed, low information communication delay and the like when transmitting information, and is suitable for being used in the field of intelligent gateways.
The operation of the extranet operating system and the intranet operating system can ensure that the extranet operating system and the intranet operating system are independent from each other and do not interfere with each other, the message interaction of the extranet operating system and the intranet operating system support is communicated through a message communication unit inside the processor, a hacker cannot analyze the interaction information between the two systems through external monitoring physical signals, the complexity of the system is reduced through hardware virtualization, and the safety and the reliability of the system are improved.
The above-mentioned embodiments only express the embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (3)

1. An intelligent gateway method based on multi-core heterogeneous hardware virtualization is characterized in that a multi-core heterogeneous CPU and peripheral equipment thereof are physically separated into two hardware partitions through the hardware virtualization method, an intranet operating system and an extranet operating system are respectively installed on the two hardware partitions, the intranet operating system and the extranet operating system carry out information interaction through a message hardware unit, the intranet operating system runs a wired gateway and is respectively in communication connection with a CAN/LIN module and an Ethernet module, and the extranet operating system runs a wireless gateway and is respectively in communication connection with a mobile network communication module and a V2X module.
The hardware virtualization method operates as follows:
step 1) allocating a CPU core and a memory in an imx8 processor, dividing the CPU into a first partition and a second partition, wherein the CPU of the first partition performs instruction from a memory address 0x80000000, and the CPU of the second partition jumps to a memory address 0xC0000000 for instruction after instruction from 0x 80000000;
step 2) an outer network operating system and an inner network operating system are respectively installed in a first partition and a second partition, the inner network operating system and the outer network operating system are stored by adopting different EMCC modules, the inner network operating system and the outer network operating system both comprise uboot, kernel and a file system, and a bootloader bootstrap program is installed in the first partition, wherein the bootloader bootstrap program comprises two ARM trust firmware files which are respectively used for peripheral distribution when the first partition and the second partition are started;
step 3) powering on the intelligent gateway system, reading a bootloader bootstrap program from an EMMC module in a first partition by the intelligent gateway system, copying two ARM trust firmware files and uboot to memory addresses 0x80000000 and 0xC0000000 respectively, firstly operating a first CPU core of the first partition, then starting a first CPU core of a second partition, judging which partition is the core in the ARM trust firmware files, if the partition is the first CPU core, jumping to the first ARM trust firmware file address 0x80000000, operating the ARM trust firmware files for peripheral distribution, then jumping to the first uboot, and loading kenerl and a file system of an external network operating system; if the CPU core is the second CPU core, jumping to the address 0xC0000000 of the second ATF to run the second ATF, performing peripheral distribution, then jumping to the second uboot, and loading the kernel and the file system of the second linux system;
step 4), the extranet operating system of the first partition operates a mobile network communication module and a V2X module communication module;
and 5) operating the CAN/LIN module and the Ethernet module by the extranet operating system of the second partition.
2. The intelligent gateway method based on multi-core heterogeneous hardware virtualization according to claim 1, wherein the intranet operating system and the extranet operating system are linux operating systems.
3. The intelligent gateway method based on multi-core heterogeneous hardware virtualization of claim 1, wherein the mobile network communication module is a 5G communication module.
CN202010005255.2A 2020-01-03 2020-01-03 Intelligent gateway method based on multi-core heterogeneous hardware virtualization Active CN111224867B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010005255.2A CN111224867B (en) 2020-01-03 2020-01-03 Intelligent gateway method based on multi-core heterogeneous hardware virtualization

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010005255.2A CN111224867B (en) 2020-01-03 2020-01-03 Intelligent gateway method based on multi-core heterogeneous hardware virtualization

Publications (2)

Publication Number Publication Date
CN111224867A true CN111224867A (en) 2020-06-02
CN111224867B CN111224867B (en) 2021-10-15

Family

ID=70829436

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010005255.2A Active CN111224867B (en) 2020-01-03 2020-01-03 Intelligent gateway method based on multi-core heterogeneous hardware virtualization

Country Status (1)

Country Link
CN (1) CN111224867B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113282344A (en) * 2021-05-25 2021-08-20 中国航空无线电电子研究所 Method for realizing weather operating system on Feiteng asymmetric dual-core processor
CN113301522A (en) * 2021-05-24 2021-08-24 招商局检测车辆技术研究院有限公司 Data processing method of transportation facility V2X gateway and transportation facility V2X gateway
CN114840335A (en) * 2022-04-22 2022-08-02 北京斯年智驾科技有限公司 Intelligent gateway controller in automatic driving field and multi-core division strategy thereof
CN115048226A (en) * 2022-08-15 2022-09-13 南京芯驰半导体科技有限公司 Virtual control system and method of multi-core heterogeneous processor
CN116709253A (en) * 2023-07-28 2023-09-05 成都赛力斯科技有限公司 Vehicle-mounted gateway and vehicle

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150007326A1 (en) * 2012-06-26 2015-01-01 Lynuxworks, Inc. Systems and Methods Involving Features of Hardware Virtualization Such as Separation Kernel Hypervisors, Hypervisors, Hypervisor Guest Context, Hypervisor Contest, Rootkit Detection/Prevention, and/or Other Features
CN107438849A (en) * 2016-03-29 2017-12-05 华为国际有限公司 For the system and method for the integrality for verifying electronic equipment
CN108037994A (en) * 2017-11-15 2018-05-15 中国电子科技集团公司第三十二研究所 Scheduling mechanism supporting multi-core parallel processing in heterogeneous environment
CN108959916A (en) * 2017-05-22 2018-12-07 华为技术有限公司 Methods, devices and systems for the access safety world

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150007326A1 (en) * 2012-06-26 2015-01-01 Lynuxworks, Inc. Systems and Methods Involving Features of Hardware Virtualization Such as Separation Kernel Hypervisors, Hypervisors, Hypervisor Guest Context, Hypervisor Contest, Rootkit Detection/Prevention, and/or Other Features
CN107438849A (en) * 2016-03-29 2017-12-05 华为国际有限公司 For the system and method for the integrality for verifying electronic equipment
CN108959916A (en) * 2017-05-22 2018-12-07 华为技术有限公司 Methods, devices and systems for the access safety world
CN108037994A (en) * 2017-11-15 2018-05-15 中国电子科技集团公司第三十二研究所 Scheduling mechanism supporting multi-core parallel processing in heterogeneous environment

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
GONG XIAOLI等: "Performance Overhead of Xen on Linux 3.13 on ARM Cortex-A7", 《2014 NINTH INTERNATIONAL CONFERENCE ON P2P, PARALLEL, GRID, CLOUD AND INTERNET COMPUTING》 *
JOE HYUNWOO等: "Dual display of virtual machines for automotive infotainment systems", 《2015 IEEE 4TH GLOBAL CONFERENCE ON CONSUMER ELECTRONICS (GCCE)》 *
洪春华: "基于虚拟化的列控安全计算机平台分区软件研究", 《中国优秀硕士学位论文全文数据库》 *

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113301522A (en) * 2021-05-24 2021-08-24 招商局检测车辆技术研究院有限公司 Data processing method of transportation facility V2X gateway and transportation facility V2X gateway
CN113282344A (en) * 2021-05-25 2021-08-20 中国航空无线电电子研究所 Method for realizing weather operating system on Feiteng asymmetric dual-core processor
CN113282344B (en) * 2021-05-25 2022-11-04 中国航空无线电电子研究所 Method for realizing weather operating system on Feiteng asymmetric dual-core processor
CN114840335A (en) * 2022-04-22 2022-08-02 北京斯年智驾科技有限公司 Intelligent gateway controller in automatic driving field and multi-core division strategy thereof
CN114840335B (en) * 2022-04-22 2023-10-27 北京斯年智驾科技有限公司 Intelligent gateway controller in automatic driving field and multi-core division strategy thereof
CN115048226A (en) * 2022-08-15 2022-09-13 南京芯驰半导体科技有限公司 Virtual control system and method of multi-core heterogeneous processor
CN116709253A (en) * 2023-07-28 2023-09-05 成都赛力斯科技有限公司 Vehicle-mounted gateway and vehicle
CN116709253B (en) * 2023-07-28 2023-10-17 成都赛力斯科技有限公司 Vehicle-mounted gateway and vehicle

Also Published As

Publication number Publication date
CN111224867B (en) 2021-10-15

Similar Documents

Publication Publication Date Title
CN111224867B (en) Intelligent gateway method based on multi-core heterogeneous hardware virtualization
CN108964959B (en) Network card direct connection system for virtualization platform and data packet supervision method
US9519795B2 (en) Interconnect partition binding API, allocation and management of application-specific partitions
US8447935B2 (en) Method and apparatus for facilitating communication between virtual machines
KR101952795B1 (en) Resource processing method, operating system, and device
US10747883B2 (en) Collated multi-image check in system-on-chips
US8051281B2 (en) Operating system startup control method and information processing apparatus
US10860332B2 (en) Multicore framework for use in pre-boot environment of a system-on-chip
US10599458B2 (en) Fabric computing system having an embedded software defined network
US20090249366A1 (en) Method, device, and system for seamless migration of a virtual machine between platforms with different i/o hardware
US11941259B2 (en) Communication method, apparatus, computer-readable storage medium, and chip
JP2017515225A (en) Coherent accelerator function separation method, system, and computer program for virtualization
US9658861B2 (en) Boot strap processor assignment for a multi-core processing unit
EP3436947B1 (en) Secure driver platform
CN115421854A (en) Storage system, method and hardware unloading card
US10003554B1 (en) Assisted sideband traffic management
CN112433826B (en) Hybrid heterogeneous virtualization communication method and chip
US11003618B1 (en) Out-of-band interconnect control and isolation
US20230342503A1 (en) Security Isolation Apparatus and Method
US20130007768A1 (en) Atomic operations on multi-socket platforms
US20200387396A1 (en) Information processing apparatus and information processing system
US20210232405A1 (en) Circuit and register to prevent executable code access
US9921867B2 (en) Negotiation between virtual machine and host to determine executor of packet flow control policy with reduced address space
US10037257B1 (en) Examining local hardware using a location-aware peripheral device
CN113419980A (en) Out-of-band management method, device, controller, system and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant