CN111211158A - Diode manufacturing method - Google Patents
Diode manufacturing method Download PDFInfo
- Publication number
- CN111211158A CN111211158A CN201811617371.9A CN201811617371A CN111211158A CN 111211158 A CN111211158 A CN 111211158A CN 201811617371 A CN201811617371 A CN 201811617371A CN 111211158 A CN111211158 A CN 111211158A
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- side wall
- active
- sidewall
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims abstract description 30
- 239000002184 metal Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 23
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 20
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 20
- 238000000151 deposition Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 8
- 230000003647 oxidation Effects 0.000 claims abstract description 7
- 238000005530 etching Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 description 5
- 239000012535 impurity Substances 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052790 beryllium Inorganic materials 0.000 description 2
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910020658 PbSn Inorganic materials 0.000 description 1
- 101150071746 Pbsn gene Proteins 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229960001948 caffeine Drugs 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- SAOPTAQUONRHEV-UHFFFAOYSA-N gold zinc Chemical compound [Zn].[Au] SAOPTAQUONRHEV-UHFFFAOYSA-N 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 208000024891 symptom Diseases 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
- RYYVLZVUVIJVGH-UHFFFAOYSA-N trimethylxanthine Natural products CN1C(=O)N(C)C(=O)C2=C1N=CN2C RYYVLZVUVIJVGH-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
- H01L29/945—Trench capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0688—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions characterised by the particular shape of a junction between semiconductor regions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention relates to a diode manufacturing method, which comprises the following steps: (1) an epitaxial layer and an oxide structure are sequentially deposited on a substrate. (2) The epitaxial layer is etched to form a plurality of active trenches and termination trenches by using the oxide structure, wherein the termination trenches have a first sidewall, a second sidewall and a bottom. (3) And performing a thermal oxidation procedure to deposit a trench oxide layer to cover the side wall and the bottom of each active trench, the first side wall, the second side wall and the bottom. (4) And depositing a semiconductor layer on each active groove, the first side wall and the second side wall, thereby filling the semiconductor layer in each active groove and covering the first side wall and the second side wall. (5) And depositing a metal silicide layer on each active groove, wherein the metal silicide layer partially covers the semiconductor layers on the first side wall and the second side wall. Compared with the prior art, the invention reduces the procedures of arranging the insulating layer to finish the manufacture of the diode, thereby achieving the purposes of simplifying the manufacture procedures of the diode and reducing the manufacture cost.
Description
Technical Field
The present invention relates to a semiconductor manufacturing method, and more particularly, to a diode manufacturing method with the advantage of simplified manufacturing process.
Background
With the advancement of electronic technology and the miniaturization trend of electronic products, more and more electronic components are being manufactured by using integrated circuit processes, however, the electronic components in the form of integrated circuits need to consider many aspects, such as voltage endurance, mutual interference or noise immunity.
The diode plays an important role in the circuit, because the diode has the characteristics of forward conduction and reverse cut-off, the manufacturing method of the diode is too complicated due to the design requirement of the diode, and how to solve the above-mentioned symptoms becomes a problem to be solved.
In view of the foregoing, the present inventors have devised and designed a method for manufacturing a diode, so as to improve the shortcomings of the prior art and further enhance the industrial application.
Disclosure of Invention
The present invention is directed to a method for manufacturing a diode, which is used to solve the problems encountered in the semiconductor manufacturing industry.
The technical scheme of the invention is as follows:
a method of manufacturing a diode, comprising:
depositing an epitaxial layer on a substrate;
depositing an oxide structure on the epitaxial layer;
etching the epitaxial layer by utilizing the arrangement of the oxidation structure to form a plurality of active trenches and termination trenches, wherein the termination trenches are provided with a first side wall, a second side wall and a bottom;
performing a thermal oxidation procedure to deposit a trench oxide layer to cover the side wall and the bottom of each active trench, the first side wall, the second side wall and the bottom;
depositing a semiconductor layer on each active groove, the first side wall and the second side wall, thereby filling the semiconductor layer in each active groove and covering the first side wall and the second side wall; and
and depositing a metal silicide layer on each active groove, wherein the metal silicide layer covers the semiconductor layers on the first side wall and the second side wall.
Preferably, the method further comprises defining a plurality of active trenches as active regions, wherein the first sidewall is close to the active regions and the second sidewall is far from the active regions.
Preferably, the method further comprises depositing a metal electrode on the metal silicide layer of each active trench, wherein the metal electrode partially covers the metal silicide layer of the first sidewall and the second sidewall.
Preferably, the method further comprises depositing a back electrode under the substrate.
Preferably, the oxide structure is comprised of a plurality of oxide masks.
Preferably, the width of the termination trench is greater than the width of each active trench.
The invention has the beneficial effects that:
compared with the prior art, the diode manufacturing method of the invention finishes the manufacturing of the diode by reducing the procedures of arranging the insulating layer, and achieves the purposes of simplifying the manufacturing procedures of the diode and reducing the manufacturing cost.
Drawings
FIG. 1 is a flow chart of the present invention.
Wherein: 10-a substrate; 20-epitaxial layer; 30-an oxidized structure; 31-oxidation shielding; 40-active trenches; 41-trench oxide layer; 42-a semiconductor layer; 50-a termination trench; 60-metal silicide layer; 70-a metal electrode; 80-a back electrode; BTM-bottom; s1 — a first sidewall; s2 — a second sidewall; w1 — width of active trench; w2-width of termination trench.
Detailed Description
The invention is further described below with reference to the figures and examples.
While the present invention may be embodied in many different forms, there is no intent to limit it to the embodiment disclosed herein, but on the contrary, it is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
As shown in fig. 1, a method for manufacturing a diode includes (1) S11: the epitaxial layer 20 and the oxide structure 30 are sequentially deposited on the substrate 10, wherein the oxide structure 30 is composed of a plurality of oxide masks 31, the oxide structure 30 can be disposed by exposure, development and mask arrangement, and the distance between the oxide masks 31 is different according to the diode design, and the number of the oxide masks 31 and the distance therebetween are not limited. (2) And step S12: determining the positions of the active trenches 40 and the termination trenches 50 by using the oxide structure 30, and defining the active trenches 40 as active regions and the termination trenches 50 as termination regions, thereby etching the epitaxial layer 20 to form the active trenches 40 and the termination trenches 50, wherein the termination trenches 50 have a first sidewall S1, a second sidewall S2 and a bottom BTM, the first sidewall S1 is close to the active regions, the second sidewall S2 is far from the active regions, and the width W2 of the termination trenches 50 is greater than the width W1 of each of the active trenches 40; a thermal oxidation process is performed to deposit a trench oxide layer 41 covering the sidewalls and bottom of each active trench 40, the first sidewalls S1, the second sidewalls S2, and the bottom BTM. (3) And step S13: the semiconductor layer 42 is deposited on each active trench 40, the first sidewall S1 and the second sidewall S2, so that the semiconductor layer 42 is filled in each active trench 40 and covers the first sidewall S1 and the second sidewall S2. (4) And step S14: a metal silicide layer 60 is deposited on each active trench 40, and the metal silicide layer 60 partially covers the semiconductor layer 42 on the first sidewall S1 and the second sidewall S2. (5) And step S15: a metal electrode 70 is deposited on the metal silicide layer 60 of each active trench 40, the metal electrode 70 partially covers the metal silicide layer 60 of the first sidewall S1 and the second sidewall S2, and a back electrode 80 is deposited under the substrate 10. Compared with the prior art, the diode manufacturing method of the invention finishes the manufacturing of the diode by reducing the procedures of arranging the insulating layer, and achieves the purposes of simplifying the manufacturing procedures of the diode and reducing the manufacturing cost.
It should be noted that the deposition of the metal electrode 70 and the back electrode 80 can also be achieved by electroless plating, and specifically, due to the arrangement of the trench oxide layer 41 terminating the trench 50, the conductivity of the trench oxide layer 41 is poor, and the conductivity of the metal silicide layer 60 is relatively high, so that the metal electrode 70 is selectively deposited on the metal silicide layer 60 of the active trench 40 instead of on the trench oxide layer 41, and the back electrode 80 is deposited under the substrate 10 by the electroless plating method.
In addition, the following can be set for the diode manufactured by the method of the present invention: therein, theIn an embodiment, the substrate 10 is a silicon substrate, the epitaxial layer 20 can be n-type or p-type, the n-type and p-type are achieved by doping impurities into a semiconductor material, the semiconductor material is silicon, the impurities are group iii elements or group v elements, and the doping impurities can be achieved by diffusing the impurities into the semiconductor material at a high temperature through an ion implantation value or a solid diffusion source or a liquid diffusion source; the material of semiconductor layer 42 includes polysilicon; the material of the trench oxide layer 41 and the plurality of oxidation shields 31 includes silicon dioxide (SiO)2) (ii) a The metal silicide layer 60 is composed of a metal silicide; the metal material of the metal silicide layer 60, the metal electrode 70, and the back electrode 80 include at least one of indium (In), tin (Sn), aluminum (Al), gold (Au), platinum (Pt), indium (In), zinc (Zn), germanium (Ge), silver (Ag), lead (Pb), palladium (Pd), copper (Cu), gold beryllium (AuBe), germanium beryllium (BeGe), nickel (Ni), lead tin (PbSn), chromium (Cr), gold zinc (AuZn), titanium (Ti), tungsten (W), and titanium Tungsten (TiW).
In summary, compared with the prior art, the diode manufacturing method of the present invention has the advantages of completing the diode manufacturing with less insulating layer setting procedures, achieving the purposes of simplifying the diode manufacturing procedures and reducing the manufacturing cost, and thus being applicable to the semiconductor manufacturing industry.
The parts not involved in the present invention are the same as or can be implemented using the prior art.
Claims (6)
1. A method of manufacturing a diode, comprising:
depositing an epitaxial layer on a substrate;
depositing an oxide structure on the epitaxial layer;
etching the epitaxial layer by utilizing the arrangement of the oxidation structure to form a plurality of active trenches and termination trenches, wherein the termination trenches are provided with a first side wall, a second side wall and a bottom;
performing a thermal oxidation procedure to deposit a trench oxide layer to cover the sidewalls and bottom of each active trench, the first sidewalls, the second sidewalls, and the bottom;
depositing a semiconductor layer in each of the active trenches, the first sidewall and the second sidewall, thereby filling the semiconductor layer in each of the active trenches and covering the first sidewall and the second sidewall; and
and depositing a metal silicide layer on each active groove, wherein the metal silicide layer covers the semiconductor layers on the first side wall and the second side wall.
2. The method of claim 1, further comprising defining the plurality of active trenches as active regions, wherein the first sidewall is proximate to the active regions and the second sidewall is distal to the active regions.
3. The method of claim 1 further comprising depositing a metal electrode on the metal silicide layer of each active trench, wherein the metal electrode partially covers the metal silicide layer of the first sidewall and the second sidewall.
4. The method of claim 1 further comprising depositing a back electrode under the substrate.
5. The method of claim 1 wherein the oxide structure is comprised of a plurality of oxide masks.
6. The method of claim 1 wherein the width of the termination trench is greater than the width of each of the active trenches.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107141520 | 2018-11-21 | ||
| TW107141520A TWI726260B (en) | 2018-11-21 | 2018-11-21 | Manufacture method of diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111211158A true CN111211158A (en) | 2020-05-29 |
| CN111211158B CN111211158B (en) | 2023-06-16 |
Family
ID=70728387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811617371.9A Active CN111211158B (en) | 2018-11-21 | 2018-12-28 | Diode manufacturing method |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20200161444A1 (en) |
| CN (1) | CN111211158B (en) |
| TW (1) | TWI726260B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI784335B (en) * | 2020-10-30 | 2022-11-21 | 台灣奈米碳素股份有限公司 | A method for manufacturing three-dimensional semiconductor diode device |
| TWI742902B (en) * | 2020-10-30 | 2021-10-11 | 台灣奈米碳素股份有限公司 | A method for manufacturing semiconductor device by plasma-enhanced atomic layer deposition |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070290234A1 (en) * | 2006-06-16 | 2007-12-20 | Chip Integration Tech. Co., Ltd. | High switching speed two mask schottky diode with high field breakdown |
| US20130207172A1 (en) * | 2012-02-13 | 2013-08-15 | Force Mos Technology Co. Ltd. | Trench mosfet having a top side drain |
| CN105720109A (en) * | 2014-12-05 | 2016-06-29 | 无锡华润上华半导体有限公司 | Groove type Schottky barrier diode and preparation method thereof |
| US20170148927A1 (en) * | 2015-11-20 | 2017-05-25 | Lite-On Semiconductor Corp. | Diode device and manufacturing method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102008045410B4 (en) * | 2007-09-05 | 2019-07-11 | Denso Corporation | Semiconductor device with IGBT with built-in diode and semiconductor device with DMOS with built-in diode |
-
2018
- 2018-11-21 TW TW107141520A patent/TWI726260B/en active
- 2018-12-28 CN CN201811617371.9A patent/CN111211158B/en active Active
-
2019
- 2019-11-04 US US16/673,744 patent/US20200161444A1/en not_active Abandoned
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070290234A1 (en) * | 2006-06-16 | 2007-12-20 | Chip Integration Tech. Co., Ltd. | High switching speed two mask schottky diode with high field breakdown |
| US20130207172A1 (en) * | 2012-02-13 | 2013-08-15 | Force Mos Technology Co. Ltd. | Trench mosfet having a top side drain |
| CN105720109A (en) * | 2014-12-05 | 2016-06-29 | 无锡华润上华半导体有限公司 | Groove type Schottky barrier diode and preparation method thereof |
| US20170148927A1 (en) * | 2015-11-20 | 2017-05-25 | Lite-On Semiconductor Corp. | Diode device and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111211158B (en) | 2023-06-16 |
| US20200161444A1 (en) | 2020-05-21 |
| TWI726260B (en) | 2021-05-01 |
| TW202020984A (en) | 2020-06-01 |
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