CN111211137A - Display panel and display device - Google Patents

Display panel and display device Download PDF

Info

Publication number
CN111211137A
CN111211137A CN202010031252.6A CN202010031252A CN111211137A CN 111211137 A CN111211137 A CN 111211137A CN 202010031252 A CN202010031252 A CN 202010031252A CN 111211137 A CN111211137 A CN 111211137A
Authority
CN
China
Prior art keywords
drain electrode
electrode layer
source drain
display panel
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010031252.6A
Other languages
Chinese (zh)
Other versions
CN111211137B (en
Inventor
张祎杨
赵广洲
张震
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202010031252.6A priority Critical patent/CN111211137B/en
Publication of CN111211137A publication Critical patent/CN111211137A/en
Application granted granted Critical
Publication of CN111211137B publication Critical patent/CN111211137B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals

Abstract

The invention provides a display panel and a display device, wherein the display panel comprises: the substrate comprises a display area, a non-display area surrounding the display area and a binding area surrounding part of the non-display area; a blocking dam disposed around the non-display area; a first source drain electrode layer and a second source drain electrode layer which are sequentially stacked on the substrate base plate, wherein the first source drain electrode layer and the second source drain electrode layer sequentially penetrate through the blocking dam; in the area of the non-display area close to the binding area, the first source drain electrode layer comprises a first part and a second part which are arranged at intervals, the second source drain electrode layer is of an integral layer structure, the second source drain electrode layer and the second part are electrically connected to form a low potential wire, and the first part forms a high potential wire. The method is used for avoiding the generation of defects caused by the corrosion of the side surface of the source drain electrode layer, and the yield of the display panel is improved.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
In the field of Display technology, compared with a Liquid Crystal Display (LCD), an Organic Light Emitting Diode (OLED) Display panel is widely applied to Display devices such as vehicles, mobile phones, tablets, and computers, due to the advantages of self-luminescence, low energy consumption, low production cost, wide viewing angle, high contrast, fast response speed, more vivid color Display, and easier realization of Light, thin, and flexible.
The mainstream driving mode of the OLED is current driving, working current is transmitted from a lower frame (frame area) of the display panel through a Source Drain (Source/Drain, SD), and since SD has a certain resistance, signal transmission has a resistance drop (irddrop) phenomenon, which finally causes the display panel to have uneven brightness, and affects the use performance of the product.
At present, a dual-layer SD structure is often used to ensure the brightness uniformity of the display panel. Specifically, the OLED display panel comprises two layers of source and drain electrode layers which are stacked up and down, and an anode layer arranged on the two layers of source and drain electrode layers, and the voltage drop is controlled through a parallel circuit, so that the phenomenon of uneven brightness of a product is improved. However, in the process of forming the pattern of the anode layer on the pattern of the uppermost source/drain electrode layer, the side edge of the uppermost source/drain electrode layer is easily corroded by the wet etching solution, and is abnormal during Chemical Vapor Deposition (CVD), which results in package failure, and further causes water and oxygen from the outside to easily enter the display region along the boundary of the source/drain electrode layer, thereby causing a black spot defect, and reducing the yield of the display panel.
Disclosure of Invention
The invention provides a display panel and a display device, which are used for avoiding the generation of defects caused by the corrosion of the side surface of a source drain electrode layer and improving the yield of the display panel.
In a first aspect, an embodiment of the present invention provides a display panel, including:
the substrate comprises a display area, a non-display area surrounding the display area and a binding area surrounding part of the non-display area;
a blocking dam disposed around the non-display area;
a first source drain electrode layer and a second source drain electrode layer which are sequentially stacked on the substrate base plate, wherein the first source drain electrode layer and the second source drain electrode layer sequentially penetrate through the blocking dam;
in the area of the non-display area close to the binding area, the first source drain electrode layer comprises a first part and a second part which are arranged at intervals, the second source drain electrode layer is of an integral layer structure, the second source drain electrode layer and the second part are electrically connected to form a low potential wire, and the first part forms a high potential wire.
In some possible embodiments, an inorganic insulating layer is disposed between the first source-drain electrode layer and the second source-drain electrode layer in a region where the non-display region is close to the binding region.
In some possible embodiments, an organic insulating layer is disposed between the first portion and the second portion.
In some possible embodiments, an organic insulating layer is disposed between the blocking dam and the second portion.
In some possible embodiments, the blocking dam includes a first blocking dam adjacent to the display area and a second blocking dam distant from the display area, and an organic insulating layer is disposed between the second blocking dam and the second portion.
In some possible embodiments, the high potential trace transmits a VDD signal, and the low potential trace transmits a VSS signal.
In some possible embodiments, the organic insulating layer is sequentially provided with an anode layer and an encapsulation layer.
In some possible embodiments, the first source drain electrode layer and the second source drain electrode layer are both made of a titanium/aluminum/titanium composite material.
In some possible embodiments, in an area of the non-display area except for an area near the binding area, the first source drain electrode layer and the second source drain electrode layer form the low potential trace.
In a second aspect, embodiments of the present invention further provide a display device, including the display panel as described above.
The invention has the following beneficial effects:
according to the display panel and the display device provided by the embodiment of the invention, the first source drain electrode layer and the second source drain electrode layer are sequentially laminated on the substrate, so that the second source drain electrode layer can wrap the first source drain electrode layer and sequentially penetrate through the first source drain electrode layer and the second source drain electrode layer of the blocking dam, in an area of the non-display area close to the binding area, the first source drain electrode layer comprises the first part and the second part which are arranged at intervals, the second source drain electrode layer is of a whole-layer structure, the second source drain electrode layer is electrically connected with the second part to form low-potential wiring, and the first part forms high-potential wiring. In the area of the non-display area close to the binding area, the second source drain electrode layer is of an integral layer structure without an outer boundary, so that the side surface of the boundary of the first source drain electrode layer and the second source drain electrode layer cannot be corroded in the subsequent preparation process. Moreover, the signal routing comprises a double-layer structure, and the side face of the double-layer structure is provided with effective protective measures, so that the source drain electrode layer is prevented from being bad due to the fact that the side face is corroded, and the yield of the display panel is improved.
Drawings
FIG. 1 is a schematic diagram of a double-layer SD structure in the related art;
FIG. 2 is a FIB diagram of region 1 corresponding to the boundary of SD2 in FIG. 1;
fig. 3 is a schematic diagram illustrating a region division of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic cross-sectional view taken along aa' of FIG. 3;
FIG. 5 is a schematic view of one of the cross-sectional structures along the direction aa' in FIG. 3;
FIG. 6 is a schematic view of a cross-sectional view taken along the direction bb' in FIG. 3;
FIG. 7 is a schematic view of a cross-sectional view taken along the direction bb' in FIG. 3;
fig. 8 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention, where a boundary side surface of a second source drain electrode layer is corroded;
fig. 9 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention, where a boundary side surface of a second source drain electrode layer is corroded to cause a failure;
fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. And the embodiments and features of the embodiments may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the present application do not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
It should be noted that the sizes and shapes of the figures in the drawings are not to be considered true scale, but are merely intended to schematically illustrate the present invention. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.
As shown in fig. 1, specifically, the OLED display panel includes two source/drain electrode layers SD1 and SD2 stacked up and down, where a VDD trace and a VSS trace penetrating through a barrier DAM (DAM) are formed through SD1 and SD2, respectively, and since the organic layers are prone to absorb water and oxygen, organic layers such as a Planarization Layer (PLN) and a Pixel Definition Layer (PDL) are often required to be removed on both sides of the DAM, so that the boundaries of the two source/drain electrode layers forming the VDD trace and the VSS trace are exposed outside, when an anode pattern is formed on the two source/drain electrode layers, lateral corrosion easily occurs at the boundaries, which results in package failure, and water and oxygen enter a display region along the boundaries of the two source/drain electrode layers (for example, the position marked by region 1 in fig. 1), thereby affecting the yield of the display panel. As shown in fig. 2, which is a Focused Ion Beam (FIB) diagram of the region 1 corresponding to the boundary of SD2 in fig. 1, it is obvious that side etching occurs at the boundary of SD2, which results in package failure.
In view of this, embodiments of the present invention provide a display panel and a display device, which are used to avoid the occurrence of defects caused by the corrosion of the side surface of the source/drain electrode layer, and to improve the yield of the display panel.
Referring to fig. 3 to 6, in which fig. 3 is a schematic diagram illustrating a region division of a display panel according to an embodiment of the present invention, and fig. 4 is a schematic diagram illustrating a cross-sectional structure of the display panel along the direction aa' in fig. 3, specifically, the display panel includes:
the display device comprises a substrate base plate 10, wherein the substrate base plate 10 comprises a display area A, a non-display area B surrounding the display area A and a binding area C surrounding part of the non-display area B;
a barrier dam 20 disposed around the non-display area B;
a first source drain electrode layer 30 and a second source drain electrode layer 40 which sequentially penetrate through the blocking dam 20;
in the area of the non-display area B close to the binding area C, the first source-drain electrode layer 30 includes a first portion 301 and a second portion 302 which are arranged at intervals, the second source-drain electrode layer 40 is of an integral layer structure, the second source-drain electrode layer 40 and the second portion 302 are electrically connected to form a low potential trace, and the first portion 301 forms a high potential trace.
In the display panel, in the area of the non-display area B close to the binding area C, the first source-drain electrode layer 30 is covered by the second source-drain electrode layer 40, and the second source-drain electrode layer 40 is of an integral structure, so that the second source-drain electrode layer 40 has no outer boundary, and thus, the side surface of the boundary between the first source-drain electrode layer 30 and the second source-drain electrode layer 40 cannot be corroded in the subsequent preparation process. In the specific implementation process, the signal wiring comprises a double-layer structure, and the side face of the double-layer structure is provided with effective protective measures, so that the source drain electrode layer is prevented from being bad due to the fact that the side face is corroded, and the yield of the display panel is improved.
In a specific implementation process, the first source drain electrode layer 30 and the second source drain electrode layer 40 are sequentially stacked on the substrate base plate 10, so that the second source drain electrode layer 40 protects the first source drain electrode layer 30 to a certain extent, and side corrosion of the first source drain electrode layer 30 is avoided.
Specifically, in the area of the non-display region B near the binding region C, an inorganic insulating layer 50 is disposed between the first source/drain electrode layer 30 and the second source/drain electrode layer 40, that is, after the first source/drain electrode layer is formed on the substrate 10, the inorganic insulating layer 50 is formed on the first source/drain electrode layer, and then the second source/drain electrode layer 40 is formed on the inorganic insulating layer 50. The inorganic insulating layer 50 may be a passivation layer (PVX), and the material thereof may include silicon oxide (SiO)x) Or silicon nitride (SiN)x) And the like. The inorganic insulating layer 50 is mainly used for insulation between the first source drain electrode layer 30 and the second source drain electrode layer 40, and also plays a role in protecting the first source drain electrode layer 30.
In the embodiment of the present invention, as shown in fig. 6, which is one of the cross-sectional views along the bb' direction in fig. 3, specifically, an organic insulating layer 60 is disposed between the first portion 301 and the second portion 302, and the organic insulating layer 60 plays a role of flattening and protecting the underlying metal electrode and the trace.
In the embodiment of the present invention, as shown in fig. 7, which is one of the cross-sectional views along the direction bb' in fig. 3, specifically, the barrier dam 20 includes a first barrier dam 201 close to the display area a and a second barrier dam 202 far from the display area a, and the organic insulating layer 60 is disposed between the second barrier dam 202 and the second portion 302. The organic insulating layer 60 may belong to the same film layer as the organic insulating layer 60 between the first portion 301 and the second portion 302, so that the organic insulating layer can be reused during manufacturing, and the manufacturing process cost is saved. In addition, since the organic insulating layer 60 is disposed only between the second blocking dam 202 and the second portion 302, that is, the organic insulating layer 60 is patterned, even if the organic insulating layer 60 is liable to absorb water and oxygen, the water and oxygen cannot enter the display area a along the organic insulating layer 60, thereby improving the yield of the display panel.
In the embodiment of the invention, the high potential wire transmits a VDD signal, and the low potential wire transmits a VSS signal. In a specific implementation process, the first portion 301 and the second portion 302 may be respectively used to implement different functional signals, specifically, the first portion 301 may be used as a VDD electrode, the second portion 302 may be used as a VSS electrode, and the two electrodes respectively implement different functional signals.
In the embodiment of the present invention, still referring to fig. 7, the anode layer 70 and the encapsulation layer 80 are sequentially disposed on the organic insulating layer 60, and the organic insulating layer 60 completely covers the edge of the second source/drain electrode layer, so that when the anode layer 70 is formed on the organic insulating layer 60, the side corrosion of the second source/drain electrode layer is effectively avoided. The encapsulation layer 80 includes a first inorganic layer, an organic layer and a second inorganic layer, which are sequentially stacked, wherein the material of the organic layer may be parylene, and the material of the first inorganic layer and the second inorganic layer may be silicon nitride, silicon dioxide, and the like. In the specific implementation process, the packaging layer 80 can effectively prevent the water and oxygen from damaging the display panel, thereby effectively preventing the external water and oxygen from entering the display area A along the anode layer 70 through the packaging layer 80, avoiding bad display and prolonging the service life of the display panel.
In the embodiment of the present invention, the first source drain electrode layer 30 and the second source drain electrode layer 40 are made of the same material, and are both a titanium/aluminum/titanium (Ti/Al/Ti) composite material, and are shown in fig. 8 and fig. 9, where fig. 8 is a schematic cross-sectional structure diagram of a display panel provided in the embodiment of the present invention when a boundary side of the second source drain electrode layer is corroded, and fig. 9 is a schematic cross-sectional structure diagram of a display panel provided in the embodiment of the present invention when a boundary side of the second source drain electrode layer is corroded to generate a bad condition, specifically, the second source drain electrode layer includes two titanium material layers 401 and an aluminum material layer 402 located between the two titanium material layers 401.
In a specific implementation process, as shown in fig. 8, when the side surface of the second source drain electrode layer is exposed, the aluminum material layer 402 in the middle of the source drain electrode layer is easily corroded laterally, which causes the titanium material layer 401 in the top layer to be suspended, as shown in fig. 9, in a subsequent high-voltage process, the edge of the titanium material layer 401 in the top layer is easily peeled off, which generates metal particles 90 (particles), and if the peeled metal particles 90 remain at the signal line, a short circuit occurs, which causes poor display. As shown in fig. 5, in the embodiment of the present invention, the second source/drain electrode layer has no side surface, and the side surface of the first source/drain electrode layer is covered and protected by the organic insulating layer 60, so that the occurrence of the defects caused by the above corrosion condition is effectively avoided.
In the embodiment of the invention, in the area of the non-display area B except the area close to the binding area C, the first source drain electrode layer and the second source drain electrode layer form low-potential wiring, so that the display uniformity of the whole screen display of the display panel is ensured.
In the embodiment of the invention, the display panel is provided with two layers of SD signal wires, so that the wire thickness is increased, the resistance of the wires is reduced, namely, the resistance voltage drop is reduced, the attenuation of signals is reduced, and the display uniformity is improved.
In the embodiment of the present invention, as shown in fig. 7, the thickness of the passivation layer (inorganic insulating layer 50) may be thinner than that of the organic planarization layer (organic insulating layer 60), and in a specific implementation process, the passivation layer is used to protect the first source/drain electrode layer, so that influence on routing binding (Bonding) due to a thicker edge of the high-potential routing line can be avoided.
In the embodiment of the present invention, the bonding region C may be a flexible circuit board bonding region (FOP) or a chip bonding region, in a specific implementation process, the substrate 10 includes two or more bonding regions C, and an area of each bonding region C close to the non-display region B is set by using the implementation manner in the above embodiment, which is not described in detail herein.
In the embodiment of the present invention, the display panel may further include a Thin Film Transistor (TFT) array structure layer (other structure layers except for two layers of source and drain electrodes), an organic electroluminescent layer, and a spacer (PS), which are not described in detail herein.
Based on the same inventive concept, as shown in fig. 10, an embodiment of the present invention further provides a display device, including: the display panel 100 as described in any of the above.
The principle of the display device to solve the problem is similar to the display panel, so the implementation of the display device can be referred to the implementation of the display panel, and repeated details are not repeated.
In a specific implementation process, the display device provided in the embodiment of the present invention may be a mobile phone as shown in fig. 10, and certainly, the display device provided in the embodiment of the present invention may also be any product or component having a display function, such as a tablet computer, a television, a display, a notebook computer, a digital photo frame, and a navigator. Other essential components of the display device are understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present invention.
According to the display panel and the display device provided by the embodiment of the invention, the first source drain electrode layer and the second source drain electrode layer are sequentially laminated on the substrate, so that the second source drain electrode layer can wrap the first source drain electrode layer and sequentially penetrate through the first source drain electrode layer and the second source drain electrode layer of the blocking dam, in an area of the non-display area close to the binding area, the first source drain electrode layer comprises the first part and the second part which are arranged at intervals, the second source drain electrode layer is of a whole-layer structure, the second source drain electrode layer is electrically connected with the second part to form low-potential wiring, and the first part forms high-potential wiring. In the area of the non-display area close to the binding area, the second source drain electrode layer is of an integral layer structure without an outer boundary, so that the side surface of the boundary of the first source drain electrode layer and the second source drain electrode layer cannot be corroded in the subsequent preparation process. Moreover, the signal routing comprises a double-layer structure, and the side face of the double-layer structure is provided with effective protective measures, so that the source drain electrode layer is prevented from being bad due to the fact that the side face is corroded, and the yield of the display panel is improved.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (10)

1. A display panel, comprising:
the substrate comprises a display area, a non-display area surrounding the display area and a binding area surrounding part of the non-display area;
a blocking dam disposed around the non-display area;
a first source drain electrode layer and a second source drain electrode layer which are sequentially stacked on the substrate base plate, wherein the first source drain electrode layer and the second source drain electrode layer sequentially penetrate through the blocking dam;
in the area of the non-display area close to the binding area, the first source drain electrode layer comprises a first part and a second part which are arranged at intervals, the second source drain electrode layer is of an integral layer structure, the second source drain electrode layer and the second part are electrically connected to form a low potential wire, and the first part forms a high potential wire.
2. The display panel according to claim 1, wherein an inorganic insulating layer is provided between the first source-drain electrode layer and the second source-drain electrode layer in a region where the non-display region is close to the binding region.
3. The display panel according to claim 1, wherein an organic insulating layer is provided between the first portion and the second portion.
4. The display panel according to claim 1, wherein an organic insulating layer is provided between the blocking dam and the second portion.
5. The display panel according to claim 1, wherein the blocking dam includes a first blocking dam close to the display area and a second blocking dam far from the display area, and an organic insulating layer is disposed between the second blocking dam and the second portion.
6. The display panel of claim 1, wherein the high potential traces transmit VDD signals and the low potential traces transmit VSS signals.
7. The display panel according to claim 3, wherein an anode layer and an encapsulation layer are sequentially disposed on the organic insulating layer.
8. The display panel according to any one of claims 1 to 7, wherein the first source drain electrode layer and the second source drain electrode layer are both a titanium/aluminum/titanium composite material.
9. The display panel according to claim 1, wherein the first source drain electrode layer and the second source drain electrode layer form the low potential trace in a region of the non-display region except for a region near the bonding region.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
CN202010031252.6A 2020-01-13 2020-01-13 Display panel and display device Active CN111211137B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010031252.6A CN111211137B (en) 2020-01-13 2020-01-13 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010031252.6A CN111211137B (en) 2020-01-13 2020-01-13 Display panel and display device

Publications (2)

Publication Number Publication Date
CN111211137A true CN111211137A (en) 2020-05-29
CN111211137B CN111211137B (en) 2022-12-27

Family

ID=70790076

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010031252.6A Active CN111211137B (en) 2020-01-13 2020-01-13 Display panel and display device

Country Status (1)

Country Link
CN (1) CN111211137B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111682050A (en) * 2020-06-22 2020-09-18 武汉华星光电半导体显示技术有限公司 Touch display device and manufacturing method thereof
CN113258015A (en) * 2021-05-11 2021-08-13 京东方科技集团股份有限公司 Display panel, preparation method thereof and display device
WO2021213041A1 (en) * 2020-04-20 2021-10-28 京东方科技集团股份有限公司 Array substrate and manufacturing method therefor, and display panel and display apparatus

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104701315A (en) * 2015-03-25 2015-06-10 京东方科技集团股份有限公司 Thin film transistor array substrate and preparation method thereof, display device
CN105870131A (en) * 2016-04-14 2016-08-17 京东方科技集团股份有限公司 Array substrate and preparation method and display device thereof
CN108388054A (en) * 2018-02-14 2018-08-10 武汉天马微电子有限公司 Display panel and display device
CN108878480A (en) * 2018-06-07 2018-11-23 武汉华星光电半导体显示技术有限公司 Display panel and display device
CN109742103A (en) * 2019-01-02 2019-05-10 京东方科技集团股份有限公司 A kind of display panel and display device
US10347866B1 (en) * 2018-02-20 2019-07-09 Samsung Display Co., Ltd. Organic light emitting display apparatus having an insulating dam
CN110635067A (en) * 2019-09-27 2019-12-31 京东方科技集团股份有限公司 Organic light-emitting display panel and display device
CN110649068A (en) * 2019-09-02 2020-01-03 武汉华星光电半导体显示技术有限公司 Array substrate and preparation method thereof

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104701315A (en) * 2015-03-25 2015-06-10 京东方科技集团股份有限公司 Thin film transistor array substrate and preparation method thereof, display device
CN105870131A (en) * 2016-04-14 2016-08-17 京东方科技集团股份有限公司 Array substrate and preparation method and display device thereof
CN108388054A (en) * 2018-02-14 2018-08-10 武汉天马微电子有限公司 Display panel and display device
US10347866B1 (en) * 2018-02-20 2019-07-09 Samsung Display Co., Ltd. Organic light emitting display apparatus having an insulating dam
CN108878480A (en) * 2018-06-07 2018-11-23 武汉华星光电半导体显示技术有限公司 Display panel and display device
CN109742103A (en) * 2019-01-02 2019-05-10 京东方科技集团股份有限公司 A kind of display panel and display device
CN110649068A (en) * 2019-09-02 2020-01-03 武汉华星光电半导体显示技术有限公司 Array substrate and preparation method thereof
CN110635067A (en) * 2019-09-27 2019-12-31 京东方科技集团股份有限公司 Organic light-emitting display panel and display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021213041A1 (en) * 2020-04-20 2021-10-28 京东方科技集团股份有限公司 Array substrate and manufacturing method therefor, and display panel and display apparatus
CN111682050A (en) * 2020-06-22 2020-09-18 武汉华星光电半导体显示技术有限公司 Touch display device and manufacturing method thereof
CN111682050B (en) * 2020-06-22 2022-04-01 武汉华星光电半导体显示技术有限公司 Touch display device and manufacturing method thereof
CN113258015A (en) * 2021-05-11 2021-08-13 京东方科技集团股份有限公司 Display panel, preparation method thereof and display device

Also Published As

Publication number Publication date
CN111211137B (en) 2022-12-27

Similar Documents

Publication Publication Date Title
US10573833B2 (en) Flexible display substrate and method for manufacturing the same, and flexible display device
US10707429B2 (en) Flexible display panel and flexible display apparatus
US10204846B2 (en) Display device
CN111710712B (en) Display panel
KR102470375B1 (en) Display apparatus
US9716248B2 (en) Organic light-emitting diode displays with reduced border area
CN111211137B (en) Display panel and display device
US10153322B2 (en) Organic light emitting display device
EP3163621B1 (en) Organic light emitting display device
US11302681B2 (en) Display device and method of manufacturing thereof
KR20170049146A (en) Flexible organic light emitting diode display device
CN109713017B (en) Display substrate, preparation method thereof and display device
US11119595B2 (en) Touch display panel and manufacturing method for reducing interference with touch signal
KR20190036617A (en) Organic light emitting display device
CN109742103B (en) Display panel and display device
CN113169216B (en) Display substrate, preparation method thereof and display device
JP2018077982A (en) Organic EL display device
CN112768498B (en) Display substrate and display device
KR20180051318A (en) Organic light emitting display device
US20230380208A1 (en) Display device
KR100711889B1 (en) Organic light-emitting display device and manufacturing method thereof
KR20160059818A (en) Organic light emitting display device
US20220246649A1 (en) Array substrate and oled display panel
US20240081111A1 (en) Display substrate and display device
KR102637116B1 (en) Organic light emitting display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant