CN111211112B - Integrated GaN device real-time temperature measurement system and preparation method thereof - Google Patents

Integrated GaN device real-time temperature measurement system and preparation method thereof Download PDF

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CN111211112B
CN111211112B CN202010023859.XA CN202010023859A CN111211112B CN 111211112 B CN111211112 B CN 111211112B CN 202010023859 A CN202010023859 A CN 202010023859A CN 111211112 B CN111211112 B CN 111211112B
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metal electrode
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measurement system
temperature measurement
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CN111211112A (en
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仇志军
叶怀宇
张国旗
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Southwest University of Science and Technology
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Shenzhen Third Generation Semiconductor Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01KMEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses an integrated GaN device real-time temperature measurement system and a preparation method thereof, wherein the preparation method comprises the following steps: 1) growing a high-resistance GaN buffer layer on the sapphire substrate; 2) growing a p-type doped InGaN layer on the high-resistance GaN buffer layer; 3) growing an intrinsic doped GaN layer on the p-type InGaN layer; 4) epitaxially growing an intrinsic doped AlGaN layer on the intrinsic doped GaN layer; 5) selectively etching the epitaxial layer material to form an etching table top and a step, and depositing an aluminum oxide passivation layer on the table top and the step; 6) the alumina passivation layer is selectively etched and a metal electrode is deposited. The inserted p-type InGaN layer is used as a temperature measuring resistance layer, and the method for measuring the thin film resistance by combining the four probes is adopted, so that the temperature change of the traditional GaN MOSFET power device can be monitored in real time, and the work stability and the service life of the GaN device can be ensured.

Description

Integrated GaN device real-time temperature measurement system and preparation method thereof
Technical Field
The invention relates to the field of integrated sensing of GaN-based devices, in particular to an integrated GaN device real-time temperature measurement system and a preparation method thereof.
Background
GaN is one of third-generation wide bandgap semiconductor materials, has the advantages of wide bandgap, high breakdown electric field, high electronic saturation speed, capability of working at high temperature and the like, and shows good application prospect in the aspect of power electronic devices. In the GaN-based device, the AlGaN/GaN heterojunction can form 10 or less of the heterojunction at the heterojunction interface due to the strong spontaneous polarization effect and piezoelectric polarization effect13cm-2And various power devices and photoelectric devices have been developed and designed using AlGaN/GaN heterojunction two-dimensional electron gas (2 DEG).
When a GaN device is operated at high temperature or high power output, high power output is usually generated and the temperature of the device itself is increased, and under certain operating conditions, the temperature is increased to reduce the related performance of the device. Therefore, it is particularly important to monitor the temperature of the device, especially the temperature in the structural layer of the core device, in real time during the operation of the device, and it is necessary to develop the design and development of a new integrated device temperature test system based on the temperature.
Disclosure of Invention
Based on the above development requirements, the invention innovatively provides an integrated GaN device real-time temperature measurement system and a preparation method thereof, wherein a p-type doped InGaN layer inserted below AlGaN/GaN is used as a measurement resistor, the temperature generated in the device structure is conducted to the InGaN layer in real time, then the resistance change of the InGaN layer is measured in real time by using a four-probe test method, and the working temperature of the device is obtained in real time by using the change relation of the resistance along with the temperature, and the system comprises the following steps:
1) growing a high-resistance GaN buffer layer on the sapphire substrate;
2) growing a p-type doped InGaN layer on the high-resistance GaN buffer layer;
3) growing an intrinsic doped GaN layer on the p-type InGaN layer;
4) epitaxially growing an intrinsic doped AlGaN layer on the intrinsic doped GaN layer;
5) selectively etching the epitaxial layer material to form an etching table top and a step, and depositing an aluminum oxide passivation layer on the table top and the step;
6) selectively etching the aluminum oxide passivation layer and depositing a metal electrode;
the metal electrode includes: the metal electrode of source electrode, drain electrode metal electrode, grid metal electrode and at least one sub-metal electrode of measuring film resistivity of MOSFET structure, ohmic contact between the sub-metal electrode of measuring film resistivity and p type doped InGaN layer, real-time measurement GaN layer operating temperature above the InGaN layer.
Preferably, the thickness of the high-resistance GaN buffer layer in the step 1) is 1-4 μm.
Preferably, the thickness of the p-type doped InGaN layer in the 2) is 0.5-2 μm, and the doping concentration is 1 × 1018cm-3~5×1018cm-3Doping element magnesium.
Preferably, the thickness of the intrinsic doped GaN layer in said 3) is 0.1 μm to 1 μm.
Preferably, the thickness of the intrinsic doped AlGaN layer in 4) is 0.1 μm to 1 μm.
Preferably, the thickness of the aluminum oxide passivation layer in the step 5) is 20nm to 200 nm.
Preferably, in the MOSFET structure, the gate metal electrode and the AlGaN layer form a schottky contact, and the source metal electrode and the drain metal electrode and the AlGaN layer form an ohmic contact.
The integrated GaN device real-time temperature measurement system manufactured by the method comprises a source electrode metal electrode, a drain electrode metal electrode, a grid electrode metal electrode, a sub-metal electrode for measuring the resistivity of a film and an epitaxial layer structure, wherein the epitaxial layer structure comprises: sapphire substrate, high-resistance GaN buffer layer, p-type InGaN layer, intrinsic GaN layer, intrinsic AlGaN layer and Al2O3And the sub metal electrode for measuring the resistivity of the film is in ohmic contact with the p-type doped InGaN layer, and the working temperature of the GaN layer above the InGaN layer is measured in real time.
Preferably, the source metal electrode and the drain metal electrode are located at two ends of the epitaxial layer structure in the horizontal direction and form ohmic contact with the AlGaN layer, and the gate metal electrode is located in the middle of the epitaxial layer structure in the horizontal direction and forms schottky contact with the AlGaN layer.
Preferably, the sub-metal electrodes for measuring the resistivity of the thin film are distributed on two sides of the epitaxial layer structure in equal quantity and in unequal intervals, and form good ohmic contact with the InGaN layer.
The beneficial effects of the invention at least comprise:
A. the invention can monitor the temperature change of the traditional GaNMOSFET power device in real time and has the characteristics of rapidness, accuracy and high sensitivity.
B. The invention can work in complex environments such as high temperature, high pressure and the like, and the existence of the real-time monitoring system is beneficial to ensuring the stable work of the GaN device and prolonging the service life.
Drawings
In order to make the object, technical scheme and beneficial effect of the invention more clear, the invention provides the following drawings for explanation:
FIG. 1 is a schematic top view of the present invention.
FIG. 2 is a schematic diagram of the two-dimensional vertical cross-sectional structure along line AA' of the present invention.
FIG. 3 is a schematic diagram of the two-dimensional vertical cross-sectional structure of the present invention along the line BB'.
FIG. 4 is a schematic diagram of the two-dimensional vertical cross-sectional structure of the present invention along the line CC'.
Fig. 5, 6 and 7 are flow charts of the preparation process of the preferred embodiment of the invention.
In the figure: a source metal electrode 1, a drain metal electrode 2, a gate metal electrode 3, a first sub-metal electrode 4 for measuring the film resistivity, a second sub-metal electrode 5 for measuring the film resistivity, a third sub-metal electrode 6 for measuring the film resistivity, a fourth sub-metal electrode 7 for measuring the film resistivity, a sapphire substrate 8, a high-resistance GaN buffer layer 9, a p-type InGaN layer 10, an intrinsic GaN layer 11, an intrinsic AlGaN layer 12 and an Al layer2O3And (c) a layer 13.
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the scope of the present invention.
The structure of the invention is schematically shown in a top view in fig. 1, in which a source metal electrode 1, a drain metal electrode 2 and a gate metal electrode 3 form source, drain and gate metal electrodes of a MOSFET device, and a first sub-metal electrode 4 for measuring film resistivity, a second sub-metal electrode 5 for measuring film resistivity, a third sub-metal electrode 6 for measuring film resistivity and a fourth sub-metal electrode 7 for measuring film resistivity form metal electrodes for four-probe sheet resistance testing.
FIG. 2 is a schematic view of a vertical cross-section along line AA' of up to 1X 10 by using AlGaN/GaN heterojunction interface13cm-2Under the regulation and control action of the grid metal electrode, a voltage signal is output through the source electrode and the drain electrode; in the structure of the device, the air inlet pipe is provided with a plurality of air outlets,the interposed p-type InGaN layer is in contact with the AlGaN/GaN heterojunction to conduct heat generated during operation of the device.
Fig. 3 is a schematic diagram of a vertical cross-sectional structure along the line BB ', and fig. 4 is a schematic diagram of a vertical cross-sectional structure along the line CC', in which a first sub-metal electrode 4 for measuring the film resistivity, a second sub-metal electrode 5 for measuring the film resistivity, a third sub-metal electrode 6 for measuring the film resistivity, and a fourth sub-metal electrode 7 for measuring the film resistivity form a good ohmic contact with the contact material (InGaN layer) to realize real-time measurement of the resistivity change of the InGaN layer material. For a specific thin film material, the resistance value has a certain numerical relationship with the temperature, so that the temperature and the change condition of the internal structure of the device during working can be obtained in real time by utilizing the relationship.
Example 1
A specific manufacturing process flow of a preferably integrated GaN device real-time temperature measurement system is shown in fig. 5, and includes:
1) the sapphire substrate 8 was sampled, and the surface thereof was pretreated.
2) Epitaxially growing a high-resistance GaN buffer layer 9 with a thickness of 1 μm and a p-type doping concentration of 1 × 10 with a thickness of 0.5 μm on the substrate18cm-3 A GaN layer 10, a 0.2 μm thick intrinsic doped GaN layer 11, and a 0.2 μm thick intrinsic doped AlGaN layer 12;
3) and selectively etching the epitaxial material by using an Inductively Coupled Plasma (ICP) etching device and combining the etching mask to form an etching table and a step.
4) Depositing 20nm thick aluminum oxide (Al) on clean etch steps and mesas using Atomic Layer Deposition (ALD) equipment2O3) And (c) a layer 13.
5) Selectively etching aluminum oxide (Al) by photolithography and etching2O3) And (c) a layer 13.
6) By utilizing photoetching and metal evaporation technology, metal electrodes are deposited, a source electrode metal electrode 1, a drain electrode metal electrode 2 and a GaN material form good ohmic contact through proper metal material selection and an annealing process, a first sub-metal electrode 4 for measuring the film resistivity, a second sub-metal electrode 5 for measuring the film resistivity, a third sub-metal electrode 6 for measuring the film resistivity and a fourth sub-metal electrode 7 for measuring the film resistivity form good ohmic contact with the InGaN material, and meanwhile, a grid electrode metal electrode 3 and the AlGaN layer form high-barrier Schottky contact.
Example 2
A specific manufacturing process flow of a preferably integrated GaN device real-time temperature measurement system is shown in fig. 6, and includes:
1) the sapphire substrate 8 was sampled, and the surface thereof was pretreated.
2) Epitaxially growing a 2 μm-thick high-resistance GaN buffer layer 9 and a 1.0 μm-thick p-type doping concentration of 2 × 1018cm-3A GaN layer 10, a 0.5 μm thick intrinsic doped GaN layer 11, and a 0.5 μm thick intrinsic doped AlGaN layer 12;
3) and selectively etching the epitaxial material by using an Inductively Coupled Plasma (ICP) etching device and combining the etching mask to form an etching table and a step.
4) Depositing 100nm thick aluminum oxide (Al) on clean etch steps and mesas using Atomic Layer Deposition (ALD) equipment2O3) And (c) a layer 13.
5) Selectively etching aluminum oxide (Al) by photolithography and etching2O3) And (c) a layer 13.
6) By utilizing photoetching and metal evaporation technology, metal electrodes are deposited, a source electrode metal electrode 1, a drain electrode metal electrode 2 and a GaN material form good ohmic contact through proper metal material selection and an annealing process, a first sub-metal electrode 4 for measuring the film resistivity, a second sub-metal electrode 5 for measuring the film resistivity, a third sub-metal electrode 6 for measuring the film resistivity and a fourth sub-metal electrode 7 for measuring the film resistivity form good ohmic contact with the InGaN material, and meanwhile, a grid electrode metal electrode 3 and the AlGaN layer form high-barrier Schottky contact.
Example 3
A specific manufacturing process flow of a preferably integrated GaN device real-time temperature measurement system is shown in fig. 7, and includes:
1) the sapphire substrate 8 was sampled, and the surface thereof was pretreated.
2) Epitaxially growing a 3 μm-thick high-resistance GaN buffer layer 9 and a 1.5 μm-thick p-type doping concentration of 2.5 × 1018cm-3A GaN layer 10, a 0.75 μm thick intrinsic doped GaN layer 11, and a 0.75 μm thick intrinsic doped AlGaN layer 12;
3) and selectively etching the epitaxial material by using an Inductively Coupled Plasma (ICP) etching device and combining the etching mask to form an etching table and a step.
4) Depositing 150nm thick aluminum oxide (Al) on clean etch steps and mesas using Atomic Layer Deposition (ALD) equipment2O3) And (c) a layer 13.
5) Selectively etching aluminum oxide (Al) by photolithography and etching2O3) And (c) a layer 13.
6) By utilizing photoetching and metal evaporation technology, metal electrodes are deposited, a source electrode metal electrode 1, a drain electrode metal electrode 2 and a GaN material form good ohmic contact through proper metal material selection and an annealing process, a first sub-metal electrode 4 for measuring the film resistivity, a second sub-metal electrode 5 for measuring the film resistivity, a third sub-metal electrode 6 for measuring the film resistivity and a fourth sub-metal electrode 7 for measuring the film resistivity form good ohmic contact with the InGaN material, and meanwhile, a grid electrode metal electrode 3 and the AlGaN layer form high-barrier Schottky contact.
Finally, it is noted that the above-mentioned preferred embodiments illustrate rather than limit the invention, and that, although the invention has been described in detail with reference to the above-mentioned preferred embodiments, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the scope of the invention as defined by the appended claims.

Claims (10)

1. A preparation method of an integrated GaN device real-time temperature measurement system is characterized by comprising the following steps: comprises that
1) Growing a high-resistance GaN buffer layer on the sapphire substrate;
2) growing a p-type doped InGaN layer on the high-resistance GaN buffer layer;
3) growing an intrinsic doped GaN layer on the p-type InGaN layer;
4) epitaxially growing an intrinsic doped AlGaN layer on the intrinsic doped GaN layer;
5) selectively etching the epitaxial layer material to form an etching table top and a step, and depositing an aluminum oxide passivation layer on the table top and the step;
6) selectively etching the aluminum oxide passivation layer and depositing a metal electrode;
the metal electrode includes: the metal electrode of source electrode, drain electrode metal electrode, grid metal electrode and at least one sub-metal electrode of measuring film resistivity of MOSFET structure, the said sub-metal electrode of measuring film resistivity and p type doped InGaN layer ohmic contact, measure the GaN layer working temperature above the InGaN layer in real time;
and a gate metal electrode in the MOSFET structure forms a Schottky contact with the AlGaN layer.
2. The method of claim 1, wherein the integrated GaN device real-time temperature measurement system comprises: the thickness of the high-resistance GaN buffer layer in the step 1) is 1-4 mu m.
3. The method of claim 1, wherein the integrated GaN device real-time temperature measurement system comprises: the thickness of the p-type doped InGaN layer in the step 2) is 0.5-2 μm, and the doping concentration is 1 × 1018cm-3~5×1018cm-3Doping element magnesium.
4. The method of claim 1, wherein the integrated GaN device real-time temperature measurement system comprises: the thickness of the intrinsic doped GaN layer in the step 3) is 0.1-1 μm.
5. The method of claim 1, wherein the integrated GaN device real-time temperature measurement system comprises: the thickness of the intrinsic doped AlGaN layer in the step 4) is 0.1-1 mu m.
6. The method of claim 1, wherein the integrated GaN device real-time temperature measurement system comprises: the thickness of the aluminum oxide passivation layer in the step 5) is 20 nm-200 nm.
7. The method of claim 1, wherein the integrated GaN device real-time temperature measurement system comprises: the source metal electrode, the drain metal electrode and the AlGaN layer form ohmic contact.
8. An integrated GaN device real-time temperature measurement system made by any of the methods of claims 1-7 comprising a source metal electrode, a drain metal electrode, a gate metal electrode, a sub-metal electrode for measuring film resistivity, and an epitaxial layer structure comprising: sapphire substrate, high-resistance GaN buffer layer, p-type InGaN layer, intrinsic GaN layer, intrinsic AlGaN layer and Al2O3The sub-metal electrode for measuring the resistivity of the thin film is in ohmic contact with the p-type doped InGaN layer, and the working temperature of the GaN layer above the InGaN layer is measured in real time;
the grid metal electrode is positioned in the middle of the epitaxial layer structure in the horizontal direction and forms Schottky contact with the AlGaN layer.
9. The real-time temperature measurement system of an integrated GaN device of claim 8, wherein the source and drain metal electrodes are located at two ends of the epitaxial layer structure in the horizontal direction and form ohmic contact with the AlGaN layer.
10. The integrated GaN device real-time temperature measurement system of claim 8, wherein the sub-metal electrodes for measuring the resistivity of the thin film are distributed on both sides of the epitaxial layer structure in equal number and non-equal intervals and form good ohmic contact with the InGaN layer.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8587037B1 (en) * 2009-07-08 2013-11-19 Hrl Laboratories, Llc Test structure to monitor the in-situ channel temperature of field effect transistors
CN104409420A (en) * 2014-10-11 2015-03-11 北京工业大学 Manufacturing process of on-chip Pt thin film thermistor for GaAs (Gallium Arsenide) power device and microwave monolithic circuit
CN105720097A (en) * 2016-04-28 2016-06-29 中国科学院半导体研究所 Enhanced-mode high electron mobility transistor, preparation method thereof, and semiconductor device
CN206573523U (en) * 2017-03-29 2017-10-20 中山大学 A kind of highly integrated type pH sensors
CN110660882A (en) * 2019-09-23 2020-01-07 深圳第三代半导体研究院 Novel grid-controlled PIN structure GaN ultraviolet detector and preparation method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107621600A (en) * 2017-08-28 2018-01-23 北京工业大学 A kind of method using the reverse grid ource electric current on-line measurement junction temperature of GaN base HEMT device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8587037B1 (en) * 2009-07-08 2013-11-19 Hrl Laboratories, Llc Test structure to monitor the in-situ channel temperature of field effect transistors
CN104409420A (en) * 2014-10-11 2015-03-11 北京工业大学 Manufacturing process of on-chip Pt thin film thermistor for GaAs (Gallium Arsenide) power device and microwave monolithic circuit
CN105720097A (en) * 2016-04-28 2016-06-29 中国科学院半导体研究所 Enhanced-mode high electron mobility transistor, preparation method thereof, and semiconductor device
CN206573523U (en) * 2017-03-29 2017-10-20 中山大学 A kind of highly integrated type pH sensors
CN110660882A (en) * 2019-09-23 2020-01-07 深圳第三代半导体研究院 Novel grid-controlled PIN structure GaN ultraviolet detector and preparation method thereof

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