CN111210859B - Method for relieving sneak path influence in memristor cross array and related equipment - Google Patents
Method for relieving sneak path influence in memristor cross array and related equipment Download PDFInfo
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- CN111210859B CN111210859B CN202010003659.8A CN202010003659A CN111210859B CN 111210859 B CN111210859 B CN 111210859B CN 202010003659 A CN202010003659 A CN 202010003659A CN 111210859 B CN111210859 B CN 111210859B
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- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
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Abstract
The invention relates to a method and related equipment for relieving influence of a sneak path in a memristor cross array, which are applied to the technical field of computers and electronic information, wherein the method comprises the steps of obtaining the amplification coefficient of each sensing amplifier in the cross array; and adjusting the amplification factor of the corresponding sensing amplifier according to the amplification factor, wherein the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor.
Description
Technical Field
The invention relates to the technical field of computers and electronic information, in particular to a method and related equipment for relieving influence of a sneak path in a memristor cross array.
Background
The memristor cross array is a resistance network formed by two layers of vertically crossed metal wires and a memristor matrix.
In the manufacturing process of the memristor crossbar array, the IR-drop (voltage drop) is generated by the metal wire from the voltage in the resistive shunt circuit, and the generated potential difference can cause an unexpected current branch, i.e. Sneak-path. With the increase of the size of the cross array and the continuous accumulation in the calculation process, the error caused by the sneak path is increased continuously. The shunt serial of the current of the sneak path reduces the accuracy of the neural network algorithm, which leads to the reduction of the reliability of the system. It is therefore important to avoid or reduce errors as much as possible.
In the related art, the method for relieving the sneak path mainly inhibits the sneak path current to a certain extent by adding a selection device, for example, adding a transistor or a diode on a cross array circuit node, and blocking the sneak path by using the unidirectional conductivity of the selection device, such as 1T1R (1 transistor and 1 memristor), 1S1R (1 selector and 1 memristor), and 1D1R (1 diode and one memristor), but this way can increase the manufacturing difficulty in the process and reduce the circuit integration degree.
Disclosure of Invention
In view of the foregoing, the present invention provides a method and related apparatus for mitigating the effects of sneak paths in memristor crossbar arrays, in order to overcome at least some of the problems in the related art.
In order to solve the technical problems, the invention adopts the following technical scheme:
in a first aspect, a method of mitigating sneak path effects in a memristor crossbar array, includes:
acquiring the amplification coefficient of each sensing amplifier in the cross array;
and adjusting the amplification factor of the corresponding sensing amplifier according to the amplification factor, wherein the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor.
Optionally, the method further includes:
verifying each amplification factor according to a preset distribution rule;
and if the amplification factor does not accord with the distribution rule, adjusting the amplification factor to accord with the distribution rule.
Optionally, the obtaining an amplification factor of each sense amplifier in the cross array includes:
acquiring preset output current values of all branch passages in the cross array;
acquiring actual output current values of all branch passages in the cross array;
and calculating to obtain the amplification coefficient of each branch passage according to the preset output current value and the actual output current value.
Optionally, the distribution rule includes:
the closer each branch path in the crossbar array is to the input end of the crossbar array, the smaller the amplification factor is.
Optionally, the method for obtaining the distribution rule includes:
constructing a cross array circuit structure based on a preset simulation tool;
setting different input parameters for the cross array circuit structure;
acquiring an output result of the cross array circuit structure under each input parameter;
and analyzing the output result to obtain the distribution rule.
In a second aspect, an apparatus to mitigate sneak path effects in a memristor crossbar array, comprising:
the acquisition module is used for acquiring the amplification coefficient of each sensing amplifier in the cross array;
and the adjusting module is used for adjusting the amplification factor of the corresponding sensing amplifier according to the amplification factor, and the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor.
Optionally, the memristor crossbar array includes:
the memristor cross array comprises an input end, an analog-to-digital conversion module, a memristor cross array body, a sensing amplifier, a displacement and accumulation module, a digital-to-analog conversion module and an output end which are sequentially connected.
Optionally, the method further includes:
the verification module is used for verifying each amplification factor according to a preset distribution rule;
the adjusting module is further used for adjusting the amplification factor when the amplification factor does not accord with the distribution rule so as to accord with the distribution rule.
In a third aspect, an apparatus to mitigate sneak path effects in a memristor crossbar array, comprising:
a processor, and a memory coupled to the processor;
the memory is used for storing a computer program;
the processor is configured to invoke and execute the computer program in the memory to perform the method of mitigating sneak path effects in a memristor crossbar array as described in the first aspect.
In a fourth aspect, a storage medium stores a computer program that, when executed by a processor, implements a method of mitigating sneak path effects in a memristor crossbar array as in any of the first aspects of the present disclosure.
By adopting the technical scheme, the invention can realize the following technical effects: the amplification factor of each sensing amplifier in the cross array is obtained firstly, and then the corresponding amplification factor of the sensing amplifier is adjusted according to the amplification factor, wherein the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor. Therefore, only the amplification coefficient of the sensing amplifier needs to be adjusted, the current of the output end of the corresponding cross array is compensated, the error loss caused by the sneak path is adjusted, new equipment does not need to be added in the memristor cross array again, and therefore the manufacturing process of the memristor cross array does not need to be changed.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of voltage drops in a memristor crossbar array provided by an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a sneak path in a memristor crossbar array provided by an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of dot product operation in a memristor crossbar array provided by an embodiment of the present disclosure;
FIG. 4 is a flow diagram of a method of mitigating sneak path effects in a memristor crossbar array provided by an embodiment of the present disclosure;
FIG. 5 is a flow diagram of a method of mitigating sneak path effects in a memristor crossbar array provided by another embodiment of the present disclosure;
FIG. 6 is a schematic diagram of a peripheral circuit built before and after an analog error according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of different resistance distributions of memristors in a memristor crossbar array provided by an embodiment of the present disclosure;
FIG. 8 is a thermodynamic diagram for simulating sneak path current error distribution rules according to an embodiment of the present invention;
FIG. 9a is a graph of lateral error analysis of error values of 63 rd row and 64 th row in a memristor crossbar array provided in accordance with an embodiment of the present invention;
FIG. 9b is a graph of vertical error analysis of 61 st column of error values in a memristor crossbar array provided in accordance with an embodiment of the present invention;
FIG. 10 is a schematic structural diagram of an apparatus for mitigating sneak path effects in a memristor crossbar array provided by an embodiment of the present application;
FIG. 11 is a schematic structural diagram of a memristor crossbar array mitigation provided by an embodiment of the present application;
FIG. 12 is a schematic structural diagram of an apparatus for mitigating sneak path effects in a memristor crossbar array according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be described in detail below. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the examples given herein without any inventive step, are within the scope of the present invention.
For a better understanding of the solution provided by the present application, the following needs to be understood:
with the rise of the development of artificial intelligence, neural networks are widely used in various fields. In some important fields (such as medical treatment, traffic and the like), the improvement of any algorithm precision has great influence on the reliability of the whole system. In a nonvolatile device, a memristor has the characteristics of high speed, low power consumption, easy integration, simple structure and nonvolatility, meets the requirements of high-density information storage and high-performance calculation of a next-generation memory, a convolution neural network mainly takes convolution multiplication and addition operation as the main operation and accounts for more than 90% of the whole operation, and the memristor is combined with a cross array structure to be suitable for the characteristic of multiplication and addition operation and is widely applied to convolution calculation of the neural network.
However, memristors (RRAMs) have some unavoidable errors due to process manufacturing, etc. In the memristor crossbar array, due to the fact that voltage drop is generated by the metal wire in the shunt circuit with the resistor, the generated potential difference can cause unexpected current branches, namely, errors caused by sneak paths are increased along with the increase of the size of the crossbar array and the continuous accumulation in the calculation process. The shunt serial of the current of the sneak path reduces the accuracy of the neural network algorithm, which leads to the reduction of the reliability of the system. It is therefore important to avoid or reduce errors as much as possible.
Voltage Drop (IR-Drop): because the metal wire is provided with resistance, voltage drop is caused by voltage in the shunt circuit, programming voltage of the memristor unit is reduced, and voltage drop deviation is more obvious as the scale of the cross array is larger. The voltage applied to the wire gradually drops along the wire, i.e. as shown in fig. 1: VC0> VC1> VC2> … > VC 6.
Sneak Path (Sneak-Path): sneak paths are circuit paths in an electronic system that cause the system to produce undesired or inhibit functions, are artificially unintended, but often affect system reliability and result in errors. The expected normal current in fig. 2 is shown as a solid line, but in fact the current will branch off as shown by the dashed line in fig. 2.
The process of making a convolutional neural network by a memristor crossbar array (RRAM crossbar): the memristors combine with one horizontal bit line and one vertical word line to form a memristor crossbar array structure. Each intersection point in the cross array is a storage unit, and the network weight is configured according to the conductance of the memristor. FIG. 3 shows dot-product operation in a memristor crossbar array. When performing convolution operations, an electrical signal V is input at the horizontal bit lines, and the magnitude of the output current through each crossing node is calculated as I ═ V × G, where G represents the operating node conductance, and the output currents are summed up at the ends of the vertical word lines. The whole process is similar to the multiplication and addition in the convolution operation in the neural network, so that the memristor cross array is suitable for the convolution operation in the neural network.
Embodiment fig. 4 is a flowchart illustrating a method for mitigating sneak path effects in a memristor crossbar array according to an embodiment of the present invention. As shown in fig. 4, the present embodiment provides a method for mitigating the effect of sneak paths in a memristor crossbar array, including:
in some embodiments, the convolution calculation in the neural network is performed by calculating a memristor cross array, outputting a current output by amplifying a sense amplifier, and then converting the current into a digital signal by an ADC (analog-to-digital converter), so as to complete one convolution calculation. In the prior art, the amplification factors of the sensing amplifiers are consistent, which causes different degrees of errors in the branch paths.
And 402, adjusting the amplification factor of the corresponding sensing amplifier according to the amplification factor, wherein the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor.
It is understood that the sense amplifier in this embodiment is an existing device and has a certain amplification factor, and the amplification factor is adjustable. By setting the amplification factor of the sensing amplifier, the current in the memristor cross array can be amplified, so that the current in the memristor cross array is compensated and then output.
The amplification factor of each sensing amplifier in the cross array is obtained firstly, and then the corresponding amplification factor of the sensing amplifier is adjusted according to the amplification factor, wherein the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor. Therefore, only the amplification coefficient of the sensing amplifier needs to be adjusted, the current of the output end of the corresponding cross array is compensated, the error loss caused by the sneak path is adjusted, new equipment does not need to be added in the memristor cross array again, and therefore the manufacturing process of the memristor cross array does not need to be changed.
FIG. 5 is a flow diagram of a method of mitigating sneak path effects in a memristor crossbar array provided by another embodiment of the present disclosure. As shown in fig. 5, the present embodiment provides a method for mitigating the effect of sneak paths in a memristor crossbar array, including:
in some embodiments, the preset output current value is the output current value obtained under ideal conditions (i.e., conditions where sneak paths and voltage drops do not occur in the memristor crossbar array).
in some embodiments, the actual output current value may be obtained by an analog-to-digital converter provided at the output of each branch path.
In some embodiments, the amplification factor may be a ratio of the preset output current value to the actual output current value. This can be obtained by the following formula:
wherein xi represents the amplification factor of the ith branch channel, Currout-idealRepresenting a preset output current value, Currout-varRepresenting the actual output current value.
In some embodiments, the convolution calculation in the neural network is performed by calculating a memristor cross array, outputting a current output by amplifying a sense amplifier, and then converting the current into a digital signal by an ADC (analog-to-digital converter), so as to complete one convolution calculation. In the prior art, the amplification factors of the sensing amplifiers are consistent, which causes different degrees of errors in the branch paths.
And step 504, adjusting the amplification factor of the corresponding sensing amplifier according to the amplification factor, wherein the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor.
In some embodiments, after the amplification factor of each branch path is calculated through the above steps, each amplification factor is used to adjust the amplification factor of the corresponding sense amplifier, so that the current at the output end of each branch path is compensated, thereby reducing the error.
in some embodiments, the distribution law may be obtained by:
constructing a cross array circuit structure based on a preset simulation tool;
setting different input parameters for the cross array circuit structure;
acquiring an output result of the cross array circuit structure under each input parameter;
and analyzing the output result to obtain the distribution rule.
Specifically, in the embodiment, cross array circuit structures of different scales are built through a Pspice simulation tool, and simulation analysis is performed on the sneak path errors in the circuit. Fig. 6 is a schematic diagram of a peripheral circuit built before and after an analog error according to an embodiment of the present invention, where parameters are set as: the memristor resistance is divided into a high resistance state and a low resistance state, and is respectively assigned with 1M omega and 10K omega; the input voltage is set in the range of 0V-1.2V, and different voltages are distributed randomly; the voltage drop is simulated by setting the line resistance value between two adjacent memristor cells to 25 Ω. The change due to the influence of the voltage in the present embodiment refers to a current difference between an actual value and an ideal value. The generated parameter file is analyzed by using a Python script, and the change distribution of the sneak path current in the circuit is calculated.
In this embodiment, a cross array of 64 × 64 scale of the memristor cross array is taken as an example for explanation, fig. 7 is a schematic diagram of different resistance distributions of memristors in the memristor cross array provided by an embodiment of the present invention, and referring to fig. 7, horizontal and vertical coordinates represent 64 rows of inputs and 64 columns of outputs, respectively. The white dots represent memristors in a high resistance state of 10K Ω, and the black dots represent memristors in a low resistance state of 1M Ω. They are arbitrarily sparsely distributed in the circuit. According to the sparsity of the neural network, the zero value occupies a large proportion in the weight distribution of the network. In order to reduce the power loss of the system, a method of mapping a low weighting value in the network to a memristor in a high resistance state is generally adopted, and a process of simulation analysis is also developed in the application.
Fig. 8 is a thermodynamic diagram for simulating sneak path current error distribution rules according to an embodiment of the present invention. Extracting the horizontal direction of lines 63 and 64 in fig. 7, where the inputs are 0V and 1.2V, respectively, the memristor resistance values have the same distribution. Fig. 9a is a lateral error analysis of error values of 63 th row and 64 th row in the memristor crossbar array according to an embodiment of the present invention, and it can be obtained in fig. 9a that when the memristor cell is set to the high-resistance state, the error value is the minimum no matter whether the input is in the high-voltage state or the low-voltage state. Further, when the input voltage is 1.2V, the current in the circuit changes to be positive, and when the input voltage is 0V, the current in the circuit changes to be negative. The error value increases gradually with the positive x-axis direction. Fig. 9b is a vertical error analysis of the 61 st column of error values in the memristor crossbar array provided in an embodiment of the present invention, and it can be seen that the variation curve has a peak when the input voltage is at the maximum and minimum values. When the memristor cell is set to a high resistance state, the error value approaches zero regardless of the input voltage, as shown by the resistance distribution in fig. 9 b.
The following distribution law can be obtained by the above embodiment:
1. considering the influence of resistance setting of the memristor, the high-resistance state of the memristor has a blocking effect on the sneak path;
different resistance states of memristors are set in the circuit to be randomly distributed, the distribution situation of the memristors with different resistances in the circuit is shown in fig. 7, black points show the distribution of the memristors with high resistance states in the circuit, it can be obviously observed in fig. 8 that the sneak path error is relatively small in the high resistance state, and the obtained result further verifies that the high resistance state of the memristors has a blocking effect on the sneak path, so that the error is relatively small;
2. considering the position factor of the memristor, the latent path error transversely presents a gradually increasing rule;
when viewed from the left to the right in fig. 8, the colors in the rows in fig. 8 tend to become lighter, and lighter colors indicate greater errors.
3. Considering the influence of input voltage, the types of sneak path errors caused by voltage values in different states are different;
in fig. 8, the column on the left side represents 64 input voltages, the different colors on the left side represent different input voltage values, the color deepening represents the larger voltage value, and it can be seen through observation that in a row with a corresponding color depth, that is, in a high-voltage input state, the actual current value passing through the memristor node is larger than an ideal value, and the lateral color deepens in the row, that is, the lateral error is a forward-increasing sneak path error type. The actual current value through the memristor node is smaller than the ideal current value, and the sneak path error type is a decreasing error and is increased laterally.
And then, the closer each branch channel in the cross array is to the input end of the cross array, the smaller the amplification factor is.
Comparing the amplification factors in the step 503 according to the distribution rule obtained in the above embodiment, if the amplification factors do not conform to the distribution rule, it is indicated that the amplification factors are calculated incorrectly, and the calculation needs to be performed again until the obtained amplification factors satisfy the distribution rule.
The method for relieving the influence of the sneak paths in the memristor cross array relieves the loss caused by the sneak path errors, has the greatest value in analyzing and compensating the result of each convolution calculation and reducing the problem of reduction of calculation accuracy caused by the multilayer calculation sneak path errors in the neural network.
Compared with other methods for relieving sneak path errors, the method for relieving sneak path errors in hardware increases the integration level of a circuit and reduces the difficulty of the circuit manufacturing process. The method is more universal and applicable to a software-level method.
FIG. 10 is a schematic structural diagram of an apparatus for mitigating sneak path effects in a memristor crossbar array, according to an embodiment of the present disclosure. As shown in fig. 10, the present embodiment provides an apparatus for mitigating sneak path effects in a memristor crossbar array, including:
an obtaining module 1001, configured to obtain an amplification factor of each sense amplifier in the cross array;
and an adjusting module 1002, configured to adjust the amplification factor of the corresponding sense amplifier according to the amplification factor, where the sense amplifier is configured to compensate the current at the output end of the corresponding array according to the amplification factor.
Optionally, referring to fig. 11, the memristor crossbar array includes:
the memristor cross array comprises an input end, an analog-to-digital conversion module, a memristor cross array body, a sensing amplifier, a displacement and accumulation module, a digital-to-analog conversion module and an output end which are sequentially connected.
Optionally, the method further includes:
the verification module is used for verifying each amplification factor according to a preset distribution rule;
the adjusting module is further used for adjusting the amplification factor when the amplification factor does not accord with the distribution rule so as to accord with the distribution rule.
In a crossbar array circuit configuration, the current for each column is cumulative. Considering the effect of sneak paths on the current in the circuit, from a position perspective analysis, as the array scale increases, sneak path errors increase laterally, so the output error per column in the cross array also increases from left to right. In the cross array circuit structure, current accumulation flows through memristor nodes and is collected and output at the tail end of a column, analog signals in a circuit are amplified through a sensing Amplifier (Sense Amplifier), and are converted into recognizable digital signals through an ADC (analog-to-digital converter) after passing through a displacement and accumulation module. The final computed result is inaccurate due to the effect of sneak path errors on the computation. Therefore, the analog current signal output by the tail end is amplified and adjusted, and the current of the output end is adjusted by adopting the amplification factors with different degrees, so that the current error of the output end of the circuit is compensated.
FIG. 12 is a schematic structural diagram of an apparatus for mitigating sneak path effects in a memristor crossbar array according to an embodiment of the present application. Referring to fig. 12, an apparatus for mitigating sneak path effects in a memristor crossbar array is provided in an embodiment of the present application, and includes:
a processor 1201, and a memory 1202 connected to the processor;
the memory 1202 is used to store computer programs;
the processor 1201 is used to invoke and execute a computer program in the memory 1202 to perform a method of mitigating sneak path effects in a memristor crossbar array as in the embodiments described above.
For a specific implementation scheme of this embodiment, reference may be made to the method for relieving the effect of the sneak path in the memristor crossbar array described in the foregoing embodiments and the related descriptions in the method embodiments, and details are not described here again.
Embodiments of the present invention provide a storage medium, where a computer program is stored, and when the computer program is executed by a processor, the steps in the method for alleviating the effect of sneak paths in a memristor crossbar array are implemented.
For a specific implementation scheme of this embodiment, reference may be made to the related description in the above embodiment of the method for alleviating the influence of the sneak path in the memristor crossbar array, and details are not described here again.
It is understood that the same or similar parts in the above embodiments may be mutually referred to, and the same or similar parts in other embodiments may be referred to for the content which is not described in detail in some embodiments.
It should be noted that the terms "first," "second," and the like in the description of the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Further, in the description of the present invention, the meaning of "a plurality" means at least two unless otherwise specified.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and alternate implementations are included within the scope of the preferred embodiment of the present invention in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present invention.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by suitable instruction execution devices. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: discrete logic circuits with logic gates for implementing logic functions on data signals, application specific integrated circuits with appropriate combinational logic gates, STT-RAM, PCM, etc.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present invention may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (8)
1. A method of mitigating sneak path effects in a memristor crossbar array, comprising:
acquiring the amplification coefficient of each sensing amplifier in the cross array;
adjusting the amplification factor of the corresponding sensing amplifier according to the amplification factor, wherein the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor;
the method further comprises the following steps:
verifying each amplification factor according to a preset distribution rule;
and if the amplification factor does not accord with the distribution rule, adjusting the amplification factor to accord with the distribution rule.
2. The method of claim 1, wherein the obtaining the amplification factor of each sense amplifier in the crossbar array comprises:
acquiring preset output current values of all branch passages in the cross array;
acquiring actual output current values of all branch passages in the cross array;
and calculating to obtain the amplification coefficient of each branch passage according to the preset output current value and the actual output current value.
3. The method of claim 1, wherein the distribution law comprises:
the closer each branch path in the crossbar array is to the input end of the crossbar array, the smaller the amplification factor is.
4. The method according to claim 1, wherein the method for obtaining the distribution rule comprises:
constructing a cross array circuit structure based on a preset simulation tool;
setting different input parameters for the cross array circuit structure;
acquiring an output result of the cross array circuit structure under each input parameter;
and analyzing the output result to obtain the distribution rule.
5. An apparatus to mitigate sneak path effects in a memristor crossbar array, comprising:
the acquisition module is used for acquiring the amplification coefficient of each sensing amplifier in the cross array;
the adjusting module is used for adjusting the amplification factor of the corresponding sensing amplifier according to the amplification factor, and the sensing amplifier is used for compensating the current of the output end of the corresponding array according to the amplification factor;
the device further comprises:
the verification module is used for verifying each amplification factor according to a preset distribution rule;
the adjusting module is further used for adjusting the amplification factor when the amplification factor does not accord with the distribution rule so as to accord with the distribution rule.
6. The apparatus of claim 5, in which the memristor crossbar array comprises:
the memristor cross array comprises an input end, an analog-to-digital conversion module, a memristor cross array body, a sensing amplifier, a digital-to-analog conversion module and an output end which are sequentially connected.
7. An apparatus to mitigate sneak path effects in a memristor crossbar array, comprising:
a processor, and a memory coupled to the processor;
the memory is used for storing a computer program;
the processor is configured to invoke and execute the computer program in the memory to perform the method of any of claims 1-4.
8. A storage medium, characterized in that the storage medium stores a computer program which, when executed by a processor, implements the method according to any one of claims 1-4.
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| CN102122525A (en) * | 2011-04-14 | 2011-07-13 | 中国人民解放军国防科学技术大学 | Readout amplifying circuit for resistive random access memory (RRAM) cell |
| CN103339682A (en) * | 2011-12-07 | 2013-10-02 | 松下电器产业株式会社 | Cross-point nonvolatile memory and method for forming same |
| CN104252879A (en) * | 2014-09-26 | 2014-12-31 | 中国科学院微电子研究所 | Reading circuit of resistive random access memory |
| CN108648776A (en) * | 2013-02-25 | 2018-10-12 | 美光科技公司 | For compensating the increased equipment of word line voltage, sensing circuit and method |
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|---|---|---|---|---|
| CN102122525A (en) * | 2011-04-14 | 2011-07-13 | 中国人民解放军国防科学技术大学 | Readout amplifying circuit for resistive random access memory (RRAM) cell |
| CN103339682A (en) * | 2011-12-07 | 2013-10-02 | 松下电器产业株式会社 | Cross-point nonvolatile memory and method for forming same |
| CN108648776A (en) * | 2013-02-25 | 2018-10-12 | 美光科技公司 | For compensating the increased equipment of word line voltage, sensing circuit and method |
| CN104252879A (en) * | 2014-09-26 | 2014-12-31 | 中国科学院微电子研究所 | Reading circuit of resistive random access memory |
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