CN111198314A - Thermal resistance testing method for power device - Google Patents
Thermal resistance testing method for power device Download PDFInfo
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- CN111198314A CN111198314A CN202010101361.0A CN202010101361A CN111198314A CN 111198314 A CN111198314 A CN 111198314A CN 202010101361 A CN202010101361 A CN 202010101361A CN 111198314 A CN111198314 A CN 111198314A
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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Abstract
The invention discloses a method for testing thermal resistance of a power device, which can obtain a corresponding junction temperature value by drawing a three-dimensional graph of temperature, current and voltage drop and further measuring the voltage drop value by using the current with a specific numerical value. In the thermal resistance testing process, when the pressure drop value is tested, the numerical value in the database can be automatically called and is brought into the calculation formula of the thermal resistance for calculation, and the more accurate thermal resistance value can be obtained. The invention starts from further accurately evaluating the junction temperature in order to reduce the thermal resistance deviation caused by the error of the measured K coefficient, and further improves the measurement accuracy of the thermal resistance so as to more accurately evaluate the application performance of the device.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for testing thermal resistance of a power device.
Background
The silicon carbide material is a novel third-generation semiconductor material, and is widely applied due to the advantages of larger forbidden band width, high breakdown electric field, high temperature resistance, high conductivity, high heat conductivity and the like. Although silicon carbide materials have good thermal conductivity, the packaged silicon carbide power devices are limited. Particularly, high-voltage high-power silicon carbide devices work in a high-voltage high-current environment, high power consumption causes high junction temperature rise, so high requirements are put on heat dissipation performance, if the heat cannot be effectively transmitted in time, heat accumulation inside the devices can be caused, the junction temperature rise exceeds the bearing range of the devices, and the reliability of the devices is reduced, even the devices fail. A common method for evaluating the heat dissipation capability of a packaged device is to measure the thermal resistance of the product. The smaller the thermal resistance, the better the heat dissipation capability. Therefore, the correct understanding of the physical significance of the thermal resistance of the package and the accurate measurement of the value thereof have important guiding significance for evaluating and improving the heat dissipation capacity of the device and correctly using the device.
Thermal resistances are defined as the thermal resistance R θ JA which is the junction to the external environment and the thermal resistance R θ JC which is the junction to the housing. Wherein the thermal resistance is coupled to the housing R θ JC: the thermal resistance is the thermal resistance of heat transmitted from the chip junction surface to the packaging shell, and an isothermal surface is required to be contacted during measurement, and the thermal resistance is mainly used for evaluating the heat dissipation performance of the heat sink.
At present, the method for measuring the working temperature and the thermal resistance of the semiconductor device is mainly an electrical parameter method. Firstly, a corresponding temperature-sensitive parameter K value is obtained through calculation according to the linear relation between the junction temperature TJ and the forward conduction voltage VF under a specific condition. In the process of measuring the thermal resistance by electrifying, junction voltage drop is measured, and the junction temperature is calculated by combining the K value, the accuracy of the junction temperature has large correlation with the accuracy of the K value, and the accuracy of the K value has an obvious relation with the selection of the sampling current.
The thermal resistance device directly gives the empirical steps 1mA, 5mA, 50 mA.
The sampling current Im is usually selected according to the current-voltage characteristic curve of the device, and a value near an inflection point where the forward current starts to increase significantly in the current-voltage characteristic curve is usually selected as the sampling current.
Then, a K coefficient is calculated at the sampling current.
The junction temperature at different voltage drops is deduced back by the K coefficient. And calculating the thermal resistance value according to the power dissipation and the junction temperature rise condition.
In the two thermal resistance testers of phase11 and T3ster, the selection of sampling current only provides a gear and an empirical value, and the selection reason and principle are not deeply explained.
Through experiments, under the condition that other parameters are the same, when the sampling current is selected TO be 1mA and 10mA, K coefficients are different, the thermal resistance value energy difference of the TO 220650V 10A device is 0.1 ℃/W, and the error is 7% relative TO the integral thermal resistance of 1.4 ℃/W, and attention should be paid.
In addition, with different K coefficient evaluation methods (oil bath method or heating plate method), the accuracy of the evaluated K coefficient is also different, so that the thermal resistance comparability tested by each thermal resistance testing system is poor.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to provide a method for testing thermal resistance of a power device, which aims to solve the technical problems in the prior art.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention provides a method for testing thermal resistance of a power device, which comprises the following steps:
s1, placing the power device to be tested in a high-temperature oven, connecting two tube legs of the power device with a high-temperature-resistant test probe, and connecting the other end of the probe with a curve analyzer;
s2, sequentially setting a plurality of test temperature points in the high-temperature oven;
s3, keeping the temperature at each temperature point for at least 30 minutes to ensure that the junction temperature of the device reaches the balance and is the same as the set temperature of the oven, and measuring an IV curve by a curve analyzer;
s4, fitting a three-dimensional graph of temperature, current and voltage drop according to the IV curves of the temperature points obtained in the step S3;
s5, carrying out thermal resistance test on the power device to be tested by using the current with set numerical value, measuring the voltage drop value, taking the numerical value in the three-dimensional graph, and substituting the numerical value into a calculation formula of thermal resistance to calculate, thus obtaining the thermal resistance value of the power device to be tested.
As a further technical solution, the temperature testing points in step S2 include: 25 deg.C, 50 deg.C, 75 deg.C, 100 deg.C, 125 deg.C, 150 deg.C, 175 deg.C.
As a further technical solution, when the IV curve is measured using the curve analyzer in step S3, the test current ranges from 0mA to 100 mA.
By adopting the technical scheme, the invention has the following beneficial effects:
the method of the invention can obtain the corresponding junction temperature value by drawing a three-dimensional graph of temperature, current and voltage drop and further measuring the voltage drop value by using the current with a specific numerical value. In the thermal resistance testing process, when the pressure drop value is tested, the numerical value in the database can be automatically called and is brought into the calculation formula of the thermal resistance for calculation, and the more accurate thermal resistance value can be obtained. The invention starts from further accurately evaluating the junction temperature in order to reduce the thermal resistance deviation caused by the error of the measured K coefficient, and further improves the measurement accuracy of the thermal resistance so as to more accurately evaluate the application performance of the device.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a three-dimensional plot of temperature, current, and voltage drop provided by an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
The embodiment provides a method for testing thermal resistance of a power device, which aims to solve the technical problems in the prior art.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention provides a method for testing thermal resistance of a power device, which comprises the following steps:
s1, placing the power device to be tested in a high-temperature oven, connecting two tube legs of the power device with a high-temperature-resistant test probe, and connecting the other end of the probe with a curve analyzer;
s2, sequentially setting a plurality of test temperature points in the high-temperature oven;
s3, keeping the temperature at each temperature point for at least 30 minutes to ensure that the junction temperature of the device reaches the balance and is the same as the set temperature of the oven, and measuring an IV curve by a curve analyzer;
s4, further fitting a three-dimensional graph (shown in figure 1) of temperature, current and voltage drop according to the IV curves of the temperature points tested in the step S3;
s5, carrying out thermal resistance test on the power device to be tested by using the current with set numerical value, measuring the voltage drop value, taking the numerical value in the three-dimensional graph, and substituting the numerical value into a calculation formula of thermal resistance to calculate, thus obtaining the thermal resistance value of the power device to be tested.
The thermal resistance value is calculated as follows:
in the formula: t isJRepresenting junction temperature, TCIndicates the shell temperature, PDRepresenting the power of the device, RJCI.e., the thermal resistance of heat transferred from the die interface to the package housing.
In this example, as a further technical solution, the test temperature points in the step S2 include: 25 deg.C, 50 deg.C, 75 deg.C, 100 deg.C, 125 deg.C, 150 deg.C, 175 deg.C. Of course, to further improve the IV curve for obtaining more temperature computers, more temperature points may be set to further mention the accuracy of the test.
In this example, as a further technical solution, when the IV curve is measured using the curve analyzer in step S3, the test current ranges from 0mA to 100 mA. The sampling current should be selected to be large enough to turn on the device and not so large as to cause a significant increase in junction temperature. And (3) finding the starting current and the corresponding voltage drop at room temperature by adopting a semiconductor power device curve analyzer. This is the minimum sampling current. When the sampling current exceeds a certain value, the larger the sampling current is, the more the relation between the voltage drop and the temperature deviates from linearity, and therefore, the maximum sampling current can be selected to be 100 mA.
The main principle of the application is as follows:
composition of forward conduction voltage drop: the voltage drop of a semiconductor device is composed of the chip itself, the internal packaging material (solder layer, lead, frame, etc.), and the like. Different chip designs and different packaging designs have different voltage drop compositions, and the voltage drop of each part is different along with the change of temperature and current density, so that the relation between the voltage drop and the temperature is not linear, and a three-dimensional graph of the TIV can be drawn.
With the three-dimensional database, when a voltage drop value is measured by using a current with a specific value, a corresponding junction temperature value can be obtained. In the thermal resistance testing process, when the pressure drop value is tested, the numerical value in the database can be automatically called and is brought into the calculation formula of the thermal resistance for calculation, and the more accurate thermal resistance value can be obtained.
In summary, the invention provides a method for accurately estimating junction temperature in a thermal resistance test process, which starts from further accurately estimating junction temperature by drawing a three-dimensional graph of junction temperature, current and voltage drop, and further improves the measurement accuracy of thermal resistance so as to more accurately estimate the application performance of a device.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (3)
1. A method for testing thermal resistance of a power device is characterized by comprising the following steps:
s1, placing the power device to be tested in a high-temperature oven, connecting two tube legs of the power device with a high-temperature-resistant test probe, and connecting the other end of the probe with a curve analyzer;
s2, sequentially setting a plurality of test temperature points in the high-temperature oven;
s3, keeping the temperature at each temperature point for at least 30 minutes to ensure that the junction temperature of the device reaches the balance and is the same as the set temperature of the oven, and measuring an IV curve by a curve analyzer;
s4, fitting a three-dimensional graph of temperature, current and voltage drop according to the IV curves of the temperature points obtained in the step S3;
s5, carrying out thermal resistance test on the power device to be tested by using the current with set numerical value, measuring the voltage drop value, taking the numerical value in the three-dimensional graph, and substituting the numerical value into a calculation formula of thermal resistance to calculate, thus obtaining the thermal resistance value of the power device to be tested.
2. The method for testing thermal resistance of a power device according to claim 1, wherein the testing temperature points in step S2 include: 25 deg.C, 50 deg.C, 75 deg.C, 100 deg.C, 125 deg.C, 150 deg.C, 175 deg.C.
3. The method for testing thermal resistance of a power device according to claim 1, wherein when the IV curve is measured by using the curve analyzer in step S3, the test current ranges from 0mA to 100 mA.
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| CN202010101361.0A CN111198314A (en) | 2020-02-19 | 2020-02-19 | Thermal resistance testing method for power device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112526425A (en) * | 2020-10-21 | 2021-03-19 | 中国电子科技集团公司第十三研究所 | Thermal resistance measuring instrument calibration method and device based on thermal resistance standard component |
| CN115629297A (en) * | 2022-12-07 | 2023-01-20 | 北京紫光芯能科技有限公司 | Method, device, equipment and medium for detecting accuracy of thermal resistance value of MCU chip |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102116829A (en) * | 2010-12-21 | 2011-07-06 | 杭州远方光电信息股份有限公司 | Method and device for measuring thermal resistance of diode |
| CN102759544A (en) * | 2012-07-06 | 2012-10-31 | 东南大学 | Method for testing thermal resistance of high-power silicon carbide diode |
| CN103792476A (en) * | 2014-01-17 | 2014-05-14 | 中国空间技术研究院 | Thermal resistance measuring method for semiconductor device |
| CN103970961A (en) * | 2014-05-23 | 2014-08-06 | 重庆大学 | Temperature sensor-free LED junction temperature predicting and controlling method |
-
2020
- 2020-02-19 CN CN202010101361.0A patent/CN111198314A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102116829A (en) * | 2010-12-21 | 2011-07-06 | 杭州远方光电信息股份有限公司 | Method and device for measuring thermal resistance of diode |
| CN102759544A (en) * | 2012-07-06 | 2012-10-31 | 东南大学 | Method for testing thermal resistance of high-power silicon carbide diode |
| CN103792476A (en) * | 2014-01-17 | 2014-05-14 | 中国空间技术研究院 | Thermal resistance measuring method for semiconductor device |
| CN103970961A (en) * | 2014-05-23 | 2014-08-06 | 重庆大学 | Temperature sensor-free LED junction temperature predicting and controlling method |
Non-Patent Citations (1)
| Title |
|---|
| 罗毅飞: "基于电压对电流变化率的 IGBT 结温变化机理及监测方法", 《高电压技术》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112526425A (en) * | 2020-10-21 | 2021-03-19 | 中国电子科技集团公司第十三研究所 | Thermal resistance measuring instrument calibration method and device based on thermal resistance standard component |
| CN112526425B (en) * | 2020-10-21 | 2022-08-05 | 中国电子科技集团公司第十三研究所 | Thermal resistance measuring instrument calibration method and device based on thermal resistance standard component |
| CN115629297A (en) * | 2022-12-07 | 2023-01-20 | 北京紫光芯能科技有限公司 | Method, device, equipment and medium for detecting accuracy of thermal resistance value of MCU chip |
| CN115629297B (en) * | 2022-12-07 | 2023-03-21 | 北京紫光芯能科技有限公司 | Method, device, equipment and medium for detecting accuracy of thermal resistance value of MCU chip |
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