CN111193446A - Modulation parameter generation method and device and inverter - Google Patents
Modulation parameter generation method and device and inverter Download PDFInfo
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- CN111193446A CN111193446A CN202010033230.3A CN202010033230A CN111193446A CN 111193446 A CN111193446 A CN 111193446A CN 202010033230 A CN202010033230 A CN 202010033230A CN 111193446 A CN111193446 A CN 111193446A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
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Abstract
The invention provides a modulation parameter generation method, a modulation parameter generation device and an inverter, wherein the method comprises the following steps: acquiring a power-on initial value of a static memory SRAM when an IC chip is started; generating a first random number and a second random number according to the power-on initial value; and generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter cooperatively according to the first random number and the second random number. The invention solves the technical problem of uneven distribution of inverter output harmonics in the related technology, can effectively eliminate discrete spectrum components in frequency spectrum, can effectively inhibit switching frequency and higher harmonics at integral multiples of the switching frequency, has better harmonic dispersion effect, obviously reduces the amplitude of the output voltage and current higher harmonics of the inverter, and more uniformly distributes the frequency spectrum in a wider frequency band range, thereby reducing the faults of electromagnetic interference, switching noise, mechanical vibration of a motor and the like in the actual production process.
Description
Technical Field
The invention relates to the field of motor control, in particular to a modulation parameter generation method and device and an inverter.
Background
In the related art, Space Vector Pulse Width Modulation (SVPWM) is a basic control method of a voltage source inverter because of its advantages of low switching loss, high bus voltage utilization rate, and the like.
In the related art, the SVPWM controlled inverter is usually operated at a constant switching frequency, so that harmonics having a large amplitude occur at integral multiples of the switching frequency, which are the main causes of electromagnetic interference, switching noise, and mechanical vibration of the motor. The best way to reduce the switching noise radiation is to make the switching frequency of the inverter reach above 20kHz, but this way greatly increases the switching loss of the inverter, which is not good for the normal operation of the inverter. The SVPWM power spectral density in the related art has the problem of discrete spectral components, so that harmonic waves with larger amplitude appear at integral multiples of the switching frequency, and random number distribution generated by the SVPWM modulation technology based on the random number generator in the related art is not uniform enough, unpredictability is poor, the period is long, and the harmonic suppression effect is not obvious.
In view of the above problems in the related art, no effective solution has been found at present.
Disclosure of Invention
The embodiment of the invention provides a modulation parameter generation method and device and an inverter, and aims to solve the technical problem of uneven distribution of output harmonic waves of the inverter in the related art.
According to an embodiment of the present invention, there is provided a method for generating a modulation parameter, including: acquiring a power-on initial value of a Static Random-access memory (SRAM) when an Integrated Circuit (IC) Chip is started; generating a first random number and a second random number according to the power-on initial value; and generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter cooperatively according to the first random number and the second random number.
Optionally, the generating a first random number and a second random number according to the power-on initial value includes: setting the power-on initial value as a true random number seed; generating a first random sequence based on a first random number generator with the true random number seed as input, wherein the first random sequence comprises a plurality of first random numbers; generating a second random sequence based on a second random number generator with the first random sequence as an input, wherein the second random sequence comprises a plurality of second random numbers.
Optionally, the generating a first random number and a second random number according to the power-on initial value includes: setting a plurality of the power-on initial values as true random number sequences; generating k random numbers by a first random number generator with an initial value in the true random number sequence as an input, and sequentially storing the k random numbers in a vector sequence L ═ { L ═1,l2,...,lkIn the method, k is a positive integer greater than 1; generating a random integer j with a second random number generator, wherein j ∈ [1, k ]](ii) a Let X1＝ljContinuing to generate a random number sequence by using the first random number generator until the true random number sequence is exhausted to obtain a random number sequence { X }1...XiI is a positive integer.
Optionally, the first random number generator is a Logistic mapper according to the following mapping relation:
ln＝aln-1(1-ln-1),ln∈(0,1)；
the second random number generator is a hybrid congruence generator of the following recursion formula:
wherein x is0As an initial value, a is a multiplier, c is a preset increment, and m is a preset modulus.
Optionally, the following constraints are included between the first random number generator and the second random number generator: m > x0，m＞a，m＞c，a≥0，c≥0。
Optionally, cooperatively generating the SVPWM random parameter of the inverter according to the first random number and the second random number includes: cooperatively generating a random number sequence based on a combination of the first random number and the second random number; and determining the random number sequence as a random position delay coefficient and a switching frequency random coefficient of the inverter according to the sequence.
According to another embodiment of the present invention, there is provided a modulation parameter generation apparatus including: the acquisition module is used for acquiring a power-on initial value of the static memory SRAM when the IC chip is started; the generating module is used for generating a first random number and a second random number according to the power-on initial value; and the generating module is used for cooperatively generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter according to the first random number and the second random number.
Optionally, the generating module includes: the first setting unit is used for setting the power-on initial value as a true random number seed; a first generating unit, configured to generate a first random sequence based on a first random number generator with the true random number seed as an input, where the first random sequence includes a plurality of first random numbers; and the second generation unit is used for generating a second random sequence based on a second random number generator by taking the first random sequence as input, wherein the second random sequence comprises a plurality of second random numbers.
Optionally, the generating module includes: the second setting unit is used for setting the plurality of power-on initial values as true random number sequences; a third generating unit, configured to generate k random numbers by using the first random number generator with the initial value in the true random number sequence as an input, and sequentially store the k random numbers until a vector sequence L ═ { L ═ is obtained1,l2,...,lkIn the method, k is a positive integer greater than 1; a fourth generation unit for generating a random integer j with the second random number generator, wherein j ∈ [1, k ∈ [ ]](ii) a A fifth generating unit for making x1＝ljContinuing to generate a random number sequence by using the first random number generator until the true random number sequence is exhausted to obtain a random number sequence { x }1...xiI is a positive integer.
Optionally, the first random number generator is a Logistic mapper according to the following mapping relation:
ln＝aln-1(1-ln-1),ln∈(0,1)；
the second random number generator is a hybrid congruence generator of the following recursion formula:
wherein x is0As an initial value, a is a multiplier, c is a preset increment, and m is a preset modulus.
Optionally, the following constraints are included between the first random number generator and the second random number generator: m > x0，m＞a，m＞c，a≥0，c≥0。
Optionally, the generating module includes: a generation unit configured to cooperatively generate a random number sequence based on a combination of the first random number and the second random number; and the determining unit is used for determining the random number sequence as a random position delay coefficient and a switching frequency random coefficient of the inverter according to the sequence.
According to a further embodiment of the present invention, there is provided an inverter including the apparatus as described in the above embodiment.
According to a further embodiment of the present invention, there is also provided a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps in any of the apparatus embodiments described above when executed.
According to yet another embodiment of the present invention, there is also provided an electronic device, including a memory in which a computer program is stored and an IC chip configured to run the computer program to perform the steps in any one of the above method embodiments.
According to the invention, the power-on initial value of the static memory SRAM when the IC chip is started is obtained, then the first random number and the second random number are generated according to the power-on initial value, finally the SVPWM random parameter of the inverter is generated according to the first random number and the second random number in a cooperative manner, the random number used for random SVPWM modulation is more random and the output harmonic distribution is more uniform by adopting the double random modulation parameter, the technical problem of nonuniform distribution of the output harmonic of the inverter in the related technology is solved, the discrete spectrum components in the frequency spectrum can be effectively eliminated, the higher harmonics at the switching frequency and the integral multiple of the switching frequency can be effectively inhibited, the harmonic dispersion effect is better, the output voltage and current harmonic amplitude of the inverter is remarkably reduced, the frequency spectrum is more uniformly distributed in a wider frequency band range, and the electromagnetic interference, the higher harmonics and the like in the actual production process are further reduced, Switching noise and mechanical vibration of the motor.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
fig. 1 is a block diagram of an inverter according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method for generating modulation parameters according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a random pulse position SVPWM switching function according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a random switching frequency SVPWM switching function according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a dual random SVPWM switching function according to an embodiment of the present invention;
FIG. 6 is a spatial vector distribution diagram of a double-random-based double-zero-vector random pulse position PWM algorithm according to an embodiment of the present invention;
FIG. 7 is a flow chart of an embodiment of the present invention for outputting a random number of pulse positions and switching frequencies by a random number generator;
fig. 8 is a block diagram of a modulation parameter generation apparatus according to an embodiment of the present invention.
Detailed Description
The invention will be described in detail hereinafter with reference to the accompanying drawings in conjunction with embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Example 1
The method provided by the first embodiment of the present application may be executed in a controller, an inverter, a processor, or a similar computing device. Taking an inverter as an example, fig. 1 is a block diagram of an inverter according to an embodiment of the present invention. As shown in fig. 1, inverter 10 may include one or more (only one shown in fig. 1) processors 102 (processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, and optionally, an input/output device 108. It will be understood by those skilled in the art that the structure shown in fig. 1 is merely illustrative and is not intended to limit the structure of the inverter. For example, the inverter 10 may also include more or fewer components than shown in fig. 1, or have a different configuration than shown in fig. 1.
The memory 104 may be used to store an inverter program, for example, a software program and a module of application software, such as an inverter program corresponding to a modulation parameter generation control method in the embodiment of the present invention, and the processor 102 executes various functional applications and data processing by running the inverter program stored in the memory 104, so as to implement the method described above. The memory 104 may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, memory 104 may further include memory remotely located from processor 102, which may be connected to inverter 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device 106 is used for receiving or transmitting data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the inverter 10. In one example, the transmission device 106 includes a Network adapter (NIC), which can be connected to other Network devices through a base station so as to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is used for communicating with the internet in a wireless manner.
In this embodiment, a method for generating a modulation parameter is provided, and fig. 2 is a flowchart of a method for generating a modulation parameter according to an embodiment of the present invention, as shown in fig. 2, the flowchart includes the following steps:
step S202, acquiring a power-on initial value of a static memory SRAM when the IC chip is started;
the IC chip of the present embodiment may be a Digital Signal Processor (DSP) system, or may be any IC chip system including an SRAM, such as an ARM. Based on the powerful computing processing capability of the DSP system, the chip using the SVPWM algorithm is usually a DSP chip, but may be other chips.
The DSP chip in this embodiment is only one of the alternative embodiments, and those skilled in the art will understand that any IC chip including SRAM using the combined random number generator of this embodiment is within the scope of the present invention.
After the IC chip is powered on, a sampling filtering algorithm is used for intercepting the power-on initial value of the SRAM, and the intercepted data amount is one byte each time and is used as a true random number seed sequence.
Step S204, generating a first random number and a second random number according to the power-on initial value;
and step S206, generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter according to the first random number and the second random number in a coordinated mode.
The space vector pulse width modulation SVPWM random parameters of the present embodiment include random numbers for double randomization of pulse position and switching frequency.
Through the steps, the power-on initial value of the static memory SRAM when the IC chip is started is obtained, then the first random number and the second random number are generated according to the power-on initial value, finally the SVPWM random parameter of the inverter is generated according to the first random number and the second random number in a cooperative way, the random number used for random SVPWM modulation is more random and the output harmonic distribution is more uniform by adopting the double random modulation parameter and the double random modulation parameter, the technical problem of non-uniform distribution of the inverter output harmonic in the related technology is solved, the discrete spectrum component in the frequency spectrum can be effectively eliminated, the higher harmonics at the switching frequency and the integral multiple of the switching frequency can be effectively inhibited, the harmonic dispersion effect is better, the amplitude of the output voltage and the current higher harmonics of the inverter is obviously reduced, and the frequency spectrum is more uniformly distributed in a wider frequency band range, and further reduce faults such as electromagnetic interference, switching noise, mechanical vibration of the motor and the like in the actual production process.
In this embodiment, cooperatively generating the SVPWM random parameter of the inverter according to the first random number and the second random number includes: cooperatively generating a random number sequence based on a combination of the first random number and the second random number; and determining the random number sequence as a random position delay coefficient and a switching frequency random coefficient of the inverter according to the sequence. And the combined random number generator based on the first random number generator and the second random number generator cooperatively generates SVPWM random parameters of the inverter. The random position delay coefficient and the random switching frequency coefficient are generated based on a combined random number generator, each generated random number has more independence and is distributed more uniformly in probability space, the frequency of each sequence in the sequence is equal or approximately equal (uniform distribution), and any one sequence in the sequence cannot be deduced from other numbers (independence).
Fig. 3 is a schematic diagram of a random pulse position SVPWM switching function according to an embodiment of the present invention, fig. 4 is a schematic diagram of a random switching frequency SVPWM switching function according to an embodiment of the present invention, fig. 5 is a schematic diagram of a dual random SVPWM switching function according to an embodiment of the present invention, which combines the random pulse position SVPWM switching function shown in fig. 3 and the random switching frequency SVPWM switching function shown in fig. 4, and the following explanation and explanation are provided:
double random finger of the present embodimentIs the pulse position delay coefficient epsilonkAnd the pulse switching period TkIs random. Random switching function: the switching function of random PWM can be expressed as:
satisfying the following constraint condition that 0 is not more than αk+εkLess than or equal to 1, wherein, αkIs the duty cycle.
A schematic diagram of the switching function of the random pulse position SVPWM technique is shown in fig. 3. Switching period T at this timekIs a constant, modulation parameter epsilonkVarying within a certain range according to a certain random law. The degree of random variation of the position of the PWM pulse within one switching period is defined as:
A schematic diagram of the switching function of the random switching frequency SVPWM technique is shown in fig. 4. Parameter T at this timekVarying within a certain range according to a certain random law. For random switching frequency modulation, the frequency randomness is defined as:
wherein: t issAs a central switching period; t ismaxAnd TminRespectively the minimum and maximum values of the pulse switching period.
If the two parameters are simultaneously changed randomly, the double random SVPWM technology is adopted. As can be seen from fig. 5, the switching frequency of the pulse and the position of the pulse in different carrier periods both change randomly.
In one implementation of this embodiment, generating the first random number and the second random number according to the power-on initial value includes:
s11, setting the power-on initial value as a true random number seed;
s12, generating a first random sequence based on a first random number generator by taking the true random number seed as input, wherein the first random sequence comprises a plurality of first random numbers;
s13, generating a second random sequence based on a second random number generator with the first random sequence as input, wherein the second random sequence includes a plurality of second random numbers.
In another implementation of this embodiment, generating the first random number and the second random number according to the power-on initial value includes:
s21, setting a plurality of power-on initial values as true random number sequences;
s22, using the initial value in the true random number sequence as input, generating k random numbers by the first random number generator, and sequentially storing the k random numbers in the vector sequence L ═ L1,l2,...,lkIn the method, k is a positive integer greater than 1;
optionally, the first random number generator is a Logistic mapper with the following mapping relation:
ln＝aln-1(1-ln-1),ln∈(0,1)；
s23, generating a random integer j by a second random number generator, wherein j belongs to [1, k ];
s24, let x1＝ljContinuing to generate the random number sequence with the first random number generator until the true random number sequence is exhausted to obtain a random number sequence { x }1...xiI is a positive integer.
Optionally, the second random number generator is a hybrid congruence generator of the following recursion formula:
wherein x is0As an initial value, a is a multiplier, c is a preset increment, and m is a preset modulus.
In a preferred embodiment, the following constraints are included between the first random number generator and the second random number generator: m > x0M is more than a, m is more than c, a is more than or equal to 0, and c is more than or equal to 0. Through the random number generator and the constraint condition of the embodiment, the random number has more randomness, and the output harmonic distribution is more uniform.
Fig. 6 is a spatial vector distribution diagram of a double-random double-zero-vector random pulse position PWM algorithm based on an embodiment of the present invention, which includes six sectors and two regions, where a zero vector of the region 1 is V (000), a zero vector of the region 2 is V (111), and a modulation process includes: when the modulation ratio M is less than or equal to epsilon (epsilon is (0,1)), V (000) is adopted as a zero vector, and when M is more than or equal to epsilon, V (111) is adopted as a zero vector, so that double-zero vector SVPWM modulation is realized.
Fig. 7 is a flowchart of outputting a pulse position and a switching frequency random number by a random number generator according to an embodiment of the present invention, in this implementation scenario, dual random SVPWM modulation first implements the randomization of the pulse position T, and then calculates a random coefficient R of the switching frequency. The DSP platform is used for commonly providing abundant SRAM resources, noise in the power-on process of an SRAM memory unit is used for extracting true random number seeds, and the true random number seeds are used as input of a pseudo random number generator to generate a large number of random numbers. The method comprises the following steps:
and S71, when the DSP system is started, extracting the power-on initial value of the SRAM and acquiring the true random number seed.
After the DSP is powered on, a relevant sampling filtering algorithm is used for intercepting the power-on initial value of the SRAM, and the intercepted data amount is one byte as a true random number seed sequence. Then, inputting the seed sequence into a first random number generator Logistic mapping to generate a random function between 0 and 1, inputting the seed sequence into a second random number generator mixed congruence generator to generate a random number within a byte (including a byte) as a selection base number of the first random function, circularly operating in such a way, generating a byte random number (each random number occupies a bit) in each clock period (crystal oscillation period), processing by a program, and sequentially selecting two random numbers as a pulse random position coefficient and a switching frequency random coefficient.
The power-on initial value of the present embodiment is based on a Physical Unclonable Function (PUF), which is a hardware security component that is based on random deviations during chip manufacturing, so that each PUF has uniqueness and is physically unclonable. A large number of true random numbers are extracted by utilizing the randomness of deflection time when different memory cells are programmed. In the power-on process, due to the influence of environmental factors such as external noise, temperature and the like, a part of memory cells oscillate in a state of 0 or 1 being unstable, and power-on at different moments can form a series of response pairs of power-on SRAM values. Because the SRAM generally exists in the IC, the PUF only needs to use a standard access interface to read a power-on initial value, and the use is very convenient.
The SRAM PUF uses the SRAM widely existing in the chip as the PUF, and due to the random deviation of the manufacturing, symmetrical transistors are designed in the cell of the SRAM, but actually, there is a slight difference, and finally, the power supply values of different SRAMs are completely different. Due to the influence of environmental noise, the power-on initial values of the same SRAM are not completely the same, and certain randomness is presented. The true random number seed is used as an input to a combined random number generator to generate a large number of random sequences.
S72, generating k random numbers by a first generator, and sequentially storing the k random numbers in a vector L ═ L1,l2,...,lkSimultaneously setting i as 1;
the first random number generator generates a first random number x by using Logistic mappingnThe mapping relation is as follows:
ln＝aln-1(1-ln-1),ln∈(0,1)；
s73, for the random number xnAssigning and outputting a seed, a multiplier, a value added and a modulus row;
s74, judging whether any number of the output memories is output; if yes, re-assigning values, otherwise, executing S75;
s75, generating a random integer j by a second generator, wherein j must satisfy j ∈ [1, k ];
the second random number generator adopts a mixed congruence generator, and the recursion formula is as follows:
let Xi＝ljThen the first generator is used to generate the next random number sequence L' ═ L1',l2',...,lk', juxtaposing i + 1;
repeating the above steps to obtain a new random number sequence { X ] generated by the combined generatori}。
In the above formula, x0: initial value (seed), a: multiplier (multiplier), c: increment (adductconstant), m: modulus (mondulus), mod: and (6) performing modulus operation. The constraint conditions are as follows:
obtaining random result and determining position delay coefficient epsilonk：εk＝xiSwitching frequency random coefficient R: r ═ xi+1；
S76, outputting a number in the power-on random number sequence;
s77, advancing each number behind the output number in the SRAM by one address;
s78, judging that the known sequences in the SRAM are completely output; if yes, judging whether the operation needs to be continued, if not, returning to S74 and continuing to execute;
s79, if the operation needs to be continued, the true random number sequence is introduced again (which may be different from the previous introduction), and if not, the flow ends.
The SVPWM modulation technology of the embodiment is characterized in that a novel combined random number generator is utilized to generate random coefficients aiming at double randomization of pulse position and switching frequency, so that the random numbers for random SVPWM modulation are more random, the output harmonic distribution is more uniform, and the SVPWM modulation technology of the embodiment can better solve the problems of unbalanced and distorted output voltage and the problem of larger harmonic amplitude of power spectral density of inverter output voltage and current at integral multiple of switching frequency in the conventional SVPWM modulation algorithm, so that the higher harmonic amplitudes of the output voltage and the current are obviously reduced, the frequency spectrum is more uniformly distributed in a wider frequency band range, and further the electromagnetic interference, the harmonic distortion and the like in the actual production process are better solved, Switching noise and mechanical vibration of the motor.
Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (such as a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
Example 2
In this embodiment, a modulation parameter generating device and an inverter are further provided, which are used to implement the foregoing embodiments and preferred embodiments, and are not described again after being described. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
An embodiment provides a modulation parameter generating apparatus, and fig. 8 is a block diagram of a modulation parameter generating apparatus according to an embodiment of the present invention, where the apparatus includes: an acquisition module 80, a generation module 82, a generation module 84, wherein,
an obtaining module 80, configured to obtain a power-on initial value of a static memory SRAM when an IC chip is started;
a generating module 82, configured to generate a first random number and a second random number according to the power-on initial value;
and a generating module 84, configured to cooperatively generate a Space Vector Pulse Width Modulation (SVPWM) random parameter of the inverter according to the first random number and the second random number.
Optionally, the generating module includes: the first setting unit is used for setting the power-on initial value as a true random number seed; a first generating unit, configured to generate a first random sequence based on a first random number generator with the true random number seed as an input, where the first random sequence includes a plurality of first random numbers; and the second generation unit is used for generating a second random sequence based on a second random number generator by taking the first random sequence as input, wherein the second random sequence comprises a plurality of second random numbers.
Optionally, the generating module includes: the second setting unit is used for setting the plurality of power-on initial values as true random number sequences; a third generating unit, configured to generate k random numbers by using the first random number generator with the initial value in the true random number sequence as an input, and sequentially store the k random numbers until a vector sequence L ═ { L ═ is obtained1,l2,...,lkIn the method, k is a positive integer greater than 1; a fourth generation unit for generating a random integer j with the second random number generator, wherein j ∈ [1, k ∈ [ ]](ii) a A fifth generating unit for making x1＝ljContinuing to generate a random number sequence by using the first random number generator until the true random number sequence is exhausted to obtain a random number sequence { x }1...xiI is a positive integer.
Optionally, the first random number generator is a Logistic mapper according to the following mapping relation:
ln＝aln-1(1-ln-1),ln∈(0,1)；
the second random number generator is a hybrid congruence generator of the following recursion formula:
wherein x is0As initial values, a is a multiplier, c is a predetermined increment, m is a predetermined modulus,
optionally, the following constraints are included between the first random number generator and the second random number generator: m > x0，m＞a，m＞c，a≥0，c≥0。
Optionally, the generating module includes: a generation unit configured to cooperatively generate a random number sequence based on a combination of the first random number and the second random number; and the determining unit is used for determining the random number sequence as a random position delay coefficient and a switching frequency random coefficient of the inverter according to the sequence.
The embodiment also provides an inverter comprising the device in the embodiment.
It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.
Example 3
Embodiments of the present invention also provide a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the above method embodiments when executed.
Alternatively, in an aspect of the present embodiment, the storage medium may be configured to store a computer program for executing the steps of:
s1, acquiring a power-on initial value of the static memory SRAM when the IC chip is started;
s2, generating a first random number and a second random number according to the power-on initial value;
and S3, cooperatively generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter according to the first random number and the second random number.
Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing computer programs, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.
Embodiments of the present invention also provide an electronic device comprising a memory having a computer program stored therein and a processor arranged to run the computer program to perform the steps of any of the above method embodiments.
Optionally, the electronic apparatus may further include a transmission device and an input/output device, wherein the transmission device is connected to the processor, and the input/output device is connected to the processor.
Optionally, in an aspect of this embodiment, the processor may be configured to execute the following steps by a computer program:
s1, acquiring a power-on initial value of the static memory SRAM when the IC chip is started;
s2, generating a first random number and a second random number according to the power-on initial value;
and S3, cooperatively generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter according to the first random number and the second random number.
Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation manners, and this embodiment is not described herein again.
It will be apparent to those skilled in the art that the modules or steps of the present invention described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple ones of them may be fabricated into a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A method for generating modulation parameters, comprising:
acquiring a power-on initial value of a static memory SRAM when an integrated circuit IC chip is started;
generating a first random number and a second random number according to the power-on initial value;
and generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter cooperatively according to the first random number and the second random number.
2. The method of claim 1, wherein generating a first random number and a second random number according to the power-on initial value comprises:
setting the power-on initial value as a true random number seed;
generating a first random sequence based on a first random number generator with the true random number seed as input, wherein the first random sequence comprises a plurality of first random numbers;
generating a second random sequence based on a second random number generator with the first random sequence as an input, wherein the second random sequence comprises a plurality of second random numbers.
3. The method of claim 1, wherein generating a first random number and a second random number according to the power-on initial value comprises:
setting a plurality of the power-on initial values as true random number sequences;
taking an initial value in the true random number sequence as an input, generating k random numbers through a first random number generator, and sequentially storing the k random numbers to a vectorSequence L ═ { L1,l2,···,lkIn the method, k is a positive integer greater than 1;
generating a random integer j with a second random number generator, wherein j belongs to [1, k ];
let x1＝ljContinuing to generate a random number sequence by using the first random number generator until the true random number sequence is exhausted to obtain a random number sequence { x }1...xiI is a positive integer.
4. The method of claim 3, wherein,
the first random number generator is a Logistic mapper with the following mapping relation:
ln＝aln-1(1-ln-1),ln∈(0,1)；
the second random number generator is a hybrid congruence generator of the following recursion formula:
wherein x is0As an initial value, a is a multiplier, c is a preset increment, and m is a preset modulus.
5. The method of claim 4, wherein the constraints between the first random number generator and the second random number generator are:
m＞x0，m＞a，m＞c，a≥0，c≥0。
6. the method according to any one of claims 1 to 5, wherein cooperatively generating SVPWM random parameters of an inverter from the first random number and the second random number comprises:
cooperatively generating a random number sequence based on a combination of the first random number and the second random number;
and determining the random number sequence as a random position delay coefficient and a switching frequency random coefficient of the inverter according to the sequence.
7. An apparatus for generating modulation parameters, comprising:
the acquisition module is used for acquiring a power-on initial value of the static memory SRAM when the integrated circuit IC chip is started;
the generating module is used for generating a first random number and a second random number according to the power-on initial value;
and the generating module is used for cooperatively generating Space Vector Pulse Width Modulation (SVPWM) random parameters of the inverter according to the first random number and the second random number.
8. An inverter, comprising: the apparatus of claim 7.
9. A storage medium, in which a computer program is stored, wherein the computer program is arranged to perform the method of any of claims 1 to 6 when executed.
10. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and wherein the processor is arranged to execute the computer program to perform the method of any of claims 1 to 6.
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