CN111192913A - Display panel and preparation method thereof - Google Patents
Display panel and preparation method thereof Download PDFInfo
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- CN111192913A CN111192913A CN202010142851.5A CN202010142851A CN111192913A CN 111192913 A CN111192913 A CN 111192913A CN 202010142851 A CN202010142851 A CN 202010142851A CN 111192913 A CN111192913 A CN 111192913A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
- H10K71/164—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using vacuum deposition
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
- H10K71/166—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask
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- Electroluminescent Light Sources (AREA)
Abstract
The application discloses a display panel and a preparation method thereof, wherein the display panel comprises an array substrate; the gap sub-layers are arranged on the array substrate at intervals; the OLED device layer is arranged on the part of the array substrate, which is not provided with the gap sub-layer; a cathode layer disposed on the gap sub-layer and the OLED device layer; the thin film packaging layer is arranged on the cathode layer, the gap sub-layer comprises a plurality of spacers, and the longitudinal section of each spacer in one direction is in an inverted trapezoid shape. The inverse trapezoid can increase the contact area with the precise metal mask plate in the evaporation process, effectively support the precise metal mask plate and reduce the risks of color mixing and dislocation; on the other hand, the inorganic material is adopted to prepare the spacer, so that the spacer has a larger Young modulus, the spacer can be prevented from being scratched by a precise metal mask in the evaporation process, and the yield of the display panel is increased.
Description
Technical Field
The application relates to the technical field of display panels, in particular to a display panel and a preparation method thereof.
Background
The Organic Light Emitting Diode (OLED) has the characteristics of self-luminescence, high response speed, wide viewing angle and the like, and has wide application prospect. At present, all OLED devices use a precision Metal Mask (FMM) to realize evaporation of RGB luminescent materials by evaporation of small-molecule organic luminescent materials. Because FMM makes the degree of difficulty great, and very easy the flagging appears, leads to abnormalities such as evaporation coating colour mixture, dislocation, so can set up the clearance sublayer (PS) on the base plate, play the effect of supporting FMM to avoid evaporation coating colour mixture and dislocation. PS is usually performed in the array process, and is mainly formed by coating a layer of organic material and performing photolithography. However, the organic material is soft and is easily scratched by FMM during the evaporation process, which results in panel failure during the reliability test.
Therefore, there is a need to develop a new display panel to overcome the drawbacks of the prior art.
Disclosure of Invention
The invention aims to provide a display panel, which can solve the problem that a precise metal mask plate easily scratches a gap sublayer in the evaporation process of an OLED device in the prior art so as to cause packaging failure.
In order to achieve the above object, the present invention provides a display panel, including an array substrate; the gap sub-layers are arranged on the array substrate at intervals; the OLED device layer is arranged on the part of the array substrate, which is not provided with the gap sub-layer; a cathode layer disposed on the gap sub-layer and the OLED device layer; and the thin film packaging layer is arranged on the cathode layer.
Further, in other embodiments, the spacer layer includes a plurality of spacers, and a longitudinal cross section of the spacer in one direction is an inverted trapezoid.
Further, in other embodiments, the material used for the gap sub-layer is an inorganic material, and at least one of silicon oxide, silicon nitride, and silicon oxynitride is selected, but not limited thereto. The inorganic material is adopted to prepare the spacers, so that the spacers have a larger Young modulus, the spacers can be prevented from being scratched by a precise metal mask in the evaporation process, and the yield of the display panel is increased.
Further, in other embodiments, the array substrate includes a thin film transistor structure layer; the interlayer dielectric layer is arranged on the thin film transistor structure layer; the flat layer is arranged on the interlayer dielectric layer; the pixel definition layer is arranged on the flat layer and is provided with an opening; the anode layer is arranged in the opening of the pixel defining layer; wherein the gap sub-layer is disposed on the pixel defining layer, and the OLED device layer is disposed on the anode layer.
Further, in other embodiments, wherein the thin film encapsulation layer comprises a first inorganic layer disposed on the cathode layer; a first organic layer disposed on the first inorganic layer. The thin film packaging layer can block the invasion of water and oxygen.
Further, in other embodiments, the thin film transistor structure layer comprises a substrate layer; the active layer is arranged on the substrate base plate; a gate insulating layer disposed on the active layer; a gate electrode layer disposed on the gate insulating layer; and the source drain layer is arranged on the grid layer.
In order to achieve the above object, the present invention further provides a manufacturing method for manufacturing the display panel according to the present invention, the manufacturing method including the steps of: providing an array substrate; preparing gap sub-layers on the array substrate, wherein the gap sub-layers are arranged on the array substrate at intervals; preparing an OLED device layer on the part of the array substrate, where the gap sub-layer is not arranged; preparing a cathode layer on the OLED device layer and the spacers; and preparing a thin film packaging layer on the cathode layer.
Further, in other embodiments, the step of preparing the OLED device layer comprises: and evaporating an organic light-emitting material by using a precise metal mask to form the OLED device layer. The trapezoidal clearance of falling can increase the area of contact with accurate metal mask version among the coating by vaporization process, effectively supports accurate metal mask version, reduces the risk of colour mixture and dislocation.
Further, in other embodiments, wherein the interstitial sub-layers are formed using physical vapor deposition or chemical vapor deposition.
Further, in other embodiments, the step of providing an array substrate includes providing a thin film transistor structure layer; preparing an interlayer dielectric layer on the substrate; preparing a flat layer on the interlayer dielectric layer; preparing a pixel defining layer on the flat layer, wherein the pixel defining layer is provided with an opening; preparing an anode layer on the opening of the pixel defining layer; wherein the gap sub-layer is disposed on the pixel defining layer, and the OLED device layer is disposed on the anode layer.
Further, in other embodiments, the pixel defining layer is formed by photolithography after coating with an organic material.
Further, in other embodiments, the step of preparing the thin film encapsulation layer comprises: depositing a first inorganic layer on the cathode layer; a first organic layer is deposited over the first inorganic layer.
Compared with the prior art, the invention has the beneficial effects that: the invention provides a display panel and a preparation method thereof, wherein a gap with an inverted trapezoid shape is prepared, the inverted trapezoid shape can increase the contact area with a precise metal mask in an evaporation process, the precise metal mask is effectively supported, and the risks of color mixing and dislocation are reduced; on the other hand, the inorganic material is adopted to prepare the spacer, so that the spacer has a larger Young modulus, the spacer can be prevented from being scratched by a precise metal mask in the evaporation process, and the yield of the display panel is increased.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;
fig. 2 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of the display panel manufacturing method in step S1 according to the embodiment of the present application;
fig. 4 is a schematic structural diagram of the display panel manufacturing method in step S2 according to the embodiment of the present application;
fig. 5 is a schematic structural diagram of the display panel manufacturing method provided in the embodiment of the present application when step S5 is performed.
Reference numerals:
a display panel-100;
an array substrate-110; a gap sublayer-120;
OLED device layer-130; a cathode layer-140;
film encapsulation layer-150; spacer-121;
thin film transistor structure layer-111; an interlayer dielectric layer-112;
a planarization layer-113; pixel definition layer-114;
anode layer-115;
a first inorganic layer-151; a first organic layer-152.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
Specifically, referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel 100 according to an embodiment of the present invention, where the display panel 100 includes an array substrate 110, a gap sub-layer 120, an OLED device layer 130, a cathode layer 140, and a thin film encapsulation layer 150.
The array substrate 110 includes a thin film transistor structure layer 111; an interlayer dielectric layer 112 arranged on the thin film transistor structure layer 111; a planarization layer 113 disposed on the interlayer dielectric layer 112; a pixel defining layer 114 disposed on the planarization layer 113 and having an opening; and an anode layer 115 disposed in the opening of the pixel defining layer 114.
Specifically, the thin film transistor structure layer 111 includes a substrate layer; an active layer disposed on the substrate base plate; a gate insulating layer disposed on the active layer; a gate electrode layer disposed on the gate insulating layer; and the source drain layer is arranged on the grid layer. The design point of the present disclosure is in the gap sub-layer 120, and thus the detailed structure of the thin film transistor structure layer 111 is not described in detail.
The gap sub-layer 120 is arranged on the pixel defining layer 114 at intervals, the gap sub-layer 120 comprises a plurality of gaps 121, the longitudinal section of each gap 121 in one direction is inverted trapezoid, the gaps 121 in inverted trapezoids can increase the contact area with the precise metal mask in the evaporation process, the precise metal mask can be effectively supported, and the risks of color mixing and dislocation are reduced.
The gap sub-layer 120 is made of an inorganic material, and at least one of silicon oxide, silicon nitride, and silicon oxynitride is selected. The inorganic material is adopted to prepare the spacers, so that the spacers have a larger Young modulus, the spacers can be prevented from being scratched by a precise metal mask in the evaporation process, and the yield of the display panel 100 is increased.
An OLED device layer 130 is disposed on anode layer 115, and a cathode layer 140 is disposed on gap sublayer 120 and OLED device layer 130.
A thin film encapsulation layer 150 disposed on the cathode layer 140, the thin film encapsulation layer 150 including a first inorganic layer 151 disposed on the cathode layer 140; the first organic layer 152 is disposed on the first inorganic layer 151. The thin film encapsulation layer 150 can block the invasion of water and oxygen.
Referring to fig. 2, fig. 2 is a flowchart illustrating a method for manufacturing the display panel 100 according to the present embodiment. The preparation method comprises the steps of S1-S5.
Step S1: providing an array substrate 110; referring to fig. 3, fig. 3 is a schematic structural diagram of the manufacturing method of the display panel provided in this embodiment in step S1.
Providing an array substrate 110 includes providing a thin film transistor structure layer 111; preparing an interlayer dielectric layer 112 on the substrate; preparing a flat layer 113 on the interlayer dielectric layer 112; preparing a pixel defining layer 114 on the planarization layer 113, the pixel defining layer 114 having an opening; preparing an anode layer 115 on the opening of the pixel defining layer 114; wherein the gap sub-layer 120 is disposed on the pixel defining layer 114 and the OLED device layer 130 is disposed on the anode layer 115. The pixel defining layer 114 is formed by photolithography after coating an organic material.
Step S2: preparing gap sublayers 120 on the array substrate 110, wherein the gap sublayers 120 are arranged on the array substrate 110 at intervals; referring to fig. 4, fig. 4 is a schematic structural diagram of the display panel manufacturing method provided in this embodiment in step S2.
Wherein the gap sub-layer 120 is formed by physical vapor deposition or chemical vapor deposition.
The gap sub-layer 120 comprises a plurality of gaps 121, the longitudinal section of each gap 121 in one direction is in an inverted trapezoid shape, the gaps are in inverted trapezoid shapes, the contact area between the vapor deposition process and a precise metal mask can be increased, the precise metal mask can be effectively supported, and the risks of color mixing and dislocation are reduced.
The gap sub-layer 120 is made of an inorganic material, and at least one of silicon oxide, silicon nitride, or silicon oxynitride is selected, but not limited thereto. The inorganic material is adopted to prepare the spacers, so that the spacers have a larger Young modulus, the spacers can be prevented from being scratched by a precise metal mask in the evaporation process, and the yield of the display panel 100 is increased.
Step S3: an OLED device layer 130 is prepared over the anode layer 115.
The step of preparing the OLED device layer 130 includes: the OLED device layer 130 is formed by evaporating an organic light emitting material using a precision metal mask. The trapezoidal clearance of falling can increase the area of contact with accurate metal mask version among the coating by vaporization process, effectively supports accurate metal mask version, reduces the risk of colour mixture and dislocation.
Step S4: a cathode layer 140 is prepared on the OLED device layer 130 and the spacers.
Step S5: preparing a thin film encapsulation layer 150 on the cathode layer 140; referring to fig. 5, fig. 5 is a schematic structural diagram of the display panel manufacturing method provided in this embodiment in step S5.
The step of preparing the thin film encapsulation layer 150 includes: depositing a first inorganic layer 151 on the cathode layer 140; a first organic layer 152 is deposited on the first inorganic layer 151.
The invention has the beneficial effects that: the invention provides a display panel and a preparation method thereof, wherein a gap with an inverted trapezoid shape is prepared, the inverted trapezoid shape can increase the contact area with a precise metal mask in an evaporation process, the precise metal mask is effectively supported, and the risks of color mixing and dislocation are reduced; on the other hand, the inorganic material is adopted to prepare the spacer, so that the spacer has a larger Young modulus, the spacer can be prevented from being scratched by a precise metal mask in the evaporation process, and the yield of the display panel is increased.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The display panel provided by the embodiment of the present application is described in detail above, and a specific example is applied to illustrate the principle and the implementation manner of the present application, and the description of the embodiment is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A display panel, comprising
An array substrate;
the gap sub-layers are arranged on the array substrate at intervals;
the OLED device layer is arranged on the part of the array substrate, which is not provided with the gap sub-layer;
a cathode layer disposed on the gap sub-layer and the OLED device layer;
and the thin film packaging layer is arranged on the cathode layer.
2. The display panel according to claim 1, wherein the spacer layer comprises a plurality of spacers, and a longitudinal cross section of the spacers in one direction is an inverted trapezoid.
3. The display panel according to claim 1, wherein the material used for the gap sub-layer is an inorganic material, and may be silicon oxide, silicon nitride, silicon oxynitride, or the like, without being limited thereto.
4. The display panel of claim 1, wherein the array substrate comprises
A thin film transistor structure layer;
the interlayer dielectric layer is arranged on the thin film transistor structure layer;
the flat layer is arranged on the interlayer dielectric layer;
the pixel definition layer is arranged on the flat layer and is provided with an opening;
the anode layer is arranged in the opening of the pixel defining layer;
wherein the gap sub-layer is disposed on the pixel defining layer, and the OLED device layer is disposed on the anode layer.
5. The display panel of claim 1, wherein the thin film encapsulation layer comprises
A first inorganic layer disposed on the cathode layer;
a first organic layer disposed on the first inorganic layer.
6. The display panel of claim 4, wherein the thin film transistor structure layer comprises
A substrate layer;
the active layer is arranged on the substrate base plate;
a gate insulating layer disposed on the active layer;
a gate electrode layer disposed on the gate insulating layer;
and the source drain layer is arranged on the grid layer.
7. A manufacturing method for manufacturing the display panel according to any one of claims 1 to 6, comprising the steps of:
providing an array substrate;
preparing gap sub-layers on the array substrate, wherein the gap sub-layers are arranged on the array substrate at intervals;
preparing an OLED device layer on the part of the array substrate, where the gap sub-layer is not arranged;
preparing a cathode layer on the OLED device layer and the spacers;
and preparing a thin film packaging layer on the cathode layer.
8. The method of claim 7, wherein the interstitial sub-layers are formed by physical vapor deposition or chemical vapor deposition.
9. The method of claim 7, wherein the step of providing an array substrate comprises providing an array substrate
Providing a thin film transistor structure layer;
preparing an interlayer dielectric layer on the substrate;
preparing a flat layer on the interlayer dielectric layer;
preparing a pixel defining layer on the flat layer, wherein the pixel defining layer is provided with an opening;
preparing an anode layer on the opening of the pixel defining layer; wherein the gap sub-layer is disposed on the pixel defining layer, and the OLED device layer is disposed on the anode layer.
10. A manufacturing method according to claim 9, wherein the pixel defining layer is formed by photolithography after coating an organic material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202010142851.5A CN111192913A (en) | 2020-03-04 | 2020-03-04 | Display panel and preparation method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010142851.5A CN111192913A (en) | 2020-03-04 | 2020-03-04 | Display panel and preparation method thereof |
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| CN111192913A true CN111192913A (en) | 2020-05-22 |
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| CN202010142851.5A Pending CN111192913A (en) | 2020-03-04 | 2020-03-04 | Display panel and preparation method thereof |
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| CN111755622A (en) * | 2020-06-17 | 2020-10-09 | 武汉华星光电半导体显示技术有限公司 | Display panel |
| CN113903781A (en) * | 2021-09-28 | 2022-01-07 | 北海惠科光电技术有限公司 | Display panel, display device and manufacturing method of display panel |
| WO2022193316A1 (en) * | 2021-03-19 | 2022-09-22 | 京东方科技集团股份有限公司 | Display substrate and preparation method therefor, and display apparatus |
| US11985862B2 (en) | 2020-10-19 | 2024-05-14 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Array substrate and display apparatus |
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Application publication date: 20200522 |