CN111191219A - Control circuit with trusted computing function - Google Patents
Control circuit with trusted computing function Download PDFInfo
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- CN111191219A CN111191219A CN202010202782.2A CN202010202782A CN111191219A CN 111191219 A CN111191219 A CN 111191219A CN 202010202782 A CN202010202782 A CN 202010202782A CN 111191219 A CN111191219 A CN 111191219A
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- trusted platform
- control module
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
- G06F21/44—Program or device authentication
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/82—Protecting input, output or interconnection devices
- G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
Abstract
The invention discloses a control circuit with a trusted computing function. A trusted platform control module in the control circuit is connected with a processor through a plurality of standard pins of a target interface, connected with a control chip set through a first part of custom pins in a plurality of custom pins and connected with SPI switching equipment through a second part of custom pins in the plurality of custom pins, wherein the target interface comprises a plurality of standard pins and a plurality of custom pins; the control chip set is respectively connected with the processor and the SPI switching equipment; the SPI switching equipment is respectively connected with the processor and the firmware storage area; and the control chip set controls the SPI switching equipment to switch between the first access channel and the second access channel according to a control signal sent by the trusted platform control module. The method and the device solve the technical problems that in the related technology, the adaptability of the trusted platform control module is low, and the trusted measurement efficiency is low.
Description
Technical Field
The invention relates to the technical field of trusted computing, in particular to a control circuit with a trusted computing function.
Background
In the related technology, along with the rapid development of information-based construction, people demand more safe and reliable safety products, in the process, a trusted platform control module begins to appear, the current trusted platform control module can perform trusted safety measurement on a computer system, and the safe operation of the computer system is guaranteed, but when the current trusted platform control module performs safety measurement on the computer, due to the fact that models of various interfaces and chips on a computer mainboard circuit are different, the trusted platform control module needs to be adapted when being connected with different mainboard circuits, the adaptation degree of the trusted platform control module is low, and further the trusted measurement efficiency of the trusted platform control module is low.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The embodiment of the invention provides a control circuit with a trusted computing function, which is used for at least solving the technical problems of low adaptability and low trusted measurement efficiency of a trusted platform control module in the related technology.
According to an aspect of an embodiment of the present invention, there is provided a control circuit having a trusted computing function, including: treater, trusted platform control module, control chip group, SPI switching device, firmware memory area, wherein: the trusted platform control module is connected with the processor through a plurality of standard pins of a target interface, connected with the control chip set through a first part of custom pins in the plurality of custom pins, and connected with the SPI switching equipment through a second part of custom pins in the plurality of custom pins, wherein the target interface comprises the plurality of standard pins and the plurality of custom pins; the control chip set is respectively connected with the processor and the SPI switching equipment; the SPI switching equipment is respectively connected with the processor and the firmware storage area; the control chip set controls the SPI switching equipment to switch between a first access channel and a second access channel according to a control signal sent by the trusted platform control module, wherein the first access channel is an access channel from the trusted platform control module to the firmware storage area, and the second access channel is an access channel from the processor to the firmware storage area.
Optionally, the control circuit comprises: the power module is connected with the control chip set; the first portion of custom pins comprises: the device comprises a first custom pin and a second custom pin; the control chipset is configured to send a reset signal to the processor when the power module is turned on, so that the processor stops working, and send a power-on completion signal to the trusted platform control module through the first custom pin when the power module supplies power stably, where the power-on completion signal is used to instruct the trusted platform control module to send the control signal to the control chipset through the second custom pin.
Optionally, the first part of custom pins further includes: a third custom pin; the trusted platform control module is configured to send a shutdown signal to the control chipset through the third custom pin when it is detected that a shutdown condition is met, where the shutdown signal is used to instruct the control chipset to shut down the power module.
Optionally, the first part of custom pins includes: a fourth self-defined pin; and the control chip set is used for sending a state indication signal to the trusted platform control module through the fourth self-defined pin when the host is in a sleep state or a wake-up state.
Optionally, the trusted platform control module is connected to the ethernet interface through a third part of the plurality of custom pins.
Optionally, the trusted platform control module is connected to the USB interface through a fourth part of the plurality of custom pins.
Optionally, the trusted platform control module communicates with the processor through a fifth part of the plurality of custom pins.
Optionally, the trusted platform control module is grounded through a sixth part of the plurality of custom pins.
Optionally, the control circuit further comprises: and the human-computer interaction equipment is connected with the control chip set and used for outputting the measurement state of the trusted platform control module after the trusted measurement.
Optionally, the target interface includes an m.2 interface or a PCIE interface.
In the embodiment of the invention, a trusted platform control module in a control circuit realizes measurement work on an object to be measured in a firmware storage area through a plurality of standard pins and custom pins of a target interface, and an SPI switching device is controlled to switch between a first access channel and a second access channel through a control chipset according to a control signal sent by the trusted platform control module. In this embodiment, the trusted platform control module can be connected to the target motherboard by customizing the target interface, so that the trusted measurement of the host can be completed without performing other adaptations, the measurement speed is increased, and the efficiency of the trusted measurement is obviously improved, thereby solving the technical problems of low adaptability and low efficiency of the trusted measurement of the trusted platform control module in the related art.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic diagram of an alternative control circuit with trusted computing functionality in accordance with embodiments of the present invention;
FIG. 2 is a schematic diagram of an alternative control circuit with trusted computing functionality according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
To facilitate the understanding of the present invention, some terms or nouns related to the embodiments of the present invention are explained below:
TPCM, a trusted platform control module, a hardware core module integrated in the trusted computing platform for establishing and guaranteeing the trusted source point, and providing functions of integrity measurement, safe storage, trusted report and cipher service for trusted computing. The trusted computing platform comprises a computing subsystem and a protection subsystem which are parallel, wherein the computing subsystem is used for completing computing tasks, the protection subsystem is used for carrying out active measurement on the computing subsystem according to a trusted strategy, the trusted computing platform is used for collecting access behavior data, measurement logs and the like of application programs and reporting the data to the trusted security management platform, and the trusted security management platform is used for supporting and maintaining a plurality of trusted computing platforms. Trusted computing platforms may include, but are not limited to: tablet, mobile terminal, PC, IPAD, server, etc. Different immune credibility strategies need to be formulated for different business applications and user scenes.
The invention relates to a control circuit with a trusted computing function, which at least comprises a target interface (M.2 interface or PCIE interface) with the trusted computing function, a trusted platform control module, a control chip set and a processor, wherein the trusted platform control module is used as a measurement execution main body, and an object to be measured in a firmware storage area is measured through the target interface. The target interface comprises a plurality of standard pins and a plurality of custom pins, wherein the standard pins are at least used for information interaction between the trusted platform control module and the processor and the memory on the target mainboard. The control circuit of the present invention is explained in detail below.
Fig. 1 is a schematic diagram of an alternative control circuit with trusted computing functionality according to an embodiment of the present invention, as shown in fig. 1, the control circuit including:
processor 11, trusted platform control module 12, control chip set 13, SPI switching device 14, firmware storage area 15,
wherein: the trusted platform control module is connected with the processor through a plurality of standard pins of a target interface, is connected with the control chip set through a first part of custom pins in the plurality of custom pins, and is connected with the SPI switching equipment through a second part of custom pins in the plurality of custom pins, wherein the target interface comprises a plurality of standard pins and a plurality of custom pins; the control chip set is respectively connected with the processor and the SPI switching equipment; the SPI switching equipment is respectively connected with the processor and the firmware storage area; the control chip set controls the SPI switching equipment to switch between a first access channel and a second access channel according to a control signal sent by the trusted platform control module, wherein the first access channel is an access channel from the trusted platform control module to the firmware storage area, and the second access channel is an access channel from the processor to the firmware storage area.
In the control circuit, the trusted platform control module 12 implements measurement work on an object to be measured in the firmware storage area through a plurality of standard pins and custom pins of the target interface, and controls the SPI switching device 14 to switch between the first access channel and the second access channel according to a control signal sent by the trusted platform control module 12 through the control chipset 13. In this embodiment, the trusted platform control module can be connected to the target motherboard by customizing the target interface (such as an m.2 interface or a PCIE interface), so that the trusted measurement of the host can be completed without performing other adaptations, the measurement speed is increased, and the efficiency of the trusted measurement is improved, thereby solving the technical problems of low adaptability and low efficiency of the trusted measurement of the trusted platform control module in the related art.
The firmware storage area of the invention can comprise an object to be measured, the object to be measured can be a BIOS (basic input Output System), and the trusted platform control module realizes the switching action of the access main body of the firmware storage area through the SPI switching device.
As an alternative embodiment of the present invention, the control circuit includes: the power module is connected with the control chip set; the first part custom pin includes: the device comprises a first custom pin and a second custom pin; the control chip set is used for sending a reset signal to the processor to enable the processor to pause work when the power module is switched on, and sending a power-on completion signal to the trusted platform control module through the first custom pin when the power module supplies power stably, wherein the power-on completion signal is used for indicating the trusted platform control module to send a control signal to the control chip set through the second custom pin.
When the power switch is pressed down, the power module supplies power to other mainboards and other equipment in the control circuit, the control chip group on the mainboards can send and keep a reset signal to the processor, and the processor cannot execute an instruction immediately at the moment. When the control chipset detects that the power supply starts to stably supply power, a power-on completion signal is sent to the trusted platform control module through the first user-defined pin, the trusted platform control module performs start-up measurement related configuration inside the trusted platform control module, the trusted platform control module sends an SPISwitch control signal, the control chipset switches the SPI Switch to access an object to be measured (access BIOS Flash) in a firmware storage area for the trusted platform control module, and the trusted platform control module measures the object to be measured. After the measurement is finished, the trusted platform control module controls the chip set to send out a measurement state signal, and prompts a user through a human-computer interface according to specific projects and product design requirements. If the measurement is successful, the control chip set removes the reset signal and switches to the processor to access the object to be measured, and the processor starts to execute the instruction of the object to be measured.
Optionally, the first part of custom pins further includes: a third custom pin; the trusted platform control module is used for sending a shutdown signal to the control chipset through the third custom pin when the trusted platform control module detects that a shutdown condition is met, and the shutdown signal is used for indicating the control chipset to shut down the power supply module.
When the trusted platform control module detects that some potential safety hazards exist in the host system (meeting shutdown regulation), the trusted platform control module can send a shutdown signal to the control chipset according to the trusted policy, and the control chipset sends a power supply shutdown signal to the power supply module.
Alternatively, the first part of custom pins includes: a fourth self-defined pin; and the control chipset is used for sending a state indication signal to the trusted platform control module through the fourth custom pin when the host is in a dormant state or an awakening state.
The verification of the trusted function in the dormant/awakening state of the PC and the notebook computer comprises the steps of storing the internal running state of the trusted platform control module and verifying whether the switching of the SPI Switch can affect the system. The control chipset is required to signal to the trusted platform control module that the host is about to enter a sleep state.
In an alternative embodiment, the trusted platform control module is connected to the ethernet interface via a third portion of the plurality of custom pins.
Optionally, the trusted platform control module is connected to the USB interface through a fourth part of the plurality of custom pins.
In the invention, the trusted platform control module communicates with the processor through a fifth part of the plurality of custom pins.
Optionally, the trusted platform control module is grounded through a sixth part of the custom pins in the plurality of custom pins.
As an alternative example of the present application, the control circuit further includes: and the human-computer interaction equipment is connected with the control chip set and used for outputting the measurement state of the trusted platform control module after the trusted measurement.
Optionally, the target interface includes an m.2 interface or a PCIE interface.
Fig. 2 is a schematic diagram of another optional control circuit with a trusted computing function according to an embodiment of the present invention, and as shown in fig. 2, each pin of an m.2 interface or a PCIE interface is connected to a trusted platform control module 21 and a target motherboard 23, where the target motherboard 23 includes: the system comprises a processor, a control chipset (which may include a CPLD and a SuperIO), an SPI switching device, an external network port, an RJ45, a USB interface, and a firmware storage area for storing a BIOS, wherein the control chipset is connected with a trusted platform control module 21 through a group of GPIO pins, and specifically comprises GPIO0, GPIO1, GPIO2, GPIO3, and GPIO4, wherein GPIO0 is used for the trusted platform control module 21 to send an on-site signal to the control chipset to indicate that the trusted platform control module is in an active state, GPIO2 is used for controlling the chipset to send a power-on completion signal to the trusted platform control module, GPIO1, GPIO3, and GPIO4 are used for the trusted platform control module to send a control signal to the control chipset, different pieces of coding information of GPIO1, GPIO3, and GPIO4 represent different control signals, for example, coding information 100 represents TPCM access to measure, coding information represents loading execution of the processor 001, The coded information 111 represents that the measurement is in progress, the coded information 101 represents that the measurement result is credible, and the coded information 011 represents that the measurement result is not credible. The treater passes through PCIE mode communication connection with trusted platform control module 21, trusted platform control module passes through the SPI mode and is connected with SPI switching equipment, SPI switching equipment passes through SPI mode access BIOS, trusted platform control module 21 passes through PCIE mode and extranet interface connection, through USB mode and USB interface connection, the treater is connected with SPI switching equipment respectively with control chip group, trusted platform control module 21 can communicate with the treater through I2C mode.
In fig. 2, before the target motherboard and the trusted platform control module work, the power switch needs to be ensured, the power switch is pressed first, the power module supplies power to the target motherboard and other devices, the control chip set on the target motherboard sends and maintains a RESET signal (RESET signal) to the processor, and the processor does not execute an instruction immediately at this moment. After stable power supply is determined, the control chipset sends a mainboard power-on completion signal (GPIO2) to the trusted platform control module 21, then the trusted platform control module starts measurement related configuration and sends an in-place signal (GPIO0) to the control chipset, then the trusted platform control module sends a first control signal (one of encoded information of GPIO1, GPIO3, and GPIO 4), the control chipset connects a first access channel through the control SPI switching module, so that the trusted platform control module 21 accesses a firmware storage area (memory storage BIOS), and the trusted platform control module 21 measures the BIOS. After the measurement is completed, the trusted platform control module 21 sends out a measurement status signal (another encoded information of GPIO1, GPIO3, GPIO 4) to the control chipset, and prompts the user through the display interface according to the specific project and product design requirements. After the measurement state indicates that the BIOS is trusted, the control chipset receives a second control signal (another encoding information among GPIO1, GPIO3, and GPIO 4) sent by the trusted platform control module 21, controls the SPI switching module to connect the second access channel, and controls the chipset to access the firmware storage area, and removes the RESET signal, and the processor loads and executes the BIOS.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (10)
1. A control circuit having trusted computing functionality, comprising: treater, trusted platform control module, control chip group, SPI switching device, firmware memory area, wherein:
the trusted platform control module is connected with the processor through a plurality of standard pins of a target interface, connected with the control chip set through a first part of custom pins in the plurality of custom pins, and connected with the SPI switching equipment through a second part of custom pins in the plurality of custom pins, wherein the target interface comprises the plurality of standard pins and the plurality of custom pins;
the control chip set is respectively connected with the processor and the SPI switching equipment;
the SPI switching equipment is respectively connected with the processor and the firmware storage area;
the control chip set controls the SPI switching equipment to switch between a first access channel and a second access channel according to a control signal sent by the trusted platform control module, wherein the first access channel is an access channel from the trusted platform control module to the firmware storage area, and the second access channel is an access channel from the processor to the firmware storage area.
2. The control circuit of claim 1, wherein the control circuit comprises:
the power module is connected with the control chip set;
the first portion of custom pins comprises: the device comprises a first custom pin and a second custom pin;
the control chipset is configured to send a reset signal to the processor when the power module is turned on, so that the processor stops working, and send a power-on completion signal to the trusted platform control module through the first custom pin when the power module supplies power stably, where the power-on completion signal is used to instruct the trusted platform control module to send the control signal to the control chipset through the second custom pin.
3. The control circuit of claim 2,
the first portion of custom pins further comprises: a third custom pin;
the trusted platform control module is configured to send a shutdown signal to the control chipset through the third custom pin when it is detected that a shutdown condition is met, where the shutdown signal is used to instruct the control chipset to shut down the power module.
4. The control circuit of claim 1,
the first portion of custom pins comprises: a fourth self-defined pin;
and the control chip set is used for sending a state indication signal to the trusted platform control module through the fourth self-defined pin when the host is in a sleep state or a wake-up state.
5. The control circuit of claim 1,
and the trusted platform control module is connected with the Ethernet interface through a third part of the custom pins in the plurality of custom pins.
6. The control circuit of claim 1,
and the trusted platform control module is connected with the USB interface through a fourth part of the plurality of user-defined pins.
7. The control circuit of claim 1, wherein the trusted platform control module communicates with the processor through a fifth portion of the plurality of custom pins.
8. The control circuit of claim 1, wherein the trusted platform control module is grounded through a sixth portion of the plurality of custom pins.
9. The control circuit of claim 1, further comprising:
and the human-computer interaction equipment is connected with the control chip set and used for outputting the measurement state of the trusted platform control module after the trusted measurement.
10. The control circuit of any of claims 1-9, wherein the target interface comprises an m.2 interface or a PCIE interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010202782.2A CN111191219A (en) | 2020-03-20 | 2020-03-20 | Control circuit with trusted computing function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010202782.2A CN111191219A (en) | 2020-03-20 | 2020-03-20 | Control circuit with trusted computing function |
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| CN111191219A true CN111191219A (en) | 2020-05-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202010202782.2A Withdrawn CN111191219A (en) | 2020-03-20 | 2020-03-20 | Control circuit with trusted computing function |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111769863A (en) * | 2020-05-27 | 2020-10-13 | 苏州浪潮智能科技有限公司 | Relay method and relay board card for TPCM communication |
| WO2023138693A1 (en) * | 2022-01-24 | 2023-07-27 | 阿里云计算有限公司 | Data processing system and method, and storage medium |
-
2020
- 2020-03-20 CN CN202010202782.2A patent/CN111191219A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111769863A (en) * | 2020-05-27 | 2020-10-13 | 苏州浪潮智能科技有限公司 | Relay method and relay board card for TPCM communication |
| CN111769863B (en) * | 2020-05-27 | 2022-02-18 | 苏州浪潮智能科技有限公司 | Relay method and relay board card for TPCM communication |
| WO2023138693A1 (en) * | 2022-01-24 | 2023-07-27 | 阿里云计算有限公司 | Data processing system and method, and storage medium |
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Application publication date: 20200522 |