CN111181498B - Metal oxide thin film transistor ASK demodulation circuit and chip - Google Patents
Metal oxide thin film transistor ASK demodulation circuit and chip Download PDFInfo
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- CN111181498B CN111181498B CN201911426205.5A CN201911426205A CN111181498B CN 111181498 B CN111181498 B CN 111181498B CN 201911426205 A CN201911426205 A CN 201911426205A CN 111181498 B CN111181498 B CN 111181498B
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Abstract
The invention discloses a metal oxide thin film transistor ASK demodulation circuit and a chip, wherein the circuit comprises: the rectifier is used for identifying ASK signal envelopes and supplying power to a post-stage circuit; the low-pass filter is used for performing low-pass filtering on the signal output by the rectifier; the zero threshold comparator is used for amplifying the signal output by the low-pass filter; an output buffer for driving a load according to an output signal of the zero threshold comparator; the post-stage circuit comprises a low-pass filter, a zero threshold comparator and an output buffer; the low pass filter is an RC filter including a third capacitor and a resistance unit composed of two reversely stacked transistors. According to the invention, the RC filter is formed by manufacturing a larger resistance unit on a smaller area through two reversely stacked transistors, so that the ASK demodulation circuit manufactured by using the metal oxide thin film transistor is realized. The invention can be widely applied to ASK chip technology.
Description
Technical Field
The invention relates to an ASK chip technology, in particular to an ASK demodulation circuit and a chip of a metal oxide thin film transistor.
Background
In a conventional Radio Frequency Identification (RFID) and Near Field Communication (NFC) circuit, a tag adopts a Complementary Metal Oxide Semiconductor (CMOS) scheme in which a transistor is composed of an N-type transistor and a P-type transistor. The limited use is due to the fact that wafers made using the cmos scheme are not flexible.
Research on radio frequency identification and near field communication circuits based on metal oxide Thin Film Transistors (TFTs) has attracted increasing researchers' interest. These tags can be fabricated on large area flexible substrates at low temperatures and adhered to the surface of everyday objects, which helps to realize the Internet of Things (IoT).
Currently, metal oxide RFID/NFC tags have only one-way communication capabilities. When the tag and the reader are close to each other, data is transmitted to the reader. However, if multiple tags are simultaneously in proximity to the reader, a collision can occur. Two-way communication between the tag and the reader is necessary to avoid collisions. Each tag is customized with its own code and only replies to the reader that sent this code.
The principle of transmitting a code from a reader to a tag is as follows: on the reader side, the initial code is first encoded by an encoder and then transmitted to the tag by Amplitude Shift Keying (ASK) modulation. In the tag side, the ASK demodulator demodulates the ASK signal and obtains a baseband signal. The baseband signal is then decoded by a decoder, a serial-to-parallel converter and a comparator and compared with the built-in code of the tag for further processing. There are implementations of decoders, serial-to-parallel converters and comparators. However, due to the material characteristics of the metal oxide, it is difficult to prepare a resistor with a large resistance value in a small area, so that the filter of the ASK demodulation circuit is limited in manufacturing, and thus, the implementation scheme of manufacturing the ASK demodulation circuit by using the metal oxide thin film transistor is still missing.
Disclosure of Invention
To solve at least one of the above-mentioned technical problems, the present invention is directed to: a metal oxide thin film transistor ASK demodulation circuit and a chip are provided, so that the ASK demodulation circuit manufactured by using the metal oxide thin film transistor is realized.
In a first aspect, an embodiment of the present invention provides:
a metal oxide thin film transistor (ASK) demodulation circuit comprises:
the rectifier is used for identifying ASK signal envelopes and supplying power to a post-stage circuit;
the low-pass filter is used for performing low-pass filtering on the signal output by the rectifier;
the zero threshold comparator is used for amplifying the signal output by the low-pass filter;
an output buffer for driving a load according to an output signal of the zero threshold comparator;
the post-stage circuit comprises a low-pass filter, a zero threshold comparator and an output buffer;
the low pass filter is an RC filter including a third capacitor and a resistance unit composed of two reversely stacked transistors.
Further, the two reversely stacked transistors are a third transistor and a fourth transistor, a first source drain of the third transistor is connected with a first source drain of the fourth transistor, a gate of the third transistor and a gate of the fourth transistor are both connected at a connection position where the first source drain of the third transistor is connected with the first source drain of the fourth transistor, and a second source drain of the third transistor and a second source drain of the fourth transistor are respectively used as two ends of the resistor unit.
Further, the rectifier comprises a first transistor, a second transistor, a first capacitor and a second capacitor, wherein a first source drain of the first transistor and a first source drain of the second transistor are connected and serve as a signal positive input end of the rectifier, a first end of the first capacitor is connected to a second source drain of the first transistor, a first end of the second capacitor is connected to a second source drain of the second transistor, a second end of the first capacitor is connected with a second end of the second capacitor, a second end of the first capacitor serves as a signal negative input end of the rectifier, a grid electrode of the first transistor is connected to the first source drain of the first transistor, and a grid electrode of the second transistor is connected to the second source drain of the second transistor; the first end of the first capacitor is used as the positive power supply end of the rear-stage circuit, and the first end of the second capacitor is used as the negative power supply end of the rear-stage circuit;
and a second source drain of the third transistor is connected with a first end of a second capacitor, a first end of the third capacitor is connected with a second end of the second capacitor, and a second end of the third capacitor is connected with a second source drain of the fourth transistor.
Further, the zero threshold comparator comprises a fifth transistor and a sixth transistor, a first source drain of the fifth transistor is connected with a first source drain of the sixth transistor, a grid of the fifth transistor is connected with the first source drain of the fifth transistor, a second source drain of the fifth transistor is used for being connected with a positive electrode end of a power supply, a second source drain of the sixth transistor is used for being connected with a negative electrode end of the power supply, the grid of the sixth transistor is used as an input end of the zero threshold comparator, and the first source drain of the sixth transistor is used as an output end of the zero threshold comparator.
Further, the output buffer includes a first inverter and a second inverter, which are connected in series.
Further, the first inverter is composed of a seventh transistor and an eighth transistor;
a first source drain of the seventh transistor is connected with a first source drain of the eighth transistor, a gate of the seventh transistor is connected with the first source drain of the seventh transistor, a second source drain of the seventh transistor is used for connecting a positive electrode end of a power supply, a second source drain of the eighth transistor is used for connecting a negative electrode end of the power supply, a gate of the eighth transistor is used as an input end of the first phase inverter, and the first source drain of the eighth transistor is used as an output end of the first phase inverter;
the second inverter is composed of a ninth transistor and a tenth transistor;
a first source drain of the ninth transistor is connected with a first source drain of the tenth transistor, a gate of the ninth transistor is connected with the first source drain of the ninth transistor, a second source drain of the ninth transistor is used for connecting a positive electrode end of a power supply, a second source drain of the tenth transistor is used for connecting a negative electrode end of the power supply, a gate of the tenth transistor is used as an input end of the second phase inverter, and the first source drain of the tenth transistor is used as an output end of the second phase inverter;
the input end of the first phase inverter is connected with the output end of the zero threshold comparator, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is used as the output end of the output buffer.
Further, a channel length-to-width ratio of the seventh transistor and a channel length-to-width ratio of the ninth transistor are each larger than a channel length-to-width ratio of the eighth transistor and a channel length-to-width ratio of the tenth transistor.
Further, all transistors constituting the demodulation circuit are N-type metal oxide thin film crystals.
In a second aspect, an embodiment of the present invention provides:
a chip comprises the metal oxide thin film transistor ASK demodulation circuit.
The embodiment of the invention has the beneficial effects that: the resistance unit is formed by two reversely stacked transistors, which can bring resistance of megaohm, so that a larger resistance unit can be manufactured on a smaller area through a metal oxide process to form an RC filter, and an ASK demodulation circuit manufactured by using metal oxide thin film transistors is realized.
Drawings
FIG. 1 is a schematic diagram of an exemplary embodiment of an ASK demodulation circuit;
fig. 2 is a schematic diagram illustrating an operation principle of an ASK demodulation circuit of a metal oxide thin film transistor according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of the operation of a comparator according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of the operation of an output buffer according to an embodiment of the present invention;
FIG. 5 is a waveform diagram illustrating the operation of an ASK demodulation circuit according to an embodiment of the present invention;
fig. 6 is a schematic diagram of an operation range of an ASK demodulation circuit of a metal oxide thin film transistor according to an embodiment of the present invention.
Detailed Description
The invention is further described with reference to the drawings and the specific examples.
Referring to fig. 1, a metal oxide thin film transistor ASK demodulation circuit includes:
the rectifier is used for identifying ASK signal envelopes and supplying power to a post-stage circuit; including identifying the upper and lower envelopes of the ASK signal and serving as a source of power supply for the entire demodulation circuit.
The low-pass filter is used for performing low-pass filtering on the signal output by the rectifier; the method has the main functions of extracting direct current components of input signals, removing high-frequency harmonics and avoiding interference of the high-frequency harmonics to a circuit.
The zero threshold comparator is used for amplifying the signal output by the low-pass filter; its function is to amplify the signal to either a high level or a low level of the circuit. A zero threshold comparator can sensitively detect small signal fluctuations and amplify them to a maximum swing.
An output buffer for driving a load according to an output signal of the zero threshold comparator; the main function is to drive the load provided by the measuring device.
The post-stage circuit in the embodiment includes a low-pass filter, a zero threshold comparator and an output buffer;
the low pass filter is an RC filter comprising a third capacitor C3 and a resistive element consisting of two oppositely stacked transistors.
Specifically, as shown in fig. 1, the resistance unit is reversely stacked by the third transistor M3 and the fourth transistor M4.
Referring to fig. 1, a first source drain of the third transistor M3 is connected to a first source drain of the fourth transistor M4, a gate of the third transistor M3 and a gate of the fourth transistor M4 are both connected to a connection point where the first source drain of the third transistor M3 is connected to the first source drain of the fourth transistor M4, and a second source drain of the third transistor M3 and a second source drain of the fourth transistor M4 are respectively used as two ends of a resistor unit. The present sub-embodiment employs a reverse stacked MOS diode structure, also referred to as OSMD, in which the third transistor M3 and the fourth transistor M4 are diode-connected and stacked with opposite polarities. OSMD can achieve very high impedance, typically above mega ohms, while it can keep the area small, thereby improving circuit integration.
In addition, the third transistor M3, the fourth transistor M4 and the third capacitor C3 form a first-order low-pass filter for extracting the dc component of the input signal, and in the present embodiment, the dielectric frequency of the low-pass filter is 2 pi f ═ 1/RC, so that the higher harmonics are not filtered out better, and the RC constant should be as large as possible.
Since the source and drain of a transistor in an integrated circuit are not strictly distinguished, and both directions can be conducted, in the embodiment of the present disclosure, the source and drain may be a source or a drain, for a transistor, the first and second are only used for convenience of description of connection, when the first source and drain is a source, the second source and drain is a drain, and vice versa.
Referring to fig. 1, IN this embodiment, the rectifier includes a first transistor M1, a second transistor M2, a first capacitor C1, and a second capacitor C2, a first source drain of the first transistor M1 and a first source drain of the second transistor M2 are connected and serve as a signal positive input terminal IN + of the rectifier, a first end of the first capacitor C1 is connected to a second source drain of the first transistor M1, a first end of the second capacitor C2 is connected to a second source drain of the second transistor M2, a second end of the first capacitor C1 is connected to a second end of the second capacitor C2, a second end of the first capacitor C1 serves as a signal negative input terminal IN "of the rectifier, a gate of the first transistor M1 is connected to the first source drain of the first transistor M1, and a gate of the second transistor M2 is connected to the second source drain of the second transistor M2; a first end of the first capacitor C1 is used as a power supply positive end of a rear-stage circuit, and a first end of the second capacitor C2 is used as a power supply negative end of the rear-stage circuit;
a second source-drain electrode of the third transistor M3 is connected to a first end of a second capacitor C2, a first end of the third capacitor C3 is connected to a second end of the second capacitor C2, and a second end of the third capacitor C3 is connected to a second source-drain electrode of the fourth transistor M4.
Referring to fig. 1, as a preferred embodiment, the zero threshold comparator includes a fifth transistor M5 and a sixth transistor M6, a first source-drain of the fifth transistor M5 is connected to a first source-drain of the sixth transistor M6, a gate of the fifth transistor M5 is connected to a first source-drain of the fifth transistor M5, a second source-drain of the fifth transistor M5 is used to connect a positive electrode terminal of a power supply, a second source-drain of the sixth transistor M6 is used to connect a negative electrode terminal of the power supply, a gate of the sixth transistor M6 is used as an input terminal of the zero threshold comparator, and a first source-drain of the sixth transistor M6 is used as an output terminal of the zero threshold comparator.
As a preferred embodiment, the output buffer includes a first inverter and a second inverter, which are connected in series.
Referring to fig. 1, as a preferred embodiment, the first inverter is composed of a seventh transistor M7 and an eighth transistor M8;
a first source drain of the seventh transistor M7 is connected with a first source drain of the eighth transistor M8, a gate of the seventh transistor M7 is connected with a first source drain of the seventh transistor M7, a second source drain of the seventh transistor M7 is used for connecting a positive electrode end of a power supply, a second source drain of the eighth transistor M8 is used for connecting a negative electrode end of the power supply, a gate of the eighth transistor M8 is used as an input end of the first inverter, and a first source drain of the eighth transistor M8 is used as an output end of the first inverter;
the second inverter is composed of a ninth transistor M9 and a tenth transistor M10;
a first source drain of the ninth transistor M9 is connected to a first source drain of the tenth transistor M10, a gate of the ninth transistor M9 is connected to a first source drain of the ninth transistor M9, a second source drain of the ninth transistor M9 is used for connecting a positive electrode terminal of a power supply, a second source drain of the tenth transistor M10 is used for connecting a negative electrode terminal of the power supply, a gate of the tenth transistor M10 is used as an input terminal of the second inverter, and a first source drain of the tenth transistor M10 is used as an output terminal of the second inverter;
the input end of the first phase inverter is connected with the output end of the zero threshold comparator, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is used as the output end OUT of the output buffer.
This embodiment explains the operation principle of the ASK demodulation circuit of the metal oxide thin film transistor in fig. 1:
referring to fig. 2, after an input signal In is input to the circuit shown In fig. 1, the variations In the circuit and at the output are shown In fig. 2, where the Reader speed (i.e. Reader data rate) is defined as the envelope of the input ASK modulated signalOf (c) is detected. Modulation depth (h)MIN) Defined as (a-b)/(a + b). The input ASK modulated signal, in addition to carrying information transmitted by the reader, also provides energy for the operation of the tag, so that hMINAs small as possible.
The rectifier is composed of a first transistor M1, a second transistor M2, a first capacitor C1 and a second capacitor C2. The ASK signal envelope is preliminarily recognized and supplied to a later-stage circuit. When the input signal is positive, the first transistor M1 is turned on, the second transistor M2 is turned off, the input signal charges the first capacitor C1, the second capacitor C2 is maintained, and the DC + voltage is equal to the envelope of the upper half of the input signal; when the input signal is negative, the second transistor M2 is turned on, the first transistor M1 is turned off, the input signal charges the second capacitor C2, and the first capacitor C1 holds, where DC-equals the lower half envelope of the input signal. The voltage difference between DC + and DC-is the actual working voltage of the subsequent circuit, so the internal working voltage (i.e. Tag internal voltage) of the Tag is defined as DC + minus DC-.
The third transistor M3, the fourth transistor M4 and the third capacitor C3 form a first-order RC low-pass filter, which is used for extracting the DC component Vcm from the DC signal.
The fifth transistor M5 and the sixth transistor M6 form a zero threshold comparator that functions to compare and amplify the difference between Vcm and DC-. Wherein the channel width-to-length ratios of the fifth transistor M5 and the sixth transistor M6 are equal, the comparator characteristics are as shown in fig. 3. When In is greater than zero, i.e., Vcm is greater than DC-, the output goes low, i.e., DC-. Conversely, when In is less than zero, i.e., Vcm is less than DC-, the output goes high, i.e., DC +. Thus, small fluctuations in DC-can be detected and amplified to full swing. The gain of the comparator can be expressed as gmroPer 2, wherein gmIs the transconductance of a transistor, rOIs the output resistance of the transistor. This gain is as high as the intrinsic gain of a single transistor, which improves the resolution of the comparator, allowing the invention to demodulate ASK signals of smaller modulation depth.
The seventh transistor M7, the eighth transistors M8 through, the ninth transistors M9 through, and the tenth transistor M10 function as an output buffer, which functions to drive a load provided by the measuring device. The output buffer is composed of two stages of amplifiers, the seventh transistor M7 and the eighth transistor M8 constitute a first stage inverter, and the ninth transistor M9 and the tenth transistor M10 constitute a second stage inverter. Wherein the channel width-to-length ratios of the seventh transistor M7 and the ninth transistor M9 of the load transistor are larger than those of the eighth transistor M8 and the tenth transistor M10 of the driving transistor, the inverter characteristics are as shown in fig. 4. When In is high, i.e., DC +, the output goes low, i.e., DC-. In contrast, when In is low, i.e., DC-, the output goes high, i.e., DC +.
In the above embodiment, all the metal oxide thin film transistors constituting the adjustment circuit are N-type transistors. Due to the characteristics of metal oxide, it is not currently possible to effectively fabricate all metal oxide thin film transistors as P-type transistors, and thus it is not possible to conveniently design a circuit by means of N-type transistors and P-type transistors as in the CMOS scheme. Therefore, the scheme is essentially different from the COMS scheme.
In summary, the circuit of the embodiment of the invention is composed of pure n-type transistors, and thus is suitable for metal oxide TFT circuits; the circuit provided by the embodiment of the invention has the functions of rectification and ASK demodulation at the same time, and does not need an external voltage source for power supply, so that the circuit is suitable for a passive RFID/NFC tag.
The present embodiment discloses a metal oxide grinding transistor ASK demodulation circuit having the same structure as the circuit in fig. 1, and specific parameters thereof are shown in table 1:
TABLE 1
FIG. 5 shows the operating waveform of this embodiment, where the input ASK modulated signal has a carrier frequency of 13.56MHz, a reader rate of 500Hz, and a modulation depth h MIN15% of the total weight. And the internal working voltage DC + -DC-6V of the label. The working waveform is identical to the working principle of the invention shown in fig. 2, and the circuit works normally.
Fig. 6 gives the working range of this embodiment. The lowest working voltage in the label can reach 2V, and the highest speed of the card reader can reach 8 kbit/s.
Therefore, the structure can achieve a relatively excellent technical effect, and the effect is particularly good when the device is implemented by adopting the parameters.
The embodiment discloses a chip which comprises the metal oxide thin film transistor ASK demodulation circuit and an external package. The chip has the same technical effects as the circuit embodiment.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (3)
1. A metal oxide thin film transistor (ASK) demodulation circuit is characterized in that: the method comprises the following steps:
the rectifier is used for identifying ASK signal envelopes and supplying power to a post-stage circuit;
the low-pass filter is used for performing low-pass filtering on the signal output by the rectifier;
the zero threshold comparator is used for amplifying the signal output by the low-pass filter;
an output buffer for driving a load according to an output signal of the zero threshold comparator;
the post-stage circuit comprises a low-pass filter, a zero threshold comparator and an output buffer;
the low-pass filter is an RC filter comprising a third capacitor and a resistance unit, and the resistance unit is composed of two reversely stacked transistors;
the two reversely stacked transistors are a third transistor and a fourth transistor, a first source drain of the third transistor is connected with a first source drain of the fourth transistor, a grid electrode of the third transistor and a grid electrode of the fourth transistor are both connected at a connection position where the first source drain of the third transistor is connected with the first source drain of the fourth transistor, and a second source drain of the third transistor and a second source drain of the fourth transistor are respectively used as two ends of the resistor unit;
the rectifier comprises a first transistor, a second transistor, a first capacitor and a second capacitor, wherein a first source drain electrode of the first transistor and a first source drain electrode of the second transistor are connected and used as a signal positive input end of the rectifier; the first end of the first capacitor is used as the positive power supply end of the rear-stage circuit, and the first end of the second capacitor is used as the negative power supply end of the rear-stage circuit;
a second source drain of the third transistor is connected with a first end of a second capacitor, a first end of the third capacitor is connected with a second end of the second capacitor, and a second end of the third capacitor is connected with a second source drain of the fourth transistor;
the zero threshold comparator comprises a fifth transistor and a sixth transistor, wherein a first source drain of the fifth transistor is connected with a first source drain of the sixth transistor, a grid electrode of the fifth transistor is connected with the first source drain of the fifth transistor, a second source drain of the fifth transistor is used for being connected with a positive electrode end of a power supply, a second source drain of the sixth transistor is used for being connected with a negative electrode end of the power supply, the grid electrode of the sixth transistor serves as an input end of the zero threshold comparator, and the first source drain of the sixth transistor serves as an output end of the zero threshold comparator;
the output buffer comprises a first inverter and a second inverter which are connected in series;
the first inverter is composed of a seventh transistor and an eighth transistor;
a first source drain of the seventh transistor is connected with a first source drain of the eighth transistor, a gate of the seventh transistor is connected with the first source drain of the seventh transistor, a second source drain of the seventh transistor is used for connecting a positive electrode end of a power supply, a second source drain of the eighth transistor is used for connecting a negative electrode end of the power supply, a gate of the eighth transistor is used as an input end of the first phase inverter, and the first source drain of the eighth transistor is used as an output end of the first phase inverter;
the second inverter is composed of a ninth transistor and a tenth transistor;
a first source drain of the ninth transistor is connected with a first source drain of the tenth transistor, a gate of the ninth transistor is connected with the first source drain of the ninth transistor, a second source drain of the ninth transistor is used for connecting a positive electrode end of a power supply, a second source drain of the tenth transistor is used for connecting a negative electrode end of the power supply, a gate of the tenth transistor is used as an input end of the second phase inverter, and the first source drain of the tenth transistor is used as an output end of the second phase inverter;
the input end of the first phase inverter is connected with the output end of the zero threshold comparator, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is used as the output end of the output buffer.
2. The ASK demodulation circuit of claim 1, wherein: the channel length-to-width ratio of the seventh transistor and the channel length-to-width ratio of the ninth transistor are each larger than the channel length-to-width ratio of the eighth transistor and the channel length-to-width ratio of the tenth transistor.
3. A chip, characterized by: comprising a metal oxide thin film transistor ASK demodulation circuit according to any of claims 1-2.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1148902A (en) * | 1995-03-28 | 1997-04-30 | 松下电器产业株式会社 | Metal oxide film resistor |
| CN105447547A (en) * | 2014-09-01 | 2016-03-30 | 上海华虹集成电路有限责任公司 | Demodulation circuit with adjustable sensitivity |
| CN106096697A (en) * | 2016-06-17 | 2016-11-09 | 广州中大微电子有限公司 | A kind of RFID Micro Energy Lose high sensitivity demodulator circuit |
| CN108475130A (en) * | 2015-11-18 | 2018-08-31 | 赛普拉斯半导体公司 | Delta modulator receiving channel for capacitance measurement circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006189473A (en) * | 2004-12-28 | 2006-07-20 | Koninkl Philips Electronics Nv | Active matrix liquid crystal display device |
| KR101516660B1 (en) * | 2006-12-25 | 2015-05-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1148902A (en) * | 1995-03-28 | 1997-04-30 | 松下电器产业株式会社 | Metal oxide film resistor |
| CN105447547A (en) * | 2014-09-01 | 2016-03-30 | 上海华虹集成电路有限责任公司 | Demodulation circuit with adjustable sensitivity |
| CN108475130A (en) * | 2015-11-18 | 2018-08-31 | 赛普拉斯半导体公司 | Delta modulator receiving channel for capacitance measurement circuit |
| CN106096697A (en) * | 2016-06-17 | 2016-11-09 | 广州中大微电子有限公司 | A kind of RFID Micro Energy Lose high sensitivity demodulator circuit |
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