CN111178334A - Drive circuit and display panel - Google Patents
Drive circuit and display panel Download PDFInfo
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- CN111178334A CN111178334A CN202010103938.1A CN202010103938A CN111178334A CN 111178334 A CN111178334 A CN 111178334A CN 202010103938 A CN202010103938 A CN 202010103938A CN 111178334 A CN111178334 A CN 111178334A
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- signal
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- driving
- potential
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
The application discloses a driving circuit, which comprises a plurality of stages of cascaded driving sub-circuits; the Nth-stage driving sub-circuit comprises a pull-up potential generation unit, a driving signal generation unit, a pull-down potential generation unit and a driving signal pull-down unit. The application provides a drive circuit, independent and timesharing output display drive signal and fingerprint drive signal through drive signal generation unit need not additionally to increase fingerprint drive circuit, and then has reduced its shared frame district size.
Description
Technical Field
The application relates to the technical field of display, in particular to a driving circuit and a display panel, which integrate scanning and fingerprint driving.
Background
Nowadays, the society science and technology are rapidly developed, and electronic products such as mobile phones, computers, televisions and the like are widely applied to various aspects in life. Therefore, electronic display panels such as liquid crystal display panels and OLED display panels are widely used, wherein fingerprint recognition is a common application, and with the trend of full-screen applications, fingerprint recognition modules have been integrated into panels. Therefore, in addition to the original GOA (Gate On Array, Array scan drive) circuit for display, these panels need to be added with a drive circuit for fingerprint identification; this obviously requires more widths of the frame area of the display panel, increases the size of the original frame area (border), and does not conform to the narrow frame development trend of the current full-face screen.
Disclosure of Invention
The application provides a drive circuit, has solved the integrated display panel who has the fingerprint identification function and need increase fingerprint drive circuit again, has increased the problem of frame district width.
In a first aspect, the present application provides a driving circuit comprising a plurality of cascaded driving sub-circuits; wherein, the nth level drive sub-circuit includes: a pull-up potential generating unit for generating a pull-up potential signal; the driving signal generating unit is connected with the output end of the pull-up potential generating unit and is used for independently outputting a display driving signal and a fingerprint driving signal in a time-sharing manner according to the pull-up potential signal; a pull-down potential generating unit for generating a pull-down potential signal; and the driving signal pull-down unit is connected with the output end of the pull-down potential generation unit and the output end of the driving signal pull-down unit and is used for controlling the driving signal pull-down unit according to the pull-down potential signal so as to pull down the potential of the display driving signal and the potential of the fingerprint driving signal.
Based on the first aspect, in a first implementation manner of the first aspect, the nth-stage driving sub-circuit further includes a backflow prevention protection unit; the input end of the backflow prevention protection unit is connected with the output end of the pull-up potential generation unit; the output end of the backflow preventing protection unit is connected with the input end of the driving signal generation unit; and the control end of the backflow prevention protection unit is connected with a constant-voltage high-potential signal.
In a second implementation manner of the first aspect, the nth stage driving sub-circuit further includes a pull-down unit; the input end of the pull-down unit is connected with a constant voltage low potential signal; the output end of the pull-down unit is connected with the output end of the pull-up potential generating unit; and the control end of the pull-down unit is connected with the output end of the pull-down potential generation unit.
In a third implementation form of the first aspect, the nth stage driving sub-circuit further includes a reset unit; the system reset signal is connected with the input end of the reset unit and the control end of the reset unit; the output end of the reset unit is connected with the output end of the pull-down potential generating unit.
In a fourth implementation manner of the first aspect, the nth stage driving sub-circuit further includes a system setting unit; the system setting signal is connected with the control end of the system setting unit; the input end of the system setting unit is connected with a constant voltage low potential signal; and the output end of the system setting unit is connected with the output end of the driving signal generating unit.
Based on the first aspect, in a fifth implementation manner of the first aspect, the nth stage driving sub-circuit further includes a system display setting unit; the control end of the system display setting unit is connected with a system display setting signal; the input end of the system display setting unit is connected with a constant voltage low potential signal; and the output end of the system display setting unit is connected with the output end of the pull-down potential generating unit and the output end of the driving signal generating unit.
In a sixth implementation manner of the first aspect, the nth stage driving sub-circuit further includes a reverse scan control unit; the reverse scanning control unit is connected with the constant voltage low potential signal, the pull-up potential generation unit and the pull-down potential generation unit.
In a seventh implementation form of the first aspect, based on any of the preceding implementation forms of the first aspect, the fingerprint driving signal comprises a fingerprint reset signal and a fingerprint enable signal; the fingerprint reset signal is used for controlling the resetting of the fingerprint identification circuit; the fingerprint enabling signal is used for controlling the fingerprint identification circuit to output a fingerprint identification signal.
In a second aspect, the present disclosure provides a display panel including the driving circuit in any of the above embodiments.
In a first implementation form of the second aspect, the display panel further comprises a fingerprint identification circuit integrated within the display panel; the control end of the fingerprint identification circuit is connected with the output end of the driving circuit so as to access a fingerprint driving signal.
The application provides a drive circuit, independent and timesharing output display drive signal and fingerprint drive signal through drive signal generation unit can be used for drive display and fingerprint identification respectively, need not additionally to increase fingerprint drive circuit, has simplified drive circuit topological structure, and then has reduced its shared frame district size.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a first structural schematic diagram of a driving circuit according to an embodiment of the present disclosure.
Fig. 2 is a second structural schematic diagram of a driving circuit according to an embodiment of the present disclosure.
Fig. 3 is a schematic diagram of a third structure of a driving circuit according to an embodiment of the present disclosure.
Fig. 4 is a schematic diagram of a fourth structure of the driving circuit according to the embodiment of the present application.
Fig. 5 is a fifth structural schematic diagram of a driving circuit according to an embodiment of the present disclosure.
Fig. 6 is a sixth schematic structure diagram of a driving circuit according to an embodiment of the present disclosure.
Fig. 7 is a schematic diagram of a seventh structure of a driving circuit according to an embodiment of the present application.
Fig. 8 is a circuit schematic diagram of the driving circuit shown in fig. 7.
FIG. 9 is a timing diagram of the driving circuit shown in FIG. 8.
Fig. 10 is a schematic circuit diagram of a fingerprint identification circuit according to an embodiment of the present application.
Fig. 11 is a schematic structural diagram of a display panel according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As shown in fig. 1, the present embodiment provides a driving circuit including a plurality of stages of cascaded driving sub-circuits; wherein, the nth level drive sub-circuit includes: a pull-up potential generating unit 10 for generating a pull-up potential signal Q; a driving signal generating unit 20 connected to an output terminal of the pull-up potential generating unit 10, for independently and time-divisionally outputting a display driving signal G (N) and a fingerprint driving signal according to the pull-up potential signal Q; a pull-down potential generating unit 30 for generating a pull-down potential signal P; and a driving signal pull-down unit 40 connected to the output terminal of the pull-down potential generating unit 30 and the output terminal of the driving signal pull-down unit 40, and configured to control the driving signal pull-down unit 40 according to the pull-down potential signal P to pull down the potential of the display driving signal G (N) and the potential of the fingerprint driving signal.
Specifically, as shown in fig. 8, the pull-up potential generating unit 10 outputs a pull-up potential signal Q to the driving signal generating unit 20, and controls the driving signal generating unit 20 to be in an operating state, so as to independently and time-divisionally output the display driving signal G (N) and the fingerprint driving signal, that is, the display driving signal G (N) and the fingerprint driving signal are independent of each other and are located at different time periods in terms of time sequence; the pull-down potential generating unit 30 outputs the pull-down potential signal P to the driving signal pull-down unit 40, thereby pulling down the potentials of both the display driving signal G (N) and the fingerprint driving signal. Therefore, the display driving signal G (N) and the fingerprint driving signal can be independently and time-divisionally output through the driving signal generating unit 20, and can be respectively used for driving display and fingerprint identification, without additionally adding a fingerprint driving circuit, thereby simplifying the topological structure of the driving circuit and further reducing the size of the frame area occupied by the driving circuit.
As shown in fig. 8, the pull-up potential generating unit 10 includes a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, and a first capacitor C1; the constant voltage high potential signal VGH is connected to the drain of the first thin film transistor T1, the drain of the second thin film transistor T2, and the drain of the third thin film transistor T3; the nth-2 stage gate control signal CG (N-2) is connected to the gate of the first thin film transistor T1; the N-2 th level fingerprint reset control signal CRST (N-2) is connected with the grid electrode of the second thin film transistor T2; the N-2 th level fingerprint control signal CGN (N-2) is connected with the gate of the third thin film transistor T3; a gate electrode of the fourth thin film transistor T4 is connected to the source electrode of the first thin film transistor T1, the source electrode of the second thin film transistor T2, and the source electrode of the third thin film transistor T3; the forward direction scan control signal U2D is connected to the drain of the fourth thin film transistor T4; a source of the fourth thin film transistor T4 is connected to the first terminal of the first capacitor C1; a second terminal of the first capacitor C1 is connected to the constant voltage low potential signal VGL.
Wherein, as shown in fig. 8, the driving signal generating unit 20 includes a fifth thin film transistor T5, a sixth thin film transistor T6, and a seventh thin film transistor T7; a first end of the first capacitor C1 is connected to the gate electrode of the fifth thin film transistor T5, the gate electrode of the sixth thin film transistor T6, and the gate electrode of the seventh thin film transistor T7; the nth stage gate control signal CG (N) is connected to the drain of the fifth thin film transistor T5; the source of the fifth thin film transistor T5 is used for outputting a display driving signal G (N); the nth level fingerprint reset control signal CRST (N) is connected to the drain of the sixth thin film transistor T6; the source of the sixth thin film transistor T6 is used to output a fingerprint reset signal in the fingerprint driving signal; the nth level fingerprint control signal CGN (N) is connected to the drain electrode of the seventh thin film transistor T7; the source of the seventh thin film transistor T7 is for outputting a fingerprint enable signal among the fingerprint driving signals.
As shown in fig. 8, the pull-down potential generating unit 30 includes an eighth thin film transistor T8, a ninth thin film transistor T9, a tenth thin film transistor T10, an eleventh thin film transistor T11, a twelfth thin film transistor T12, and a second capacitor C2; the constant voltage high potential signal VGH is connected to the drain electrode of the eighth thin film transistor T8, the drain electrode of the ninth thin film transistor T9, and the drain electrode of the tenth thin film transistor T10; the (N +1) th stage gate control signal CG (N +1) is connected to the gate of the eighth thin film transistor T8; the (N +1) th fingerprint reset control signal CRST (N +1) is connected to the gate of the ninth thin film transistor T9; the (N +1) th fingerprint control signal CGN (N +1) is connected to the gate of the tenth thin film transistor T10; a drain electrode of the eleventh thin film transistor T11 is connected to the source electrode of the eighth thin film transistor T8, the source electrode of the ninth thin film transistor T9, and the source electrode of the tenth thin film transistor T10; the forward direction scanning control signal U2D is connected to the gate of the eleventh thin film transistor T11; a source of the eleventh thin film transistor T11 is connected to a gate of the twelfth thin film transistor T12; the constant voltage high potential signal VGH is connected to the drain of the twelfth thin film transistor T12; a source of the twelfth thin film transistor T12 is connected to the first terminal of the second capacitor C2; a second terminal of the second capacitor C2 is connected to the constant voltage low potential signal VGL.
As shown in fig. 8, the driving signal pull-down unit 6040 includes a thirteenth thin film transistor T13, a fourteenth thin film transistor T14 and a fifteenth thin film transistor T15; a first end of the second capacitor C2 is connected to the gate electrode of the thirteenth thin film transistor T13, the gate electrode of the fourteenth thin film transistor T14, and the gate electrode of the fifteenth thin film transistor T15; a source electrode of the thirteenth thin film transistor T13 is connected to a source electrode of the fifth thin film transistor T5; a source electrode of the fourteenth thin film transistor T14 is connected to a source electrode of the sixth thin film transistor T6; a source electrode of the fifteenth thin film transistor T15 is connected to a source electrode of the seventh thin film transistor T7; the constant voltage low potential signal VGL is connected to the drain electrode of the thirteenth thin film transistor T13, the drain electrode of the fourteenth thin film transistor T14, and the drain electrode of the fifteenth thin film transistor T15.
As shown in fig. 2, in one embodiment, the nth stage driving sub-circuit further includes a backflow prevention protection unit 50; the input end of the backflow prevention protection unit 50 is connected with the output end of the pull-up potential generation unit 10; the output end of the backflow prevention protection unit 50 is connected with the input end of the driving signal generation unit 20; the control end of the backflow prevention protection unit 50 is connected to the constant voltage high potential signal VGH.
Specifically, the anti-backflow protection unit 50 is used to prevent the charge in the driving signal generation unit 20 from flowing back to the driving circuit, and avoid affecting the potential in the driving signal generation unit 20.
As shown in fig. 8, the backflow prevention protection unit 50 includes a sixteenth thin film transistor T16; a first end of the first capacitor C1 is connected to the drain electrode of the sixteenth thin film transistor T16; a source electrode of the sixteenth thin film transistor T16 is connected to a gate electrode of the fifth thin film transistor T5; the gate of the sixteenth thin film transistor T16 is connected to the constant voltage high potential signal VGH.
As shown in fig. 3, in one embodiment, the nth stage driving sub-circuit further includes a pull-down unit 60; the input end of the pull-down unit 60 is connected to the constant voltage low potential signal VGL; the output terminal of the pull-down unit 60 is connected to the output terminal of the pull-up potential generating unit 10; the control terminal of the pull-down unit 60 is connected to the output terminal of the pull-down potential generating unit 30.
Specifically, the pull-down unit 60 is configured to pull down the pull-up potential signal Q according to the pull-down potential signal P, so as to control the driving signal generating unit 20 to be in the non-operating state.
As shown in fig. 8, the pull-down unit 60 includes a seventeenth thin film transistor T17; a first terminal of the second capacitor C2 is connected to the gate of the seventeenth thin film transistor T17; a source of the seventeenth thin film transistor T17 is connected to the first terminal of the first capacitor C1; the drain of the seventeenth thin film transistor T17 is connected to a constant voltage low potential signal VGL.
As shown in fig. 4, in one embodiment, the nth stage driving sub-circuit further includes a reset unit 70; the system RESET signal RESET is connected with the input end of the RESET unit 70 and the control end of the RESET unit 70; an output terminal of the reset unit 70 is connected to an output terminal of the pull-down potential generating unit 30.
Specifically, the RESET unit 70 is configured to pull up the pull-down potential signal P according to a system RESET signal RESET. The system RESET signal RESET is common to the whole driving circuit, that is, the driving sub-circuits of each stage in the whole driving circuit can be RESET simultaneously by the system RESET signal RESET.
As shown in fig. 8, the reset unit 70 includes an eighteenth thin film transistor T18; the system RESET signal RESET is connected to the drain of the eighteenth thin film transistor T18 and the gate of the eighteenth thin film transistor T18; a source of the eighteenth thin film transistor T18 is connected to a first terminal of the second capacitor C2.
As shown in fig. 5, in one embodiment, the nth stage driving sub-circuit further includes a system setting unit 80; the system setting signal GAS1 is connected with the control end of the system setting unit 80; the input end of the system setting unit 80 is connected with the constant voltage low potential signal VGL; an output terminal of the system setting unit 80 is connected to an output terminal of the drive signal generating unit 20.
Specifically, the system set unit 80 is configured to pull down the display driving signal G (N) and the fingerprint driving signal according to the system set signal GAS 1; the system set signal GAS1 is common to the entire driving circuit, i.e. each stage of driving sub-circuit in the entire driving circuit can be simultaneously system set by the system set signal GAS 1.
As shown in fig. 8, the system setting unit 80 includes a nineteenth thin film transistor T19, a twentieth thin film transistor T20, and a twenty-first thin film transistor T21; the system set signal GAS1 is connected to the gates of the nineteenth thin film transistor T19, the twentieth thin film transistor T20, and the twenty-first thin film transistor T21; a source electrode of the nineteenth thin film transistor T19 is connected to a source electrode of the fifth thin film transistor T5; a source of the twentieth thin film transistor T20 is connected to a source of the sixth thin film transistor T6; the source electrode of the twenty-first thin film transistor T21 is connected to the source electrode of the seventh thin film transistor T7; the constant voltage low potential signal VGL is connected to the drain of the nineteenth thin film transistor T19, the drain of the twentieth thin film transistor T20, and the drain of the twenty-first thin film transistor T21.
As shown in fig. 6, in one embodiment, the nth stage driving sub-circuit further includes a system display setting unit 90; the control end of the system display setting unit 90 is connected with a system display setting signal GAS 2; the input end of the system display setting unit 90 is connected with the constant voltage low potential signal VGL; the output terminal of the system display setting unit 90 is connected to the output terminal of the pull-down potential generating unit 30 and the output terminal of the drive signal generating unit 20.
Specifically, the system display set unit 90 is configured to pull up the display driving signal G (N) according to the system display set signal GAS2, and pull down the pull-down potential signal P to ensure that the display driving signal G (N) is in a high level state. The system display set signal GAS2 is shared by the whole driving circuit, that is, the system display set signal GAS2 can simultaneously perform system display set on each level of driving sub-circuit in the whole driving circuit.
As shown in fig. 8, the system display setting unit 90 includes a twenty-second thin film transistor T22 and a twenty-third thin film transistor T23; the system display set signal GAS2 is connected to the gate of the twenty-second thin film transistor T22, the drain of the twenty-second thin film transistor T22, and the gate of the twenty-third thin film transistor T23; a source electrode of the twenty-second thin film transistor T22 is connected to a source electrode of the fifth thin film transistor T5; the drain of the twenty-third thin film transistor T23 is connected to the constant voltage low potential signal VGL; a source of the twenty-third thin film transistor T23 is connected to the first terminal of the second capacitor C2.
As shown in fig. 7, in one embodiment, the nth stage driving sub-circuit further includes a reverse scan control unit; the reverse scan control unit is connected to the constant voltage low potential signal VGL, the pull-up potential generating unit 10, and the pull-down potential generating unit 30.
Specifically, the reverse scan control unit is used for controlling the scanning direction of the driving circuit, wherein the scanning direction comprises forward scanning and reverse scanning; the reverse scan control unit provided in this embodiment is used to implement reverse scan.
As shown in fig. 8, the reverse scan control unit includes a twenty-fourth thin film transistor T24, a twenty-fifth thin film transistor T25, and a twenty-sixth thin film transistor T26; the reverse scan control signal D2U is connected to the gate of the twenty-fourth thin film transistor T24 and the drain of the twenty-fifth thin film transistor T25; the N-1 th stage gate control signal CG (N-1) is connected to the drain of the twenty-fourth thin film transistor T24; a source electrode of the twenty-fourth thin film transistor T24 is connected to a source electrode of the eleventh thin film transistor T11; the (N +2) th stage gate control signal CG (N +2) is connected to the gate of the twenty-fifth thin film transistor T25; a source of the twenty-fifth thin film transistor T25 is connected to a gate of the twenty-sixth thin film transistor T26 and a first end of the first capacitor C1; a source of the twenty-sixth thin film transistor T26 is connected to the first end of the second capacitor C2; the drain of the twenty-sixth thin film transistor T26 is connected to a constant voltage low potential signal VGL.
As shown in fig. 8 and 9, the operation process of the driving circuit includes a display phase, a fingerprint partition searching phase, a reset phase, an exposure phase and a reading phase. They are independent, do not interfere with each other, and do not overlap in time.
A display stage: when any one of the gate control signal CG (N-2) of the N-2 th level, the fingerprint reset control signal CRST (N-2) of the N-2 th level, or the fingerprint control signal CGN (N-2) of the N-2 th level starts to operate, one of the corresponding first thin film transistor T1, second thin film transistor T2, or third thin film transistor T3 is turned on to operate, and at this time, the fourth thin film transistor T4 is turned on to pull up the potential of the pull-up potential signal Q; thereby controlling the fifth, sixth, and seventh thin film transistors T5, T6, and T7 to be in a turned-on state, at which the nth-stage gate control signal CG (N) is output through the fifth thin film transistor T5 as the display driving signal G (N).
Finding fingerprint partitions: the corresponding signals are low potential signals, and at the moment, the driving circuit does not output; so as to match with the fingerprint identification circuit to search for fingerprint partitions.
A reset stage: the nth fingerprint reset control signal CRST (N) is output through the sixth thin film transistor T6 as a fingerprint reset signal to control the fingerprint identification circuit to reset.
And (3) an exposure stage: the corresponding signals are low potential signals, and at the moment, the driving circuit does not output; so as to cooperate with the fingerprint identification circuit to carry out exposure.
A reading stage: the nth level fingerprint control signal CGN (N) is output through the seventh thin film transistor T7 as an nth level fingerprint enable signal to control the fingerprint identification circuit to read fingerprint data.
As shown in fig. 8, in one embodiment, the fingerprint driving signal includes a fingerprint reset signal RST (N) and a fingerprint enable signal GN (N); the fingerprint reset signal RST (N) is used for controlling the reset of the fingerprint identification circuit; the fingerprint enable signal GN (N) is used for controlling the fingerprint identification circuit to output a fingerprint identification signal.
Specifically, as shown in fig. 10, the fingerprint recognition circuit includes a plurality of fingerprint recognition sub-circuits, wherein the nth fingerprint recognition sub-circuit includes a twenty-seventh thin film transistor NT1, a twenty-eighth thin film transistor NT2, a twenty-ninth thin film transistor NT3, and a photodiode D1; the direct-current voltage signal Vint is connected with the drain electrode of the twenty-seventh thin film transistor NT 1; the nth level fingerprint reset signal is connected with the gate of the twenty-seventh thin film transistor NT 1; the common voltage signal COM is connected to the anode of the photodiode D1; the cathode of the photodiode D1 is connected to the source of the twenty-seventh thin film transistor NT1 and the gate of the twenty-eighth thin film transistor NT 2; the constant voltage signal VDD is connected to the drain of the twenty-eighth thin film transistor NT 2; the source of the twenty-eighth thin film transistor NT2 is connected to the drain of the twenty-ninth thin film transistor NT 3; the nth level fingerprint enable signal is connected with the gate of the twenty ninth thin film transistor NT 3; the drain of the twenty-ninth thin film transistor NT3 is connected to a fingerprint identification integrated circuit.
The twenty-seventh thin film transistor NT1 is mainly used for resetting the fingerprint signal, and when the nth fingerprint reset signal is at a high potential, the twenty-seventh thin film transistor NT1 is turned on, so that the negative electrode potential of the photodiode D1 in the corresponding fingerprint identification sub-circuit is reset to a fixed voltage, i.e., the potential of the dc voltage signal Vint.
Then, exposure is performed, and photo current is generated by the photodiode D1 at this time, so that the cathode potential of the photodiode D1 is lowered, and the cathode potential of the photodiode D1 of the pixel (pixel) where the valley and the ridge are located is different due to the difference in reflectivity of the valley and the ridge of the fingerprint and the difference in photo current.
Finally, in the reading process, a constant voltage signal VDD is generated, when the Nth-level fingerprint enabling signal is at a high potential, the twenty-ninth thin film transistor NT3 is turned on, and the reading circuit is a passage; since the negative electrode potentials of the photodiode D1 at the positions of the valleys and the ridges of the fingerprint are different, and the voltage difference (Vgs) between the gate and the source of the twenty-eighth thin film transistor NT2 is different, the corresponding currents are different, and the amount of charge or the voltage difference read by the fingerprint identification integrated circuit is different, so that the valleys or the ridges of the fingerprint are identified.
In one embodiment, the present disclosure provides a display panel including the driving circuit 3 in any one of the above embodiments.
As shown in fig. 11, in one embodiment, the display panel further comprises a fingerprint recognition circuit 4 integrated within the display panel; the control end of the fingerprint identification circuit 4 is connected with the output end of the drive circuit 3 so as to access a fingerprint drive signal.
As shown in fig. 11, in one embodiment, the display panel includes a display area 1 and bezel areas 2 located at left and right sides of the display area 1; the frame area 2 comprises a left frame area and a right frame area; a grid wire is arranged in the display panel; the fingerprint identification circuits 4 are positioned in the display area 1 and distributed in an array; the driving circuit 3 is positioned in the frame area 2; the left frame area and the right frame area are respectively provided with a driving circuit 3; and two ends of the Nth-level grid wire are respectively connected with the corresponding Nth-level driving sub-circuit. The two driving sub-circuits can drive the same grid to run, the driving capability of the grid to run is improved, and the delay degree of the grid driving signal is reduced.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The driving circuit provided by the embodiment of the present application is described in detail above, and a specific example is applied in the description to explain the principle and the implementation of the present application, and the description of the above embodiment is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A driving circuit is characterized by comprising a plurality of cascaded driving sub-circuits; wherein, the nth level drive sub-circuit includes:
a pull-up potential generating unit for generating a pull-up potential signal;
the driving signal generating unit is connected with the output end of the pull-up potential generating unit and is used for independently outputting a display driving signal and a fingerprint driving signal in a time-sharing manner according to the pull-up potential signal;
a pull-down potential generating unit for generating a pull-down potential signal; and
and the driving signal pull-down unit is connected with the output end of the pull-down potential generation unit and the output end of the driving signal pull-down unit and is used for controlling the driving signal pull-down unit according to the pull-down potential signal so as to pull down the potential of the display driving signal and the potential of the fingerprint driving signal.
2. The driving circuit of claim 1, wherein the nth stage driving sub-circuit further comprises a back-flow prevention protection unit;
the input end of the backflow prevention protection unit is connected with the output end of the pull-up potential generation unit; the output end of the backflow preventing protection unit is connected with the input end of the driving signal generation unit; and the control end of the backflow prevention protection unit is connected with a constant-voltage high-potential signal.
3. The driving circuit according to claim 1, wherein the nth stage driving sub-circuit further comprises a pull-down unit;
the input end of the pull-down unit is connected with a constant-voltage low-potential signal; the output end of the pull-down unit is connected with the output end of the pull-up potential generating unit; and the control end of the pull-down unit is connected with the output end of the pull-down potential generating unit.
4. The driving circuit according to claim 1, wherein the nth stage driving sub-circuit further comprises a reset unit;
the system reset signal is connected with the input end of the reset unit and the control end of the reset unit; and the output end of the reset unit is connected with the output end of the pull-down potential generating unit.
5. The driving circuit according to claim 1, wherein the nth stage driving sub-circuit further comprises a system setting unit;
the system setting signal is connected with the control end of the system setting unit; the input end of the system setting unit is connected with a constant voltage low potential signal; and the output end of the system setting unit is connected with the output end of the driving signal generating unit.
6. The driving circuit according to claim 1, wherein the nth stage driving sub-circuit further comprises a system display setting unit;
the control end of the system display setting unit is connected with a system display setting signal; the input end of the system display setting unit is connected with a constant voltage low potential signal; and the output end of the system display setting unit is connected with the output end of the pull-down potential generating unit and the output end of the driving signal generating unit.
7. The driving circuit according to claim 1, wherein the nth stage driving sub-circuit further comprises a reverse scan control unit;
the reverse scanning control unit is connected with a constant voltage low potential signal, the pull-up potential generation unit and the pull-down potential generation unit.
8. The driving circuit according to any one of claims 1 to 7, wherein the fingerprint driving signal comprises a fingerprint reset signal and a fingerprint enable signal; the fingerprint reset signal is used for controlling the resetting of the fingerprint identification circuit; the fingerprint enabling signal is used for controlling the fingerprint identification circuit to output a fingerprint identification signal.
9. A display panel comprising the driver circuit according to any one of claims 1 to 8.
10. The display panel of claim 9, further comprising a fingerprint recognition circuit integrated within the display panel; and the control end of the fingerprint identification circuit is connected with the output end of the driving circuit so as to access the fingerprint driving signal.
Priority Applications (2)
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| CN202010103938.1A CN111178334B (en) | 2020-02-20 | 2020-02-20 | Drive circuit and display panel |
| PCT/CN2020/078703 WO2021164070A1 (en) | 2020-02-20 | 2020-03-11 | Drive circuit and display panel |
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| CN202010103938.1A CN111178334B (en) | 2020-02-20 | 2020-02-20 | Drive circuit and display panel |
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| CN111178334B CN111178334B (en) | 2021-07-23 |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN111178334B (en) | 2021-07-23 |
| WO2021164070A1 (en) | 2021-08-26 |
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