CN111177044A - Panel computer control circuit and panel computer - Google Patents
Panel computer control circuit and panel computer Download PDFInfo
- Publication number
- CN111177044A CN111177044A CN201911375648.6A CN201911375648A CN111177044A CN 111177044 A CN111177044 A CN 111177044A CN 201911375648 A CN201911375648 A CN 201911375648A CN 111177044 A CN111177044 A CN 111177044A
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- interface
- storage
- control circuit
- central processing
- memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1694—Configuration of memory controller to different memory types
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/1613—Constructional details or arrangements for portable computers
- G06F1/1626—Constructional details or arrangements for portable computers with a single-body enclosure integrating a flat display, e.g. Personal Digital Assistants [PDAs]
Abstract
The invention discloses a tablet computer control circuit and a tablet computer, wherein the tablet computer control circuit is integrated on a PCB circuit board, is arranged in a tablet computer shell and mainly comprises a central processing unit and a storage unit electrically connected with the central processing unit, and the storage unit is connected with a storage interface of the central processing unit through a storage selection interface circuit. The invention can adjust some parameters of the circuit board of the tablet computer which finishes the patch through the storage selection interface circuit, namely, the storage selection interface circuit is used for selecting storage units with different capacities, thereby providing a selectable option for a client to select a storage with a suitable capacity, further increasing some functions or improving some performances, further leading the client to achieve the expected functions and performance indexes, meeting the actual requirements and being economical and practical.
Description
Technical Field
The present application relates to the field of electronic circuit technologies, and in particular, to a tablet computer control circuit and a tablet computer.
Background
With the continuous development of the electronic industry, a tablet computer is already used by most scenes and people, and is also called a portable computer, so that the tablet computer is a small-sized and portable personal computer, and a touch screen is used as a basic input device. It has a touch screen that allows a user to manipulate with a finger, stylus.
At present, the use of a tablet computer in the market is very common, and with the diversification of functions and the shortening of an iteration period of the tablet computer, higher requirements are put forward for design and production of the tablet computer, but in the prior art, once a circuit board of the tablet computer is subjected to surface mounting, functional and performance indexes, even memory capacity, are already determined, that is, parameter adjustment cannot be performed on the circuit board subjected to surface mounting, and then some functions cannot be added or some performances cannot be improved.
Therefore, a tablet computer control circuit is needed to solve the above problems.
Disclosure of Invention
The application provides a panel computer control circuit and panel computer can carry out some parameter adjustment or even the selection of different memory capacity to the circuit board of accomplishing the paster, and then increases some functions, or promotes some performances to solve the problem that exists among the prior art.
In order to solve the technical problem, the application adopts a technical scheme that: the tablet computer control circuit comprises a central processing unit and a storage unit electrically connected with the central processing unit, wherein the storage unit is connected with a storage interface of the central processing unit through a storage selection interface circuit.
In the tablet computer control circuit of the present invention, the storage interface includes a memory interface and a memory interface.
In the tablet computer control circuit of the present invention, the memory selection interface circuit is connected between the memory interface and the memory unit.
In the tablet computer control circuit, the storage unit comprises an embedded multi-layer packaging chip and a nonvolatile memory.
The tablet personal computer control circuit further comprises a power supply management unit electrically connected with the central processing unit, and a D/A digital-analog interface of the central processing unit is connected with an A/D digital-analog interface of the power supply management unit.
In the tablet computer control circuit of the present invention, the power management unit includes a dc-dc conversion circuit.
The tablet computer control circuit further comprises an expansion interface electrically connected with the central processing unit, wherein the expansion interface comprises a temperature sensing interface, a video interface, a lighting access interface, a data composite interface and an interface for displaying the working state of a computer.
In order to solve the above technical problem, another technical solution adopted by the present application is: the tablet computer comprises a tablet computer control circuit, wherein the control circuit comprises a central processing unit and a storage unit electrically connected with the central processing unit, and the storage unit is connected with a storage interface of the central processing unit through a storage selection interface circuit.
In the tablet computer of the present invention, the storage interface includes a memory interface and a memory interface.
In the tablet computer, the storage selection interface circuit is connected between the memory interface and the storage unit.
The beneficial effect of this application is: the tablet computer control circuit is integrated on the PCB circuit board, is arranged in the tablet computer shell and comprises a central processing unit and a storage unit electrically connected with the central processing unit, and the storage unit is connected with a storage interface of the central processing unit through a storage selection interface circuit. According to the tablet computer control circuit and the tablet computer, parameter adjustment can be performed on the circuit board of the tablet computer with the patch being completed through the storage selection interface circuit, namely, the storage units with different capacities can be selected through the storage selection interface circuit, so that a selectable option is provided for a customer to select a storage with a suitable capacity, functions are added, or performances are improved, the desired functions and performance indexes are achieved, and the tablet computer control circuit and the tablet computer meet actual requirements and are economical and practical.
Drawings
Fig. 1 is a schematic structural diagram of a tablet computer control circuit according to a preferred embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a storage interface according to an embodiment of the present invention;
FIG. 3 is a partial pin circuit diagram of a memory interface when the CPU is an SC7731E IC according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of a portion of the pins of the first memory interface when the memory cell is an EMMC according to the present invention;
FIG. 5 is a pin layout of a portion of the second memory interface when the memory cell is an EMCP according to an embodiment of the present invention;
FIG. 6 is a pin layout of another portion of the second memory interface when the memory cell is an EMCP according to the embodiment of the present invention;
FIG. 7 is a circuit diagram of a preferred embodiment of a memory select interface circuit in accordance with the present invention;
FIG. 8 is a circuit diagram of another preferred embodiment of a memory select interface circuit in accordance with an embodiment of the present invention.
Fig. 9 is a schematic structural diagram of a tablet computer according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Fig. 1 is a schematic structural diagram of a tablet computer control circuit according to a first embodiment of the present invention. As shown in fig. 1, the tablet computer control circuit is integrated on a PCB 100 and disposed in a tablet computer housing, the tablet computer control circuit mainly includes a central processing unit 10, and a power management unit 20, a communication unit 30, a positioning unit 40, a display unit 12, a touch screen 13, a camera 14, a sensor 15, a key 16, an expansion interface 17, and a crystal oscillator 24 electrically connected thereto, and the storage unit 11 is connected to a storage interface 101 of the central processing unit 10 through a storage selection interface circuit 111. The power management unit 20 is electrically connected with the loudspeaker 21, the telephone receiver 22 and the motor 23, the power management unit 20 is electrically connected with the battery 31, and the battery 31 is externally connected with a charging interface 32 positioned on the surface of the tablet computer shell.
In this embodiment, the D/a digital-to-analog interface of the central processing unit is connected to the a/D analog-to-digital interface of the power management unit. Specifically, the central processing unit 10 preferably selects an SC7731E integrated chip, the power management unit 20 preferably selects an SC2720A integrated chip, an a/D analog-to-digital interface of the SC2720A integrated chip is connected to a D/a digital-to-analog interface of the SC7731 integrated chip, the SC2720A integrated chip is connected to the SC7731E integrated chip through a low dropout linear regulator circuit, and the SC2720A integrated chip of the power management unit further includes a dc-dc conversion circuit for supplying power to a power supply portion of the SC7731E integrated chip, so that the input voltage is within an operating voltage range of the SC77 7731E integrated chip.
The storage unit 11 is connected to the storage interface 101 of the central processing unit 10 through the storage selection interface circuit 111.
The memory unit 11 may be an EMCP (Embedded Multi-layer package chip, which is called an Embedded Multi-media package), which is a higher-order memory device and integrally packages an EMMC (nonvolatile memory), an LPDDR3 (third-generation Low-Power memory, which is called a Low Power Double Data Rate SDRAM 3). The memory select interface circuit 111 is coupled between the memory interface 101 and the EMCP for facilitating debugging signals transferred between the memory interface 101 and the EMCP memory cell 11.
Further, the memory cell 11 may also be an EMMC, and the memory selection interface circuit 111 is connected between the memory interface 101 and the EMMC for facilitating debugging signals transmitted between the memory interface 101 and the EMMC.
In this embodiment, the storage interface 101 specifically includes a storage interface 1011 and a memory interface 1012. Memory interface 1011 includes a first memory interface for accessing an external EMMC and a second memory interface for accessing the EMMC portion of an external EMCP, and memory interface 1012 is a memory interface for accessing the LPDDR3 portion of an external EMCP.
Specifically, the memory selection interface circuit 111 is connected between the external EMMC, the EMMC part in the external EMCP, and the first memory interface for accessing the external EMMC and the second memory interface for accessing the EMMC part in the external EMCP, among the memory interfaces 1011.
Fig. 3 is a partial pin circuit diagram of the memory interface when the cpu 10 is an SC7731E integrated chip. For example, pin AA7 of the SC7731E ic is correspondingly connected to an EMMC-CLK signal line, pin AE5 is correspondingly connected to an EMMC-CMD signal line, pin AB2 is correspondingly connected to an EMMC-RST signal line, pin AC5 is correspondingly connected to an EMMC-RCLK signal line, and pin AD3 is correspondingly connected to an EMMC-D0 signal line … … pin AC1 is correspondingly connected to an EMMC-D7 signal line, which will not be described herein again.
Referring to FIG. 4, a circuit diagram of a portion of the pins of the first memory interface when the memory cell 11 is an EMMC is shown, for example, pin M6 of the EMMC is correspondingly connected to an EMMC-CLK-0 signal line, pin M5 is correspondingly connected to an EMMC-CMD-0 signal line, pin K5 is correspondingly connected to an EMMC-RST-0 signal line, and pin H5 is correspondingly connected to an EMMC-RCLK-0 signal line.
Referring to FIG. 5, which is a circuit diagram of a portion of the pins of the second memory interface when the memory cell 11 is an EMCP, for example, pin B5 of the EMCP is correspondingly connected to an EMMC-CLK-1 signal line, pin C5 is correspondingly connected to an EMMC-CMD-1 signal line, and pin C1 is correspondingly connected to an EMMC-RST-1 signal line.
As shown in FIG. 6, it is a circuit diagram of another part of pins of the second memory interface when the memory cell 11 is an EMCP, for example, pin B3 of the EMCP is correspondingly connected to an EMMC-DAT1-1 signal line, which is not described again.
FIG. 7 is a circuit diagram of a preferred embodiment of the memory select interface circuit. As shown in fig. 3, 4, 5, and 7, the following explanation is made:
(1) take the memory selection interface circuit connected between the EMMC-CLK signal line and the EMMC-CLK-0 and EMMC-CLK-1 signal lines as an example:
the memory selection interface circuit connected between the EMMC-CLK signal line and the EMMC-CLK-0 signal line is taken as an example for explanation: the EMMC-CLK signal line is a signal line correspondingly connected with a pin AA7 of an SC7731E integrated chip, the EMMC-CLK-0 signal line is a signal line correspondingly connected with a pin M6 of an EMMC, a resistance position R097 is reserved between the EMMC-CLK and the EMMC-CLK-0, a resistance position R098 is reserved between the EMMC-CLK and the EMMC-CLK-1, and in specific use, zero ohm resistors are welded on the reserved resistance position R097 and the reserved resistance position R098 alternatively to keep the EMMC-CLK-0 and the EMMC-CLK-1 at1 or 0, so that selection of the EMMC or selection of an EMMC part in the EMCP is realized, a memory with a proper capacity is selected, a selectable item is provided for customers, and the memory can meet practical requirements and is economical and practical.
(2) The memory selection interface circuit connected between the EMMC-CMD signal line and the EMMC-CMD-0 and EMMC-CMD-1 signal lines is taken as an example for explanation:
the EMMC-CMD signal line is a signal line correspondingly connected with a pin AE5 of the SC7731E integrated chip, the EMMC-CMD-0 signal line is a signal line correspondingly connected with a pin M5 of the EMMC, and a resistor position R100 is reserved between the EMMC-CMD and the EMMC-CMD-0. The EMMC-CMD signal line is a signal line correspondingly connected with a pin AE5 of the SC7731E integrated chip, the EMMC-CMD-1 signal line is a signal line correspondingly connected with a pin C5 of the EMCP, and a resistor position R099 is reserved between the EMMC-CMD and the EMMC-CMD-1.
Either resistor location R099 or resistor location R100 welds a zero ohm resistor to maintain EMMC-CMD-0, EMMC-CMD-1 at either "1" or "0" to enable selection of the EMMC, or selection of the portion of the EMMC in the EMCP.
(3) The memory selection interface circuit connected between the EMMC-RST signal line and the EMMC-RST-0 and EMMC-RST-1 signal lines has the same principle as the memory selection interface circuit connected between the EMMC-CMD signal line and the EMMC-CMD-0 and EMMC-CMD-1 signal lines in the above (2), and is not described again.
As shown in fig. 8, a circuit diagram of another preferred embodiment of a memory select interface circuit. As shown in fig. 3, 4, 6, and 8, the following explanation is made:
(1) take the memory selection interface circuit connected between the EMMC-D1 signal line and the EMMC-DAT1-0 and EMMC-DAT1-1 signal lines as an example:
a memory selection interface circuit connected between an EMMC-D1 signal line and an EMMC-DAT1-0 signal line is taken as an example for explanation: the EMMC-D1 signal line is a signal line correspondingly connected with a pin AD4 of an SC7731E integrated chip, the EMMC-DAT1-0 signal line is a signal line correspondingly connected with a pin A4 of the EMMC, a resistance position R106 is reserved between EMMC-D1 and EMMC-DAT1-0, and a resistance position R105 is reserved between EMMC-D1 and EMMC-DAT 1-1. Zero-ohm resistance is welded at the reserved resistance position R106 and the reserved resistance position R105 alternatively, so that the EMMC-DAT1-0 and the EMMC-DAT1-1 are kept at1 or 0, selection of the EMMC or selection of the EMMC part in the EMCP is achieved, a memory with a proper capacity is selected, an option is provided for a customer, and the method can meet actual requirements and is economical and practical.
(2) The memory selection interface circuits connected between the other EMMC-D2 signal lines and the EMMC-DAT2-0 and EMMC-DAT2-1 signal line … … are the same as the circuit principle described in the above (1), and are not described again.
Referring to fig. 9, fig. 9 is a schematic structural diagram of a tablet computer according to an embodiment of the present invention. The tablet computer according to the embodiment of the present invention uses the tablet computer control circuit described in the above embodiments, and as shown in fig. 1 and fig. 9, the tablet computer control circuit is integrated on a PCB 100, and is disposed in a tablet computer housing, and mainly includes a central processing unit 10, and a power management unit 20, a communication unit 30, a positioning unit 40, a storage unit 11, a display unit 12, a touch screen 13, a camera 14, a sensor 15, a key 16, and an expansion interface 17 electrically connected thereto, where the power management unit 20 is electrically connected to a speaker 21, a receiver 22, a motor 23, and a crystal oscillator 24, the power management unit 20 is electrically connected to a battery 31, and the battery 31 is connected to a charging interface 32 located on a surface of the tablet computer housing. In the present invention, the storage unit 11 is connected to the storage interface 101 of the central processing unit 10 through a storage selection interface circuit 111.
For details of the control circuit of the tablet computer in this embodiment, please refer to the description in the embodiment of the control circuit described above with reference to fig. 1 to 8, which is not repeated herein.
Further, in the tablet computer and the control circuit thereof of the present embodiment, the expansion interface 17 includes, but is not limited to, a temperature sensing interface, a video interface, a lighting interface, a data composite interface, and a computer working state display interface. The temperature sensing interface is connected with a temperature controller on the surface of the tablet personal computer shell, and the temperature controller adopts an electronic controller; the video interface is connected with the camera 14, the camera 14 is connected with a sliding groove on the side edge of the computer shell through a connecting groove, the illumination access port is connected with a backlight LED display lamp of the display unit 12, the data composite interface is connected with control ports of the display unit 12 and the touch screen 13, and the display computer working state interface is connected with an indicator lamp on the surface of the tablet computer shell.
Further, in the tablet computer and the control circuit thereof of the present invention, the communication unit 30 includes a radio frequency module, a radio frequency positioning module, a bluetooth, a wireless local area network transceiver module, and a radio module, further, the radio frequency module is connected to the main antenna through a power amplifying circuit and a power control circuit and via a duplex circuit; the radio frequency positioning module, the Bluetooth, the wireless local area network transceiver module and the radio module are connected with the antenna through the surface acoustic wave filter circuit and the low-noise amplifying circuit and the duplex circuit.
In summary, the tablet computer control circuit and the tablet computer of the present invention can adjust some parameters of the circuit board of the tablet computer on which the patch is mounted through the storage selection interface circuit, that is, select the storage units with different capacities through the storage selection interface circuit, thereby providing a selectable option for a client to select a memory with a suitable capacity, and further increasing some functions or improving some performances, so as to achieve desired functions and performance indexes, thereby meeting practical requirements and being economical and practical.
The above-described embodiments in the several embodiments provided in this application are merely illustrative, for example, the division of a unit is only one type of division of logic functions, and there may be other ways of dividing the actual implementation, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. The above embodiments are merely examples and are not intended to limit the scope of the present disclosure, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present disclosure or those directly or indirectly applied to other related technical fields are intended to be included in the scope of the present disclosure.
Claims (10)
1. A tablet personal computer control circuit comprises a central processing unit (10) and a storage unit (11) electrically connected with the central processing unit (10), and is characterized in that the storage unit (11) is connected to a storage interface (101) of the central processing unit (10) through a storage selection interface circuit (111).
2. The tablet control circuit of claim 1,
the storage interface (101) includes a storage interface (1011) and a memory interface (1012).
3. The tablet control circuit of claim 2,
the memory selection interface circuit (111) is connected between the memory interface (1011) and the memory cell (11).
4. The tablet PC control circuit according to any one of claims 1 to 3,
the storage unit (11) comprises an embedded multi-system-layer packaging chip and a nonvolatile memory.
5. The tablet control circuit of claim 4,
the power supply management device is characterized by further comprising a power supply management unit (20) electrically connected with the central processing unit (10), wherein a D/A digital-analog interface of the central processing unit (10) is connected with an A/D analog-digital interface of the power supply management unit (20).
6. The tablet control circuit of claim 4,
the power management unit (20) comprises a direct current-direct current conversion circuit.
7. The tablet control circuit of claim 4,
the computer is characterized by further comprising an expansion interface (17) electrically connected with the central processing unit (10), wherein the expansion interface (17) comprises a temperature sensing interface, a video interface, a lighting access port, a data composite interface and a computer working state display interface.
8. A tablet personal computer comprises a tablet personal computer control circuit, wherein the control circuit comprises a central processing unit (10) and a storage unit (11) electrically connected with the central processing unit, and the tablet personal computer is characterized in that the storage unit (11) is connected to a storage interface (101) of the central processing unit (10) through a storage selection interface circuit (111).
9. The tablet computer of claim 8,
the storage interface (101) includes a storage interface (1011) and a memory interface (1012).
10. The tablet computer of claim 8,
the memory selection interface circuit (111) is connected between the memory interface (1011) and the memory cell (11).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911375648.6A CN111177044A (en) | 2019-12-27 | 2019-12-27 | Panel computer control circuit and panel computer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911375648.6A CN111177044A (en) | 2019-12-27 | 2019-12-27 | Panel computer control circuit and panel computer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111177044A true CN111177044A (en) | 2020-05-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911375648.6A Pending CN111177044A (en) | 2019-12-27 | 2019-12-27 | Panel computer control circuit and panel computer |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101452421A (en) * | 2007-12-07 | 2009-06-10 | 联想(北京)有限公司 | Storage cell control apparatus and control method |
| CN202177851U (en) * | 2011-07-18 | 2012-03-28 | 深圳市言鼎科技有限公司 | Tablet personal computer |
| KR20130108929A (en) * | 2012-03-26 | 2013-10-07 | 주식회사 윈터치 | Tablet with improved power coil layout |
| CN108189782A (en) * | 2017-12-28 | 2018-06-22 | 深圳市元征科技股份有限公司 | A kind of diagnostic device |
-
2019
- 2019-12-27 CN CN201911375648.6A patent/CN111177044A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101452421A (en) * | 2007-12-07 | 2009-06-10 | 联想(北京)有限公司 | Storage cell control apparatus and control method |
| CN202177851U (en) * | 2011-07-18 | 2012-03-28 | 深圳市言鼎科技有限公司 | Tablet personal computer |
| KR20130108929A (en) * | 2012-03-26 | 2013-10-07 | 주식회사 윈터치 | Tablet with improved power coil layout |
| CN108189782A (en) * | 2017-12-28 | 2018-06-22 | 深圳市元征科技股份有限公司 | A kind of diagnostic device |
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