CN111176920A - Device under test and control method and device of device under test - Google Patents
Device under test and control method and device of device under test Download PDFInfo
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- CN111176920A CN111176920A CN201911398887.3A CN201911398887A CN111176920A CN 111176920 A CN111176920 A CN 111176920A CN 201911398887 A CN201911398887 A CN 201911398887A CN 111176920 A CN111176920 A CN 111176920A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
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- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a device to be tested and a control method and a control device of the device to be tested, wherein the method comprises the following steps: detecting whether a power key and a set function key of a device to be tested are simultaneously turned on; and if so, controlling the tested device to enter a test mode. According to the control method of the tested device, the identification time of the USB port is shortened, the testing efficiency is improved, and the testing resources are effectively saved.
Description
Technical Field
The present invention relates to the field of test technologies, and in particular, to a device under test and a method and an apparatus for controlling the device under test.
Background
In the related art, the identification method of the calibration integrated test port generally includes: after a Device Under Test (DUT) is powered on and started up, a Universal Serial BUS (USB) port can be identified, the DUT is controlled to enter a Test mode through a Test instruction, and then a normal calibration comprehensive Test is performed.
However, the method in the related art has a long port identification time, generally about 30-60s, which causes a great low test efficiency and wastes test resources.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, a first objective of the present invention is to provide a method for controlling a device under test, which not only shortens the identification time of a USB port, but also improves the testing efficiency and effectively saves testing resources.
A second object of the present invention is to provide a control apparatus for a device under test.
A third object of the present invention is to provide a device under test.
In order to achieve the above object, an embodiment of a first aspect of the present invention provides a method for controlling a device under test, including: detecting whether a power key and a set function key of a device to be tested are simultaneously turned on; and if so, controlling the device under test to enter a test mode.
In addition, the control method of the device under test according to the above embodiment of the present invention may further have the following additional technical features:
according to one embodiment of the present invention, the set function key is a volume up key.
According to an embodiment of the present invention, before detecting whether the power key of the device under test and the set function key are simultaneously turned on, the method further includes: receiving a test mode entering instruction; and controlling the power key and the set function key to be simultaneously turned on according to the test mode entering instruction.
According to an embodiment of the present invention, the receiving a test mode entering instruction includes: and receiving the test mode entering instruction sent by the programmable logic controller.
According to one embodiment of the invention, the device under test comprises any one of the following devices: receiver, transmitter and frequency synthesizer circuitry.
According to the control method of the device under test of the embodiment of the invention, whether the power key and the set function key of the device under test are simultaneously turned on can be detected, and the device under test is controlled to enter the test mode when the power key and the set function key are simultaneously turned on. Therefore, the identification time of the USB port is shortened, the testing efficiency is improved, and the testing resources are effectively saved.
In order to achieve the above object, a second embodiment of the present invention provides a control apparatus for a device under test, including: the detection module is used for detecting whether a power key and a set function key of the device to be detected are simultaneously turned on; and the control module is used for controlling the tested device to enter a test mode if the power key and the set function key are simultaneously turned on.
According to one embodiment of the present invention, the set function key is a volume up key.
According to an embodiment of the invention, the detection module is further configured to: receiving a test mode entering instruction before detecting whether a power key and a set function key of a device under test are simultaneously turned on; and controlling the power key and the set function key to be simultaneously turned on according to the test mode entering instruction.
According to an embodiment of the present invention, the detection module is specifically configured to: and receiving the test mode entering instruction sent by the programmable logic controller.
According to the control device of the device under test of the embodiment of the invention, whether the power key and the set function key of the device under test are simultaneously turned on can be detected through the detection module, and when the power key and the set function key are simultaneously turned on, the device under test is controlled to enter the test mode through the control module. Therefore, the identification time of the USB port is shortened, the testing efficiency is improved, and the testing resources are effectively saved. In order to achieve the above object, a device under test is provided according to a third embodiment of the present invention, which includes the control apparatus of the device under test.
According to the device under test of the embodiment of the invention, through the control device of the device under test, the identification time of the USB port is shortened, the test efficiency is improved, and the test resources are effectively saved.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a flow chart of a method of controlling a device under test according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a control apparatus of a device under test according to an embodiment of the present invention;
FIG. 3 is a block schematic diagram of a control apparatus of a device under test according to an embodiment of the present invention;
FIG. 4 is a block diagram of a device under test according to an embodiment of the invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
The device under test and the method and apparatus for controlling the device under test according to the embodiments of the present invention are described below with reference to the accompanying drawings.
Fig. 1 is a flowchart of a method for controlling a device under test according to an embodiment of the present invention. As shown in fig. 1, the method for controlling the device under test includes the following steps:
s1, whether the power key of the tested device and the set function key are simultaneously opened is detected.
Wherein, according to an embodiment of the present invention, the set function key is a volume up key.
Further, according to an embodiment of the present invention, the device under test comprises any one of the following devices: receiver, transmitter and frequency synthesizer circuitry. That is, the device under test according to the embodiment of the present invention may be a receiver, a transmitter, or a frequency synthesizer circuit.
It should be understood that the hardware deviation between the PCBA components (Printed Circuit Board Assembly) may cause the radio frequency receiving and transmitting parameters to deviate from the requirements of the radio frequency specification, including the receiving level, the transmitting power, the frequency error, etc. Therefore, there is a need to compensate for the rf parameter error caused by the hardware consistency deviation by calibrating the parameters, wherein the calibration objects include the receiver, the transmitter and the frequency synthesizer circuit. It should be noted that, each calibrated Radio Frequency parameter index is tested, so as to verify whether the RF (Radio Frequency) index of the device under test meets the test standard.
Specifically, as shown in fig. 2, the Power key is a Power key and the volume Up key is an Up key, i.e., whether the Power key and the Up key are simultaneously on is detected
According to an embodiment of the present invention, before detecting whether the power key of the device under test and the set function key are simultaneously turned on, the method further includes: receiving a test mode entering instruction; and controlling the power key and the set function key to be simultaneously turned on according to the test mode entering instruction.
According to one embodiment of the present invention, receiving a test mode entry command includes: and receiving a test mode entering instruction sent by the programmable logic controller.
Specifically, as shown in fig. 2, in the embodiment of the present invention, an entry instruction of the test mode may be sent through a Programmable Logic Controller (PLC). That is to say, when the embodiment of the present invention is used for testing a device under test, the programmable logic controller may send a control instruction to control the power key and the volume up key to be turned on at the same time, so as to test the device under test.
It should be noted that, the connection manner in fig. 2 is consistent with that in the related art, and details are not described herein to avoid redundancy.
And S2, if yes, controlling the tested device to enter a test mode.
Specifically, if the power key and the set function key of the device under test are simultaneously turned on, the device under test can be controlled to enter the test module. It should be noted that the device under test according to the embodiment of the present invention may enter the test module through the Hardware mode, and after the test port is quickly identified, the test tool supports Hardware mode port identification.
That is, in the embodiment of the present invention, after the device under test is powered on, the power key and the volume up key are pressed simultaneously, so that the device under test can directly enter the test mode, and then the calibration comprehensive test is performed, the port identification time is greatly reduced, and the port identification time is 5-10 s; therefore, the identification time of the USB port is shortened, the testing efficiency is improved, and the testing resources are effectively saved.
According to the control method of the device under test provided by the embodiment of the invention, whether the power key and the set function key of the device under test are simultaneously turned on can be detected, and the device under test is controlled to enter the test mode when the power key and the set function key are simultaneously turned on. Therefore, the identification time of the USB port is shortened, the testing efficiency is improved, and the testing resources are effectively saved.
Fig. 3 is a block diagram of a control apparatus of a device under test according to an embodiment of the present invention. As shown in fig. 3, the control apparatus 10 of the device under test includes: a detection module 100 and a control module 200.
The detecting module 100 is used for detecting whether a power key of the device under test and a set function key are turned on simultaneously. The control module 200 is configured to control the device under test to enter the test mode if the power key and the set function key are turned on simultaneously.
According to one embodiment of the present invention, the set function key is a volume up key.
According to an embodiment of the invention, the detection module 100 is further configured to: receiving a test mode entering instruction before detecting whether a power key and a set function key of a device to be tested are simultaneously turned on; and controlling the power key and the set function key to be simultaneously turned on according to the test mode entering instruction.
According to an embodiment of the present invention, the detection module 100 is specifically configured to: and receiving a test mode entering instruction sent by the programmable logic controller.
It should be noted that the foregoing explanation of the embodiment of the method for controlling the device under test is also applicable to the control apparatus of the device under test of the embodiment, and is not repeated herein.
According to the control device of the device under test provided by the embodiment of the invention, whether the power key and the set function key of the device under test are simultaneously turned on can be detected through the detection module, and when the power key and the set function key are simultaneously turned on, the device under test is controlled to enter the test mode through the control module. Therefore, the identification time of the USB port is shortened, the testing efficiency is improved, and the testing resources are effectively saved.
As shown in fig. 4, an embodiment of the invention provides a device under test 20, and the device under test 20 includes the above-mentioned device under test control apparatus 10.
According to the device under test provided by the embodiment of the invention, through the control device of the device under test, the identification time of the USB port is shortened, the test efficiency is improved, and the test resources are effectively saved.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A method for controlling a device under test, comprising:
detecting whether a power key and a set function key of a device to be tested are simultaneously turned on;
and if so, controlling the device under test to enter a test mode.
2. The control method according to claim 1, wherein the set function key is a volume up key.
3. The control method according to claim 1, wherein before detecting whether the power key and the set function key of the device under test are simultaneously turned on, the method further comprises:
receiving a test mode entering instruction;
and controlling the power key and the set function key to be simultaneously turned on according to the test mode entering instruction.
4. The control method according to claim 3, wherein the receiving of the test mode entry instruction includes:
and receiving the test mode entering instruction sent by the programmable logic controller.
5. The control method according to claim 1, wherein the device under test comprises any one of:
receiver, transmitter and frequency synthesizer circuitry.
6. A device under test control apparatus, comprising:
the detection module is used for detecting whether a power key and a set function key of the device to be detected are simultaneously turned on;
and the control module is used for controlling the tested device to enter a test mode if the power key and the set function key are simultaneously turned on.
7. The control device of claim 6, wherein the set function key is a volume up key.
8. The control device of claim 6, wherein the detection module is further configured to:
receiving a test mode entering instruction before detecting whether a power key and a set function key of a device under test are simultaneously turned on;
and controlling the power key and the set function key to be simultaneously turned on according to the test mode entering instruction.
9. The control device according to claim 8, wherein the detection module is specifically configured to:
and receiving the test mode entering instruction sent by the programmable logic controller.
10. A device under test, comprising: control means for a device under test as claimed in any one of claims 6 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911398887.3A CN111176920A (en) | 2019-12-30 | 2019-12-30 | Device under test and control method and device of device under test |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201911398887.3A CN111176920A (en) | 2019-12-30 | 2019-12-30 | Device under test and control method and device of device under test |
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| CN111176920A true CN111176920A (en) | 2020-05-19 |
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| CN201911398887.3A Pending CN111176920A (en) | 2019-12-30 | 2019-12-30 | Device under test and control method and device of device under test |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54142037A (en) * | 1978-04-27 | 1979-11-05 | Fujitsu Ltd | Test program starting system for terminal unit |
| US5233611A (en) * | 1990-08-20 | 1993-08-03 | International Business Machines Corporation | Automated function testing of application programs |
| CN101354649A (en) * | 2007-07-27 | 2009-01-28 | 佛山市顺德区顺达电脑厂有限公司 | Start-up method of computer multiple operating systems |
| CN103793306A (en) * | 2014-02-28 | 2014-05-14 | 珠海迈科电子科技有限公司 | Testing method and device for automatic startup and shutdown of electronic products |
| CN109474501A (en) * | 2019-01-11 | 2019-03-15 | 深圳市菲菱科思通信技术股份有限公司 | Switch test device and method |
-
2019
- 2019-12-30 CN CN201911398887.3A patent/CN111176920A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54142037A (en) * | 1978-04-27 | 1979-11-05 | Fujitsu Ltd | Test program starting system for terminal unit |
| US5233611A (en) * | 1990-08-20 | 1993-08-03 | International Business Machines Corporation | Automated function testing of application programs |
| CN101354649A (en) * | 2007-07-27 | 2009-01-28 | 佛山市顺德区顺达电脑厂有限公司 | Start-up method of computer multiple operating systems |
| CN103793306A (en) * | 2014-02-28 | 2014-05-14 | 珠海迈科电子科技有限公司 | Testing method and device for automatic startup and shutdown of electronic products |
| CN109474501A (en) * | 2019-01-11 | 2019-03-15 | 深圳市菲菱科思通信技术股份有限公司 | Switch test device and method |
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Application publication date: 20200519 |
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